Searched refs:sdp_ctrl (Results 1 – 2 of 2) sorted by relevance
325 u32 sdp_ctrl; /* SDP Control reg */ member
730 if (!(pvt->umc[i].sdp_ctrl & UMC_SDP_INIT)) in determine_edac_cap()824 edac_dbg(1, "UMC%d SDP ctrl: 0x%x\n", i, umc->sdp_ctrl); in __dump_misc_regs_df()1395 channels += !!(pvt->umc[i].sdp_ctrl & UMC_SDP_INIT); in f17_early_channel_count()2626 if ((pvt->umc[i].sdp_ctrl & UMC_SDP_INIT) && in determine_ecc_sym_sz()2667 amd_smn_read(nid, umc_base + UMCCH_SDP_CTRL, &umc->sdp_ctrl); in __read_mc_regs_df()3128 if (pvt->umc[i].sdp_ctrl & UMC_SDP_INIT) { in f17h_determine_edac_ctl_cap()