Searched refs:PCIE_INTR_ENABLE_ADDRESS (Results 1 – 5 of 5) sorted by relevance
102 #if !defined(PCIE_INTR_ENABLE_ADDRESS)103 #define PCIE_INTR_ENABLE_ADDRESS ATH_UNSUPPORTED_REG_OFFSET macro261 .d_PCIE_INTR_ENABLE_ADDRESS = PCIE_INTR_ENABLE_ADDRESS,
155 #define PCIE_INTR_ENABLE_ADDRESS (scn->targetdef->d_PCIE_INTR_ENABLE_ADDRESS) macro
153 #define PCIE_INTR_ENABLE_ADDRESS (scn->targetdef->d_PCIE_INTR_ENABLE_ADDRESS) macro
272 PCIE_INTR_ENABLE_ADDRESS), in pci_dispatch_interrupt()277 PCIE_INTR_ENABLE_ADDRESS)); in pci_dispatch_interrupt()312 PCIE_INTR_ENABLE_ADDRESS); in hif_pci_legacy_ce_interrupt_handler()328 PCIE_INTR_ENABLE_ADDRESS), 0); in hif_pci_legacy_ce_interrupt_handler()347 PCIE_INTR_ENABLE_ADDRESS)); in hif_pci_legacy_ce_interrupt_handler()644 PCIE_INTR_ENABLE_ADDRESS)); in hif_pci_device_warm_reset()646 (SOC_CORE_BASE_ADDRESS | PCIE_INTR_ENABLE_ADDRESS)), 0); in hif_pci_device_warm_reset()2085 PCIE_INTR_ENABLE_ADDRESS), in hif_pci_configure_legacy_irq()2088 PCIE_INTR_ENABLE_ADDRESS)); in hif_pci_configure_legacy_irq()2253 hif_write32_mb(sc, sc->mem + PCIE_INTR_ENABLE_ADDRESS, 0); in hif_pci_disable_bus()[all …]
435 #define PCIE_INTR_ENABLE_ADDRESS \ macro