Searched refs:SOC_LF_TIMER_CONTROL0_ADDRESS (Results 1 – 7 of 7) sorted by relevance
82 #if !defined(SOC_LF_TIMER_CONTROL0_ADDRESS)83 #define SOC_LF_TIMER_CONTROL0_ADDRESS ATH_UNSUPPORTED_REG_OFFSET macro295 .d_SOC_LF_TIMER_CONTROL0_ADDRESS = SOC_LF_TIMER_CONTROL0_ADDRESS,
169 #define SOC_LF_TIMER_CONTROL0_ADDRESS \ macro
167 #define SOC_LF_TIMER_CONTROL0_ADDRESS \ macro
663 SOC_LF_TIMER_CONTROL0_ADDRESS)); in hif_pci_device_warm_reset()665 (RTC_SOC_BASE_ADDRESS + SOC_LF_TIMER_CONTROL0_ADDRESS), val); in hif_pci_device_warm_reset()668 (RTC_SOC_BASE_ADDRESS + SOC_LF_TIMER_CONTROL0_ADDRESS), in hif_pci_device_warm_reset()
361 #define SOC_LF_TIMER_CONTROL0_ADDRESS \ macro
455 #define SOC_LF_TIMER_CONTROL0_ADDRESS \ macro
377 #define SOC_LF_TIMER_CONTROL0_ADDRESS 0x00000050 macro