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Searched refs:uint32_t (Results 1 – 25 of 3726) sorted by relevance

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/wlan-driver/qca-wifi-host-cmn/hif/inc/
H A Dreg_struct.h32 static inline bool is_register_supported(uint32_t reg) in is_register_supported()
39 uint32_t d_RTC_SOC_BASE_ADDRESS;
40 uint32_t d_RTC_WMAC_BASE_ADDRESS;
41 uint32_t d_SYSTEM_SLEEP_OFFSET;
42 uint32_t d_WLAN_SYSTEM_SLEEP_OFFSET;
43 uint32_t d_WLAN_SYSTEM_SLEEP_DISABLE_LSB;
44 uint32_t d_WLAN_SYSTEM_SLEEP_DISABLE_MASK;
45 uint32_t d_CLOCK_CONTROL_OFFSET;
46 uint32_t d_CLOCK_CONTROL_SI0_CLK_MASK;
47 uint32_t d_RESET_CONTROL_OFFSET;
[all …]
/wlan-driver/qcacld-3.0/components/cp_stats/dispatcher/inc/
H A Dwlan_cp_stats_mc_defs.h167 uint32_t ucast_wake_up_count;
168 uint32_t bcast_wake_up_count;
169 uint32_t ipv4_mcast_wake_up_count;
170 uint32_t ipv6_mcast_wake_up_count;
171 uint32_t ipv6_mcast_ra_stats;
172 uint32_t ipv6_mcast_ns_stats;
173 uint32_t ipv6_mcast_na_stats;
174 uint32_t icmpv4_count;
175 uint32_t icmpv6_count;
176 uint32_t rssi_breach_wake_up_count;
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/wlan-driver/qca-wifi-host-cmn/target_if/init_deinit/inc/
H A Dservice_ready_param.h51 uint32_t eeprom_rd;
52 uint32_t eeprom_rd_ext;
53 uint32_t regcap1;
54 uint32_t regcap2;
55 uint32_t wireless_modes;
56 uint32_t low_2ghz_chan;
57 uint32_t high_2ghz_chan;
58 uint32_t low_5ghz_chan;
59 uint32_t high_5ghz_chan;
85 uint32_t phy_capability;
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/wlan-driver/qca-wifi-host-cmn/dp/inc/
H A Dcdp_txrx_stats_struct.h885 uint32_t stats[TIDQ_STATS_MAX];
982 uint32_t rtt_che_buffer_pointer_low32;
984 uint32_t agc_gain_info0;
985 uint32_t agc_gain_info1;
986 uint32_t agc_gain_info2;
987 uint32_t agc_gain_info3;
988 uint32_t rx_start_ts;
989 uint32_t mcs_rate;
990 uint32_t gi_type;
1005 uint32_t pilot_evm[DP_RX_MAX_SU_EVM_COUNT];
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/wlan-driver/fw-api/hw/qca5424/
H A Dphyrx_other_receive_info_evm_details.h31 uint32_t number_of_data_sym : 16,
34 uint32_t acc_linear_evm_0_0 : 32;
35 uint32_t acc_linear_evm_1_0 : 32;
36 uint32_t acc_linear_evm_0_1 : 32;
37 uint32_t acc_linear_evm_1_1 : 32;
38 uint32_t acc_linear_evm_0_2 : 32;
39 uint32_t acc_linear_evm_1_2 : 32;
40 uint32_t acc_linear_evm_0_3 : 32;
41 uint32_t acc_linear_evm_1_3 : 32;
42 uint32_t acc_linear_evm_0_4 : 32;
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H A Drx_frame_1k_bitmap_ack.h31 uint32_t reserved_0a : 5,
37 uint32_t addr1_31_0 : 32;
38 uint32_t addr1_47_32 : 16,
40 uint32_t addr2_47_16 : 32;
41 uint32_t ba_ts_ctrl : 16,
43 uint32_t ba_ts_bitmap_31_0 : 32;
44 uint32_t ba_ts_bitmap_63_32 : 32;
45 uint32_t ba_ts_bitmap_95_64 : 32;
46 uint32_t ba_ts_bitmap_127_96 : 32;
47 uint32_t ba_ts_bitmap_159_128 : 32;
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/wlan-driver/qcacld-3.0/core/mac/src/include/
H A Ddot11f.h42 typedef uint32_t tDOT11F_U64[2];
433 uint32_t traffic_type:1;
434 uint32_t tsid:4;
435 uint32_t direction:2;
436 uint32_t access_policy:2;
437 uint32_t aggregation:1;
438 uint32_t psb:1;
439 uint32_t user_priority:3;
440 uint32_t tsinfo_ack_pol:2;
441 uint32_t schedule:1;
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/wlan-driver/qca-wifi-host-cmn/wmi/inc/
H A Dwmi_unified_twt_param.h96 uint32_t pdev_id;
97 uint32_t sta_cong_timer_ms;
98 uint32_t mbss_support;
99 uint32_t default_slot_size;
100 uint32_t congestion_thresh_setup;
101 uint32_t congestion_thresh_teardown;
102 uint32_t congestion_thresh_critical;
103 uint32_t interference_thresh_teardown;
104 uint32_t interference_thresh_setup;
105 uint32_t min_no_sta_setup;
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H A Dwmi_unified_param.h568 typedef uint32_t TARGET_INIT_STATUS;
587 uint8_t *event_buf, uint32_t len);
638 uint32_t mhz;
640 uint32_t band_center_freq1;
642 uint32_t band_center_freq2;
644 uint32_t info;
646 uint32_t reg_info_1;
648 uint32_t reg_info_2;
734 uint32_t mhz;
735 uint32_t half_rate:1,
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H A Dwmi_unified_sta_param.h38 uint32_t method;
39 uint32_t timeperiod;
56 uint32_t gtx_rt_mask[2];
57 uint32_t gtx_usrcfg;
58 uint32_t gtx_threshold;
59 uint32_t gtx_margin;
60 uint32_t gtx_tpcstep;
61 uint32_t gtx_tpcmin;
62 uint32_t gtx_bwmask;
102 uint32_t wlm_latency_flags;
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/wlan-driver/qca-wifi-host-cmn/hif/src/sdio/
H A Dregtable_sdio.h26 uint32_t d_RTC_SOC_BASE_ADDRESS;
27 uint32_t d_RTC_WMAC_BASE_ADDRESS;
28 uint32_t d_SYSTEM_SLEEP_OFFSET;
29 uint32_t d_WLAN_SYSTEM_SLEEP_OFFSET;
30 uint32_t d_WLAN_SYSTEM_SLEEP_DISABLE_LSB;
31 uint32_t d_WLAN_SYSTEM_SLEEP_DISABLE_MASK;
32 uint32_t d_CLOCK_CONTROL_OFFSET;
33 uint32_t d_CLOCK_CONTROL_SI0_CLK_MASK;
34 uint32_t d_RESET_CONTROL_OFFSET;
35 uint32_t d_RESET_CONTROL_MBOX_RST_MASK;
[all …]
/wlan-driver/fw-api/hw/qcn9224/v2/
H A Dphyrx_other_receive_info_all_sigb_details.h18 uint32_t pkt_type : 4, // [3:0]
22 uint32_t reserved_1a : 32; // [31:0]
23 uint32_t cc0_2user_blk_0_31_0 : 32; // [31:0]
24 uint32_t cc0_2user_blk_0_63_32 : 32; // [31:0]
25 uint32_t cc0_2user_blk_1_31_0 : 32; // [31:0]
26 uint32_t cc0_2user_blk_1_63_32 : 32; // [31:0]
27 uint32_t cc0_2user_blk_2_31_0 : 32; // [31:0]
28 uint32_t cc0_2user_blk_2_63_32 : 32; // [31:0]
29 uint32_t cc0_2user_blk_3_31_0 : 32; // [31:0]
30 uint32_t cc0_2user_blk_3_63_32 : 32; // [31:0]
[all …]
H A Drx_frame_1k_bitmap_ack.h38 uint32_t reserved_0a : 5,
44 uint32_t addr1_31_0 : 32;
45 uint32_t addr1_47_32 : 16,
47 uint32_t addr2_47_16 : 32;
48 uint32_t ba_ts_ctrl : 16,
50 uint32_t ba_ts_bitmap_31_0 : 32;
51 uint32_t ba_ts_bitmap_63_32 : 32;
52 uint32_t ba_ts_bitmap_95_64 : 32;
53 uint32_t ba_ts_bitmap_127_96 : 32;
54 uint32_t ba_ts_bitmap_159_128 : 32;
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/wlan-driver/qcacld-3.0/core/dp/htt/
H A Drx_desc.h28 uint32_t first_mpdu:1, /* [0] */
64 uint32_t ring0_more_count:8, /* [7:0] */
69 uint32_t ring4_more_count:8, /* [7:0] */
77 uint32_t msdu_length:14, /* [13:0] */
91 volatile uint32_t flow_id_toeplitz:32; /* [31:0] */
93 volatile uint32_t flow_id_crc:32; /* [31:0] */
96 uint32_t msdu_number:8, /* [7:0] */
108 uint32_t da_idx:11, /* [10:0] */
113 volatile uint32_t toeplitz_hash_2_or_4:32; /* [31:0] */
119 uint32_t ip_hdr_chksum:16, /* [15:0] */
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/wlan-driver/qca-wifi-host-cmn/umac/twt/dispatcher/inc/
H A Dwlan_twt_public_structs.h158 uint32_t pdev_id;
159 uint32_t sta_cong_timer_ms;
160 uint32_t mbss_support;
161 uint32_t default_slot_size;
162 uint32_t congestion_thresh_setup;
163 uint32_t congestion_thresh_teardown;
164 uint32_t congestion_thresh_critical;
165 uint32_t interference_thresh_teardown;
166 uint32_t interference_thresh_setup;
167 uint32_t min_no_sta_setup;
[all …]
/wlan-driver/qca-wifi-host-cmn/umac/mlme/vdev_mgr/dispatcher/inc/
H A Dwlan_vdev_mgr_tgt_if_tx_defs.h201 uint32_t vdev_id;
202 uint32_t param_id;
203 uint32_t value;
217 uint32_t beacon_intval;
218 uint32_t opclass;
219 uint32_t chan_idx;
220 uint32_t next_qtime_tbtt_high;
221 uint32_t next_qtime_tbtt_low;
233 uint32_t pdev_id;
247 uint32_t vdev_id;
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/wlan-driver/fw-api/hw/peach/v2/
H A Drx_frame_1k_bitmap_ack.h25 uint32_t reserved_0a : 5,
31 uint32_t addr1_31_0 : 32;
32 uint32_t addr1_47_32 : 16,
34 uint32_t addr2_47_16 : 32;
35 uint32_t ba_ts_ctrl : 16,
37 uint32_t ba_ts_bitmap_31_0 : 32;
38 uint32_t ba_ts_bitmap_63_32 : 32;
39 uint32_t ba_ts_bitmap_95_64 : 32;
40 uint32_t ba_ts_bitmap_127_96 : 32;
41 uint32_t ba_ts_bitmap_159_128 : 32;
[all …]
/wlan-driver/fw-api/hw/peach/v1/
H A Drx_frame_1k_bitmap_ack.h25 uint32_t reserved_0a : 5,
31 uint32_t addr1_31_0 : 32;
32 uint32_t addr1_47_32 : 16,
34 uint32_t addr2_47_16 : 32;
35 uint32_t ba_ts_ctrl : 16,
37 uint32_t ba_ts_bitmap_31_0 : 32;
38 uint32_t ba_ts_bitmap_63_32 : 32;
39 uint32_t ba_ts_bitmap_95_64 : 32;
40 uint32_t ba_ts_bitmap_127_96 : 32;
41 uint32_t ba_ts_bitmap_159_128 : 32;
[all …]
/wlan-driver/fw-api/hw/qcn6432/
H A Drx_frame_1k_bitmap_ack.h29 uint32_t reserved_0a : 5, // [4:0]
35 uint32_t addr1_31_0 : 32; // [31:0]
36 uint32_t addr1_47_32 : 16, // [15:0]
38 uint32_t addr2_47_16 : 32; // [31:0]
39 uint32_t ba_ts_ctrl : 16, // [15:0]
41 uint32_t ba_ts_bitmap_31_0 : 32; // [31:0]
42 uint32_t ba_ts_bitmap_63_32 : 32; // [31:0]
43 uint32_t ba_ts_bitmap_95_64 : 32; // [31:0]
44 uint32_t ba_ts_bitmap_127_96 : 32; // [31:0]
45 uint32_t ba_ts_bitmap_159_128 : 32; // [31:0]
[all …]
/wlan-driver/fw-api/hw/qcn9224/v1/
H A Drx_frame_1k_bitmap_ack.h38 uint32_t reserved_0a : 5,
44 uint32_t addr1_31_0 : 32;
45 uint32_t addr1_47_32 : 16,
47 uint32_t addr2_47_16 : 32;
48 uint32_t ba_ts_ctrl : 16,
50 uint32_t ba_ts_bitmap_31_0 : 32;
51 uint32_t ba_ts_bitmap_63_32 : 32;
52 uint32_t ba_ts_bitmap_95_64 : 32;
53 uint32_t ba_ts_bitmap_127_96 : 32;
54 uint32_t ba_ts_bitmap_159_128 : 32;
[all …]
H A Dtx_fes_status_1k_ba.h38 uint32_t ack_ba_status_type : 1,
46 uint32_t sw_peer_id : 16,
48 uint32_t ba_bitmap_31_0 : 32;
49 uint32_t ba_bitmap_63_32 : 32;
50 uint32_t ba_bitmap_95_64 : 32;
51 uint32_t ba_bitmap_127_96 : 32;
52 uint32_t ba_bitmap_159_128 : 32;
53 uint32_t ba_bitmap_191_160 : 32;
54 uint32_t ba_bitmap_223_192 : 32;
55 uint32_t ba_bitmap_255_224 : 32;
[all …]
/wlan-driver/fw-api/hw/qca5332/
H A Drx_frame_1k_bitmap_ack.h38 uint32_t reserved_0a : 5, // [4:0]
44 uint32_t addr1_31_0 : 32; // [31:0]
45 uint32_t addr1_47_32 : 16, // [15:0]
47 uint32_t addr2_47_16 : 32; // [31:0]
48 uint32_t ba_ts_ctrl : 16, // [15:0]
50 uint32_t ba_ts_bitmap_31_0 : 32; // [31:0]
51 uint32_t ba_ts_bitmap_63_32 : 32; // [31:0]
52 uint32_t ba_ts_bitmap_95_64 : 32; // [31:0]
53 uint32_t ba_ts_bitmap_127_96 : 32; // [31:0]
54 uint32_t ba_ts_bitmap_159_128 : 32; // [31:0]
[all …]
H A Dtx_fes_status_1k_ba.h38 uint32_t ack_ba_status_type : 1, // [0:0]
46 uint32_t sw_peer_id : 16, // [15:0]
48 uint32_t ba_bitmap_31_0 : 32; // [31:0]
49 uint32_t ba_bitmap_63_32 : 32; // [31:0]
50 uint32_t ba_bitmap_95_64 : 32; // [31:0]
51 uint32_t ba_bitmap_127_96 : 32; // [31:0]
52 uint32_t ba_bitmap_159_128 : 32; // [31:0]
53 uint32_t ba_bitmap_191_160 : 32; // [31:0]
54 uint32_t ba_bitmap_223_192 : 32; // [31:0]
55 uint32_t ba_bitmap_255_224 : 32; // [31:0]
[all …]
/wlan-driver/fw-api/hw/kiwi/v2/
H A Drx_frame_1k_bitmap_ack.h31 uint32_t reserved_0a : 5,
37 uint32_t addr1_31_0 : 32;
38 uint32_t addr1_47_32 : 16,
40 uint32_t addr2_47_16 : 32;
41 uint32_t ba_ts_ctrl : 16,
43 uint32_t ba_ts_bitmap_31_0 : 32;
44 uint32_t ba_ts_bitmap_63_32 : 32;
45 uint32_t ba_ts_bitmap_95_64 : 32;
46 uint32_t ba_ts_bitmap_127_96 : 32;
47 uint32_t ba_ts_bitmap_159_128 : 32;
[all …]
/wlan-driver/qcacld-3.0/core/mac/inc/
H A Dsir_api.h313 uint32_t session_id;
341 uint32_t command_resp;
342 uint32_t *chan_list;
359 uint32_t frequency;
552 uint32_t bw_20_rx_max_nss_for_mcs_0_to_7:4;
553 uint32_t bw_20_tx_max_nss_for_mcs_0_to_7:4;
554 uint32_t bw_20_rx_max_nss_for_mcs_8_and_9:4;
555 uint32_t bw_20_tx_max_nss_for_mcs_8_and_9:4;
556 uint32_t bw_20_rx_max_nss_for_mcs_10_and_11:4;
557 uint32_t bw_20_tx_max_nss_for_mcs_10_and_11:4;
[all …]

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