1 /*
2 * Intel & MS High Precision Event Timer Implementation.
3 *
4 * Copyright (C) 2003 Intel Corporation
5 * Venki Pallipadi
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/miscdevice.h>
18 #include <linux/major.h>
19 #include <linux/ioport.h>
20 #include <linux/fcntl.h>
21 #include <linux/init.h>
22 #include <linux/poll.h>
23 #include <linux/mm.h>
24 #include <linux/proc_fs.h>
25 #include <linux/spinlock.h>
26 #include <linux/sysctl.h>
27 #include <linux/wait.h>
28 #include <linux/sched/signal.h>
29 #include <linux/bcd.h>
30 #include <linux/seq_file.h>
31 #include <linux/bitops.h>
32 #include <linux/compat.h>
33 #include <linux/clocksource.h>
34 #include <linux/uaccess.h>
35 #include <linux/slab.h>
36 #include <linux/io.h>
37 #include <linux/acpi.h>
38 #include <linux/hpet.h>
39 #include <asm/current.h>
40 #include <asm/irq.h>
41 #include <asm/div64.h>
42
43 /*
44 * The High Precision Event Timer driver.
45 * This driver is closely modelled after the rtc.c driver.
46 * See HPET spec revision 1.
47 */
48 #define HPET_USER_FREQ (64)
49 #define HPET_DRIFT (500)
50
51 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
52
53
54 /* WARNING -- don't get confused. These macros are never used
55 * to write the (single) counter, and rarely to read it.
56 * They're badly named; to fix, someday.
57 */
58 #if BITS_PER_LONG == 64
59 #define write_counter(V, MC) writeq(V, MC)
60 #define read_counter(MC) readq(MC)
61 #else
62 #define write_counter(V, MC) writel(V, MC)
63 #define read_counter(MC) readl(MC)
64 #endif
65
66 static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
67 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
68
69 /* This clocksource driver currently only works on ia64 */
70 #ifdef CONFIG_IA64
71 static void __iomem *hpet_mctr;
72
read_hpet(struct clocksource * cs)73 static u64 read_hpet(struct clocksource *cs)
74 {
75 return (u64)read_counter((void __iomem *)hpet_mctr);
76 }
77
78 static struct clocksource clocksource_hpet = {
79 .name = "hpet",
80 .rating = 250,
81 .read = read_hpet,
82 .mask = CLOCKSOURCE_MASK(64),
83 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
84 };
85 static struct clocksource *hpet_clocksource;
86 #endif
87
88 /* A lock for concurrent access by app and isr hpet activity. */
89 static DEFINE_SPINLOCK(hpet_lock);
90
91 #define HPET_DEV_NAME (7)
92
93 struct hpet_dev {
94 struct hpets *hd_hpets;
95 struct hpet __iomem *hd_hpet;
96 struct hpet_timer __iomem *hd_timer;
97 unsigned long hd_ireqfreq;
98 unsigned long hd_irqdata;
99 wait_queue_head_t hd_waitqueue;
100 struct fasync_struct *hd_async_queue;
101 unsigned int hd_flags;
102 unsigned int hd_irq;
103 unsigned int hd_hdwirq;
104 char hd_name[HPET_DEV_NAME];
105 };
106
107 struct hpets {
108 struct hpets *hp_next;
109 struct hpet __iomem *hp_hpet;
110 unsigned long hp_hpet_phys;
111 struct clocksource *hp_clocksource;
112 unsigned long long hp_tick_freq;
113 unsigned long hp_delta;
114 unsigned int hp_ntimer;
115 unsigned int hp_which;
116 struct hpet_dev hp_dev[1];
117 };
118
119 static struct hpets *hpets;
120
121 #define HPET_OPEN 0x0001
122 #define HPET_IE 0x0002 /* interrupt enabled */
123 #define HPET_PERIODIC 0x0004
124 #define HPET_SHARED_IRQ 0x0008
125
126
127 #ifndef readq
readq(void __iomem * addr)128 static inline unsigned long long readq(void __iomem *addr)
129 {
130 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
131 }
132 #endif
133
134 #ifndef writeq
writeq(unsigned long long v,void __iomem * addr)135 static inline void writeq(unsigned long long v, void __iomem *addr)
136 {
137 writel(v & 0xffffffff, addr);
138 writel(v >> 32, addr + 4);
139 }
140 #endif
141
hpet_interrupt(int irq,void * data)142 static irqreturn_t hpet_interrupt(int irq, void *data)
143 {
144 struct hpet_dev *devp;
145 unsigned long isr;
146
147 devp = data;
148 isr = 1 << (devp - devp->hd_hpets->hp_dev);
149
150 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
151 !(isr & readl(&devp->hd_hpet->hpet_isr)))
152 return IRQ_NONE;
153
154 spin_lock(&hpet_lock);
155 devp->hd_irqdata++;
156
157 /*
158 * For non-periodic timers, increment the accumulator.
159 * This has the effect of treating non-periodic like periodic.
160 */
161 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
162 unsigned long m, t, mc, base, k;
163 struct hpet __iomem *hpet = devp->hd_hpet;
164 struct hpets *hpetp = devp->hd_hpets;
165
166 t = devp->hd_ireqfreq;
167 m = read_counter(&devp->hd_timer->hpet_compare);
168 mc = read_counter(&hpet->hpet_mc);
169 /* The time for the next interrupt would logically be t + m,
170 * however, if we are very unlucky and the interrupt is delayed
171 * for longer than t then we will completely miss the next
172 * interrupt if we set t + m and an application will hang.
173 * Therefore we need to make a more complex computation assuming
174 * that there exists a k for which the following is true:
175 * k * t + base < mc + delta
176 * (k + 1) * t + base > mc + delta
177 * where t is the interval in hpet ticks for the given freq,
178 * base is the theoretical start value 0 < base < t,
179 * mc is the main counter value at the time of the interrupt,
180 * delta is the time it takes to write the a value to the
181 * comparator.
182 * k may then be computed as (mc - base + delta) / t .
183 */
184 base = mc % t;
185 k = (mc - base + hpetp->hp_delta) / t;
186 write_counter(t * (k + 1) + base,
187 &devp->hd_timer->hpet_compare);
188 }
189
190 if (devp->hd_flags & HPET_SHARED_IRQ)
191 writel(isr, &devp->hd_hpet->hpet_isr);
192 spin_unlock(&hpet_lock);
193
194 wake_up_interruptible(&devp->hd_waitqueue);
195
196 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
197
198 return IRQ_HANDLED;
199 }
200
hpet_timer_set_irq(struct hpet_dev * devp)201 static void hpet_timer_set_irq(struct hpet_dev *devp)
202 {
203 unsigned long v;
204 int irq, gsi;
205 struct hpet_timer __iomem *timer;
206
207 spin_lock_irq(&hpet_lock);
208 if (devp->hd_hdwirq) {
209 spin_unlock_irq(&hpet_lock);
210 return;
211 }
212
213 timer = devp->hd_timer;
214
215 /* we prefer level triggered mode */
216 v = readl(&timer->hpet_config);
217 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
218 v |= Tn_INT_TYPE_CNF_MASK;
219 writel(v, &timer->hpet_config);
220 }
221 spin_unlock_irq(&hpet_lock);
222
223 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
224 Tn_INT_ROUTE_CAP_SHIFT;
225
226 /*
227 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
228 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
229 */
230 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
231 v &= ~0xf3df;
232 else
233 v &= ~0xffff;
234
235 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
236 if (irq >= nr_irqs) {
237 irq = HPET_MAX_IRQ;
238 break;
239 }
240
241 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
242 ACPI_ACTIVE_LOW);
243 if (gsi > 0)
244 break;
245
246 /* FIXME: Setup interrupt source table */
247 }
248
249 if (irq < HPET_MAX_IRQ) {
250 spin_lock_irq(&hpet_lock);
251 v = readl(&timer->hpet_config);
252 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
253 writel(v, &timer->hpet_config);
254 devp->hd_hdwirq = gsi;
255 spin_unlock_irq(&hpet_lock);
256 }
257 return;
258 }
259
hpet_open(struct inode * inode,struct file * file)260 static int hpet_open(struct inode *inode, struct file *file)
261 {
262 struct hpet_dev *devp;
263 struct hpets *hpetp;
264 int i;
265
266 if (file->f_mode & FMODE_WRITE)
267 return -EINVAL;
268
269 mutex_lock(&hpet_mutex);
270 spin_lock_irq(&hpet_lock);
271
272 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
273 for (i = 0; i < hpetp->hp_ntimer; i++)
274 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
275 continue;
276 else {
277 devp = &hpetp->hp_dev[i];
278 break;
279 }
280
281 if (!devp) {
282 spin_unlock_irq(&hpet_lock);
283 mutex_unlock(&hpet_mutex);
284 return -EBUSY;
285 }
286
287 file->private_data = devp;
288 devp->hd_irqdata = 0;
289 devp->hd_flags |= HPET_OPEN;
290 spin_unlock_irq(&hpet_lock);
291 mutex_unlock(&hpet_mutex);
292
293 hpet_timer_set_irq(devp);
294
295 return 0;
296 }
297
298 static ssize_t
hpet_read(struct file * file,char __user * buf,size_t count,loff_t * ppos)299 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
300 {
301 DECLARE_WAITQUEUE(wait, current);
302 unsigned long data;
303 ssize_t retval;
304 struct hpet_dev *devp;
305
306 devp = file->private_data;
307 if (!devp->hd_ireqfreq)
308 return -EIO;
309
310 if (count < sizeof(unsigned long))
311 return -EINVAL;
312
313 add_wait_queue(&devp->hd_waitqueue, &wait);
314
315 for ( ; ; ) {
316 set_current_state(TASK_INTERRUPTIBLE);
317
318 spin_lock_irq(&hpet_lock);
319 data = devp->hd_irqdata;
320 devp->hd_irqdata = 0;
321 spin_unlock_irq(&hpet_lock);
322
323 if (data)
324 break;
325 else if (file->f_flags & O_NONBLOCK) {
326 retval = -EAGAIN;
327 goto out;
328 } else if (signal_pending(current)) {
329 retval = -ERESTARTSYS;
330 goto out;
331 }
332 schedule();
333 }
334
335 retval = put_user(data, (unsigned long __user *)buf);
336 if (!retval)
337 retval = sizeof(unsigned long);
338 out:
339 __set_current_state(TASK_RUNNING);
340 remove_wait_queue(&devp->hd_waitqueue, &wait);
341
342 return retval;
343 }
344
hpet_poll(struct file * file,poll_table * wait)345 static __poll_t hpet_poll(struct file *file, poll_table * wait)
346 {
347 unsigned long v;
348 struct hpet_dev *devp;
349
350 devp = file->private_data;
351
352 if (!devp->hd_ireqfreq)
353 return 0;
354
355 poll_wait(file, &devp->hd_waitqueue, wait);
356
357 spin_lock_irq(&hpet_lock);
358 v = devp->hd_irqdata;
359 spin_unlock_irq(&hpet_lock);
360
361 if (v != 0)
362 return EPOLLIN | EPOLLRDNORM;
363
364 return 0;
365 }
366
367 #ifdef CONFIG_HPET_MMAP
368 #ifdef CONFIG_HPET_MMAP_DEFAULT
369 static int hpet_mmap_enabled = 1;
370 #else
371 static int hpet_mmap_enabled = 0;
372 #endif
373
hpet_mmap_enable(char * str)374 static __init int hpet_mmap_enable(char *str)
375 {
376 get_option(&str, &hpet_mmap_enabled);
377 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
378 return 1;
379 }
380 __setup("hpet_mmap=", hpet_mmap_enable);
381
hpet_mmap(struct file * file,struct vm_area_struct * vma)382 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
383 {
384 struct hpet_dev *devp;
385 unsigned long addr;
386
387 if (!hpet_mmap_enabled)
388 return -EACCES;
389
390 devp = file->private_data;
391 addr = devp->hd_hpets->hp_hpet_phys;
392
393 if (addr & (PAGE_SIZE - 1))
394 return -ENOSYS;
395
396 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
397 return vm_iomap_memory(vma, addr, PAGE_SIZE);
398 }
399 #else
hpet_mmap(struct file * file,struct vm_area_struct * vma)400 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
401 {
402 return -ENOSYS;
403 }
404 #endif
405
hpet_fasync(int fd,struct file * file,int on)406 static int hpet_fasync(int fd, struct file *file, int on)
407 {
408 struct hpet_dev *devp;
409
410 devp = file->private_data;
411
412 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
413 return 0;
414 else
415 return -EIO;
416 }
417
hpet_release(struct inode * inode,struct file * file)418 static int hpet_release(struct inode *inode, struct file *file)
419 {
420 struct hpet_dev *devp;
421 struct hpet_timer __iomem *timer;
422 int irq = 0;
423
424 devp = file->private_data;
425 timer = devp->hd_timer;
426
427 spin_lock_irq(&hpet_lock);
428
429 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
430 &timer->hpet_config);
431
432 irq = devp->hd_irq;
433 devp->hd_irq = 0;
434
435 devp->hd_ireqfreq = 0;
436
437 if (devp->hd_flags & HPET_PERIODIC
438 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
439 unsigned long v;
440
441 v = readq(&timer->hpet_config);
442 v ^= Tn_TYPE_CNF_MASK;
443 writeq(v, &timer->hpet_config);
444 }
445
446 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
447 spin_unlock_irq(&hpet_lock);
448
449 if (irq)
450 free_irq(irq, devp);
451
452 file->private_data = NULL;
453 return 0;
454 }
455
hpet_ioctl_ieon(struct hpet_dev * devp)456 static int hpet_ioctl_ieon(struct hpet_dev *devp)
457 {
458 struct hpet_timer __iomem *timer;
459 struct hpet __iomem *hpet;
460 struct hpets *hpetp;
461 int irq;
462 unsigned long g, v, t, m;
463 unsigned long flags, isr;
464
465 timer = devp->hd_timer;
466 hpet = devp->hd_hpet;
467 hpetp = devp->hd_hpets;
468
469 if (!devp->hd_ireqfreq)
470 return -EIO;
471
472 spin_lock_irq(&hpet_lock);
473
474 if (devp->hd_flags & HPET_IE) {
475 spin_unlock_irq(&hpet_lock);
476 return -EBUSY;
477 }
478
479 devp->hd_flags |= HPET_IE;
480
481 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
482 devp->hd_flags |= HPET_SHARED_IRQ;
483 spin_unlock_irq(&hpet_lock);
484
485 irq = devp->hd_hdwirq;
486
487 if (irq) {
488 unsigned long irq_flags;
489
490 if (devp->hd_flags & HPET_SHARED_IRQ) {
491 /*
492 * To prevent the interrupt handler from seeing an
493 * unwanted interrupt status bit, program the timer
494 * so that it will not fire in the near future ...
495 */
496 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
497 &timer->hpet_config);
498 write_counter(read_counter(&hpet->hpet_mc),
499 &timer->hpet_compare);
500 /* ... and clear any left-over status. */
501 isr = 1 << (devp - devp->hd_hpets->hp_dev);
502 writel(isr, &hpet->hpet_isr);
503 }
504
505 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
506 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
507 if (request_irq(irq, hpet_interrupt, irq_flags,
508 devp->hd_name, (void *)devp)) {
509 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
510 irq = 0;
511 }
512 }
513
514 if (irq == 0) {
515 spin_lock_irq(&hpet_lock);
516 devp->hd_flags ^= HPET_IE;
517 spin_unlock_irq(&hpet_lock);
518 return -EIO;
519 }
520
521 devp->hd_irq = irq;
522 t = devp->hd_ireqfreq;
523 v = readq(&timer->hpet_config);
524
525 /* 64-bit comparators are not yet supported through the ioctls,
526 * so force this into 32-bit mode if it supports both modes
527 */
528 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
529
530 if (devp->hd_flags & HPET_PERIODIC) {
531 g |= Tn_TYPE_CNF_MASK;
532 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
533 writeq(v, &timer->hpet_config);
534 local_irq_save(flags);
535
536 /*
537 * NOTE: First we modify the hidden accumulator
538 * register supported by periodic-capable comparators.
539 * We never want to modify the (single) counter; that
540 * would affect all the comparators. The value written
541 * is the counter value when the first interrupt is due.
542 */
543 m = read_counter(&hpet->hpet_mc);
544 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
545 /*
546 * Then we modify the comparator, indicating the period
547 * for subsequent interrupt.
548 */
549 write_counter(t, &timer->hpet_compare);
550 } else {
551 local_irq_save(flags);
552 m = read_counter(&hpet->hpet_mc);
553 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
554 }
555
556 if (devp->hd_flags & HPET_SHARED_IRQ) {
557 isr = 1 << (devp - devp->hd_hpets->hp_dev);
558 writel(isr, &hpet->hpet_isr);
559 }
560 writeq(g, &timer->hpet_config);
561 local_irq_restore(flags);
562
563 return 0;
564 }
565
566 /* converts Hz to number of timer ticks */
hpet_time_div(struct hpets * hpets,unsigned long dis)567 static inline unsigned long hpet_time_div(struct hpets *hpets,
568 unsigned long dis)
569 {
570 unsigned long long m;
571
572 m = hpets->hp_tick_freq + (dis >> 1);
573 return div64_ul(m, dis);
574 }
575
576 static int
hpet_ioctl_common(struct hpet_dev * devp,unsigned int cmd,unsigned long arg,struct hpet_info * info)577 hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg,
578 struct hpet_info *info)
579 {
580 struct hpet_timer __iomem *timer;
581 struct hpets *hpetp;
582 int err;
583 unsigned long v;
584
585 switch (cmd) {
586 case HPET_IE_OFF:
587 case HPET_INFO:
588 case HPET_EPI:
589 case HPET_DPI:
590 case HPET_IRQFREQ:
591 timer = devp->hd_timer;
592 hpetp = devp->hd_hpets;
593 break;
594 case HPET_IE_ON:
595 return hpet_ioctl_ieon(devp);
596 default:
597 return -EINVAL;
598 }
599
600 err = 0;
601
602 switch (cmd) {
603 case HPET_IE_OFF:
604 if ((devp->hd_flags & HPET_IE) == 0)
605 break;
606 v = readq(&timer->hpet_config);
607 v &= ~Tn_INT_ENB_CNF_MASK;
608 writeq(v, &timer->hpet_config);
609 if (devp->hd_irq) {
610 free_irq(devp->hd_irq, devp);
611 devp->hd_irq = 0;
612 }
613 devp->hd_flags ^= HPET_IE;
614 break;
615 case HPET_INFO:
616 {
617 memset(info, 0, sizeof(*info));
618 if (devp->hd_ireqfreq)
619 info->hi_ireqfreq =
620 hpet_time_div(hpetp, devp->hd_ireqfreq);
621 info->hi_flags =
622 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
623 info->hi_hpet = hpetp->hp_which;
624 info->hi_timer = devp - hpetp->hp_dev;
625 break;
626 }
627 case HPET_EPI:
628 v = readq(&timer->hpet_config);
629 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
630 err = -ENXIO;
631 break;
632 }
633 devp->hd_flags |= HPET_PERIODIC;
634 break;
635 case HPET_DPI:
636 v = readq(&timer->hpet_config);
637 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
638 err = -ENXIO;
639 break;
640 }
641 if (devp->hd_flags & HPET_PERIODIC &&
642 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
643 v = readq(&timer->hpet_config);
644 v ^= Tn_TYPE_CNF_MASK;
645 writeq(v, &timer->hpet_config);
646 }
647 devp->hd_flags &= ~HPET_PERIODIC;
648 break;
649 case HPET_IRQFREQ:
650 if ((arg > hpet_max_freq) &&
651 !capable(CAP_SYS_RESOURCE)) {
652 err = -EACCES;
653 break;
654 }
655
656 if (!arg) {
657 err = -EINVAL;
658 break;
659 }
660
661 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
662 }
663
664 return err;
665 }
666
667 static long
hpet_ioctl(struct file * file,unsigned int cmd,unsigned long arg)668 hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
669 {
670 struct hpet_info info;
671 int err;
672
673 mutex_lock(&hpet_mutex);
674 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
675 mutex_unlock(&hpet_mutex);
676
677 if ((cmd == HPET_INFO) && !err &&
678 (copy_to_user((void __user *)arg, &info, sizeof(info))))
679 err = -EFAULT;
680
681 return err;
682 }
683
684 #ifdef CONFIG_COMPAT
685 struct compat_hpet_info {
686 compat_ulong_t hi_ireqfreq; /* Hz */
687 compat_ulong_t hi_flags; /* information */
688 unsigned short hi_hpet;
689 unsigned short hi_timer;
690 };
691
692 static long
hpet_compat_ioctl(struct file * file,unsigned int cmd,unsigned long arg)693 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
694 {
695 struct hpet_info info;
696 int err;
697
698 mutex_lock(&hpet_mutex);
699 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
700 mutex_unlock(&hpet_mutex);
701
702 if ((cmd == HPET_INFO) && !err) {
703 struct compat_hpet_info __user *u = compat_ptr(arg);
704 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
705 put_user(info.hi_flags, &u->hi_flags) ||
706 put_user(info.hi_hpet, &u->hi_hpet) ||
707 put_user(info.hi_timer, &u->hi_timer))
708 err = -EFAULT;
709 }
710
711 return err;
712 }
713 #endif
714
715 static const struct file_operations hpet_fops = {
716 .owner = THIS_MODULE,
717 .llseek = no_llseek,
718 .read = hpet_read,
719 .poll = hpet_poll,
720 .unlocked_ioctl = hpet_ioctl,
721 #ifdef CONFIG_COMPAT
722 .compat_ioctl = hpet_compat_ioctl,
723 #endif
724 .open = hpet_open,
725 .release = hpet_release,
726 .fasync = hpet_fasync,
727 .mmap = hpet_mmap,
728 };
729
hpet_is_known(struct hpet_data * hdp)730 static int hpet_is_known(struct hpet_data *hdp)
731 {
732 struct hpets *hpetp;
733
734 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
735 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
736 return 1;
737
738 return 0;
739 }
740
741 static struct ctl_table hpet_table[] = {
742 {
743 .procname = "max-user-freq",
744 .data = &hpet_max_freq,
745 .maxlen = sizeof(int),
746 .mode = 0644,
747 .proc_handler = proc_dointvec,
748 },
749 {}
750 };
751
752 static struct ctl_table hpet_root[] = {
753 {
754 .procname = "hpet",
755 .maxlen = 0,
756 .mode = 0555,
757 .child = hpet_table,
758 },
759 {}
760 };
761
762 static struct ctl_table dev_root[] = {
763 {
764 .procname = "dev",
765 .maxlen = 0,
766 .mode = 0555,
767 .child = hpet_root,
768 },
769 {}
770 };
771
772 static struct ctl_table_header *sysctl_header;
773
774 /*
775 * Adjustment for when arming the timer with
776 * initial conditions. That is, main counter
777 * ticks expired before interrupts are enabled.
778 */
779 #define TICK_CALIBRATE (1000UL)
780
__hpet_calibrate(struct hpets * hpetp)781 static unsigned long __hpet_calibrate(struct hpets *hpetp)
782 {
783 struct hpet_timer __iomem *timer = NULL;
784 unsigned long t, m, count, i, flags, start;
785 struct hpet_dev *devp;
786 int j;
787 struct hpet __iomem *hpet;
788
789 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
790 if ((devp->hd_flags & HPET_OPEN) == 0) {
791 timer = devp->hd_timer;
792 break;
793 }
794
795 if (!timer)
796 return 0;
797
798 hpet = hpetp->hp_hpet;
799 t = read_counter(&timer->hpet_compare);
800
801 i = 0;
802 count = hpet_time_div(hpetp, TICK_CALIBRATE);
803
804 local_irq_save(flags);
805
806 start = read_counter(&hpet->hpet_mc);
807
808 do {
809 m = read_counter(&hpet->hpet_mc);
810 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
811 } while (i++, (m - start) < count);
812
813 local_irq_restore(flags);
814
815 return (m - start) / i;
816 }
817
hpet_calibrate(struct hpets * hpetp)818 static unsigned long hpet_calibrate(struct hpets *hpetp)
819 {
820 unsigned long ret = ~0UL;
821 unsigned long tmp;
822
823 /*
824 * Try to calibrate until return value becomes stable small value.
825 * If SMI interruption occurs in calibration loop, the return value
826 * will be big. This avoids its impact.
827 */
828 for ( ; ; ) {
829 tmp = __hpet_calibrate(hpetp);
830 if (ret <= tmp)
831 break;
832 ret = tmp;
833 }
834
835 return ret;
836 }
837
hpet_alloc(struct hpet_data * hdp)838 int hpet_alloc(struct hpet_data *hdp)
839 {
840 u64 cap, mcfg;
841 struct hpet_dev *devp;
842 u32 i, ntimer;
843 struct hpets *hpetp;
844 size_t siz;
845 struct hpet __iomem *hpet;
846 static struct hpets *last;
847 unsigned long period;
848 unsigned long long temp;
849 u32 remainder;
850
851 /*
852 * hpet_alloc can be called by platform dependent code.
853 * If platform dependent code has allocated the hpet that
854 * ACPI has also reported, then we catch it here.
855 */
856 if (hpet_is_known(hdp)) {
857 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
858 __func__);
859 return 0;
860 }
861
862 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
863 sizeof(struct hpet_dev));
864
865 hpetp = kzalloc(siz, GFP_KERNEL);
866
867 if (!hpetp)
868 return -ENOMEM;
869
870 hpetp->hp_which = hpet_nhpet++;
871 hpetp->hp_hpet = hdp->hd_address;
872 hpetp->hp_hpet_phys = hdp->hd_phys_address;
873
874 hpetp->hp_ntimer = hdp->hd_nirqs;
875
876 for (i = 0; i < hdp->hd_nirqs; i++)
877 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
878
879 hpet = hpetp->hp_hpet;
880
881 cap = readq(&hpet->hpet_cap);
882
883 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
884
885 if (hpetp->hp_ntimer != ntimer) {
886 printk(KERN_WARNING "hpet: number irqs doesn't agree"
887 " with number of timers\n");
888 kfree(hpetp);
889 return -ENODEV;
890 }
891
892 if (last)
893 last->hp_next = hpetp;
894 else
895 hpets = hpetp;
896
897 last = hpetp;
898
899 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
900 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
901 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
902 temp += period >> 1; /* round */
903 do_div(temp, period);
904 hpetp->hp_tick_freq = temp; /* ticks per second */
905
906 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
907 hpetp->hp_which, hdp->hd_phys_address,
908 hpetp->hp_ntimer > 1 ? "s" : "");
909 for (i = 0; i < hpetp->hp_ntimer; i++)
910 printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
911 printk(KERN_CONT "\n");
912
913 temp = hpetp->hp_tick_freq;
914 remainder = do_div(temp, 1000000);
915 printk(KERN_INFO
916 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
917 hpetp->hp_which, hpetp->hp_ntimer,
918 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
919 (unsigned) temp, remainder);
920
921 mcfg = readq(&hpet->hpet_config);
922 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
923 write_counter(0L, &hpet->hpet_mc);
924 mcfg |= HPET_ENABLE_CNF_MASK;
925 writeq(mcfg, &hpet->hpet_config);
926 }
927
928 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
929 struct hpet_timer __iomem *timer;
930
931 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
932
933 devp->hd_hpets = hpetp;
934 devp->hd_hpet = hpet;
935 devp->hd_timer = timer;
936
937 /*
938 * If the timer was reserved by platform code,
939 * then make timer unavailable for opens.
940 */
941 if (hdp->hd_state & (1 << i)) {
942 devp->hd_flags = HPET_OPEN;
943 continue;
944 }
945
946 init_waitqueue_head(&devp->hd_waitqueue);
947 }
948
949 hpetp->hp_delta = hpet_calibrate(hpetp);
950
951 /* This clocksource driver currently only works on ia64 */
952 #ifdef CONFIG_IA64
953 if (!hpet_clocksource) {
954 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
955 clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
956 clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
957 hpetp->hp_clocksource = &clocksource_hpet;
958 hpet_clocksource = &clocksource_hpet;
959 }
960 #endif
961
962 return 0;
963 }
964
hpet_resources(struct acpi_resource * res,void * data)965 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
966 {
967 struct hpet_data *hdp;
968 acpi_status status;
969 struct acpi_resource_address64 addr;
970
971 hdp = data;
972
973 status = acpi_resource_to_address64(res, &addr);
974
975 if (ACPI_SUCCESS(status)) {
976 hdp->hd_phys_address = addr.address.minimum;
977 hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length);
978 if (!hdp->hd_address)
979 return AE_ERROR;
980
981 if (hpet_is_known(hdp)) {
982 iounmap(hdp->hd_address);
983 return AE_ALREADY_EXISTS;
984 }
985 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
986 struct acpi_resource_fixed_memory32 *fixmem32;
987
988 fixmem32 = &res->data.fixed_memory32;
989
990 hdp->hd_phys_address = fixmem32->address;
991 hdp->hd_address = ioremap(fixmem32->address,
992 HPET_RANGE_SIZE);
993 if (!hdp->hd_address)
994 return AE_ERROR;
995
996 if (hpet_is_known(hdp)) {
997 iounmap(hdp->hd_address);
998 return AE_ALREADY_EXISTS;
999 }
1000 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
1001 struct acpi_resource_extended_irq *irqp;
1002 int i, irq;
1003
1004 irqp = &res->data.extended_irq;
1005
1006 for (i = 0; i < irqp->interrupt_count; i++) {
1007 if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
1008 break;
1009
1010 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
1011 irqp->triggering, irqp->polarity);
1012 if (irq < 0)
1013 return AE_ERROR;
1014
1015 hdp->hd_irq[hdp->hd_nirqs] = irq;
1016 hdp->hd_nirqs++;
1017 }
1018 }
1019
1020 return AE_OK;
1021 }
1022
hpet_acpi_add(struct acpi_device * device)1023 static int hpet_acpi_add(struct acpi_device *device)
1024 {
1025 acpi_status result;
1026 struct hpet_data data;
1027
1028 memset(&data, 0, sizeof(data));
1029
1030 result =
1031 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
1032 hpet_resources, &data);
1033
1034 if (ACPI_FAILURE(result))
1035 return -ENODEV;
1036
1037 if (!data.hd_address || !data.hd_nirqs) {
1038 if (data.hd_address)
1039 iounmap(data.hd_address);
1040 printk("%s: no address or irqs in _CRS\n", __func__);
1041 return -ENODEV;
1042 }
1043
1044 return hpet_alloc(&data);
1045 }
1046
1047 static const struct acpi_device_id hpet_device_ids[] = {
1048 {"PNP0103", 0},
1049 {"", 0},
1050 };
1051
1052 static struct acpi_driver hpet_acpi_driver = {
1053 .name = "hpet",
1054 .ids = hpet_device_ids,
1055 .ops = {
1056 .add = hpet_acpi_add,
1057 },
1058 };
1059
1060 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1061
hpet_init(void)1062 static int __init hpet_init(void)
1063 {
1064 int result;
1065
1066 result = misc_register(&hpet_misc);
1067 if (result < 0)
1068 return -ENODEV;
1069
1070 sysctl_header = register_sysctl_table(dev_root);
1071
1072 result = acpi_bus_register_driver(&hpet_acpi_driver);
1073 if (result < 0) {
1074 if (sysctl_header)
1075 unregister_sysctl_table(sysctl_header);
1076 misc_deregister(&hpet_misc);
1077 return result;
1078 }
1079
1080 return 0;
1081 }
1082 device_initcall(hpet_init);
1083
1084 /*
1085 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1086 MODULE_LICENSE("GPL");
1087 */
1088