1 /*
2 * Copyright (C) 2014 Intel Corporation
3 *
4 * Authors:
5 * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
6 *
7 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
8 *
9 * This device driver implements the TPM interface as defined in
10 * the TCG CRB 2.0 TPM specification.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; version 2
15 * of the License.
16 */
17
18 #include <linux/acpi.h>
19 #include <linux/highmem.h>
20 #include <linux/rculist.h>
21 #include <linux/module.h>
22 #include <linux/pm_runtime.h>
23 #ifdef CONFIG_ARM64
24 #include <linux/arm-smccc.h>
25 #endif
26 #include "tpm.h"
27
28 #define ACPI_SIG_TPM2 "TPM2"
29 #define TPM_CRB_MAX_RESOURCES 3
30
31 static const guid_t crb_acpi_start_guid =
32 GUID_INIT(0x6BBF6CAB, 0x5463, 0x4714,
33 0xB7, 0xCD, 0xF0, 0x20, 0x3C, 0x03, 0x68, 0xD4);
34
35 enum crb_defaults {
36 CRB_ACPI_START_REVISION_ID = 1,
37 CRB_ACPI_START_INDEX = 1,
38 };
39
40 enum crb_loc_ctrl {
41 CRB_LOC_CTRL_REQUEST_ACCESS = BIT(0),
42 CRB_LOC_CTRL_RELINQUISH = BIT(1),
43 };
44
45 enum crb_loc_state {
46 CRB_LOC_STATE_LOC_ASSIGNED = BIT(1),
47 CRB_LOC_STATE_TPM_REG_VALID_STS = BIT(7),
48 };
49
50 enum crb_ctrl_req {
51 CRB_CTRL_REQ_CMD_READY = BIT(0),
52 CRB_CTRL_REQ_GO_IDLE = BIT(1),
53 };
54
55 enum crb_ctrl_sts {
56 CRB_CTRL_STS_ERROR = BIT(0),
57 CRB_CTRL_STS_TPM_IDLE = BIT(1),
58 };
59
60 enum crb_start {
61 CRB_START_INVOKE = BIT(0),
62 };
63
64 enum crb_cancel {
65 CRB_CANCEL_INVOKE = BIT(0),
66 };
67
68 struct crb_regs_head {
69 u32 loc_state;
70 u32 reserved1;
71 u32 loc_ctrl;
72 u32 loc_sts;
73 u8 reserved2[32];
74 u64 intf_id;
75 u64 ctrl_ext;
76 } __packed;
77
78 struct crb_regs_tail {
79 u32 ctrl_req;
80 u32 ctrl_sts;
81 u32 ctrl_cancel;
82 u32 ctrl_start;
83 u32 ctrl_int_enable;
84 u32 ctrl_int_sts;
85 u32 ctrl_cmd_size;
86 u32 ctrl_cmd_pa_low;
87 u32 ctrl_cmd_pa_high;
88 u32 ctrl_rsp_size;
89 u64 ctrl_rsp_pa;
90 } __packed;
91
92 enum crb_status {
93 CRB_DRV_STS_COMPLETE = BIT(0),
94 };
95
96 struct crb_priv {
97 u32 sm;
98 const char *hid;
99 struct crb_regs_head __iomem *regs_h;
100 struct crb_regs_tail __iomem *regs_t;
101 u8 __iomem *cmd;
102 u8 __iomem *rsp;
103 u32 cmd_size;
104 u32 smc_func_id;
105 };
106
107 struct tpm2_crb_smc {
108 u32 interrupt;
109 u8 interrupt_flags;
110 u8 op_flags;
111 u16 reserved2;
112 u32 smc_func_id;
113 };
114
crb_wait_for_reg_32(u32 __iomem * reg,u32 mask,u32 value,unsigned long timeout)115 static bool crb_wait_for_reg_32(u32 __iomem *reg, u32 mask, u32 value,
116 unsigned long timeout)
117 {
118 ktime_t start;
119 ktime_t stop;
120
121 start = ktime_get();
122 stop = ktime_add(start, ms_to_ktime(timeout));
123
124 do {
125 if ((ioread32(reg) & mask) == value)
126 return true;
127
128 usleep_range(50, 100);
129 } while (ktime_before(ktime_get(), stop));
130
131 return ((ioread32(reg) & mask) == value);
132 }
133
134 /**
135 * __crb_go_idle - request tpm crb device to go the idle state
136 *
137 * @dev: crb device
138 * @priv: crb private data
139 *
140 * Write CRB_CTRL_REQ_GO_IDLE to TPM_CRB_CTRL_REQ
141 * The device should respond within TIMEOUT_C by clearing the bit.
142 * Anyhow, we do not wait here as a consequent CMD_READY request
143 * will be handled correctly even if idle was not completed.
144 *
145 * The function does nothing for devices with ACPI-start method
146 * or SMC-start method.
147 *
148 * Return: 0 always
149 */
__crb_go_idle(struct device * dev,struct crb_priv * priv)150 static int __crb_go_idle(struct device *dev, struct crb_priv *priv)
151 {
152 if ((priv->sm == ACPI_TPM2_START_METHOD) ||
153 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) ||
154 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC))
155 return 0;
156
157 iowrite32(CRB_CTRL_REQ_GO_IDLE, &priv->regs_t->ctrl_req);
158
159 if (!crb_wait_for_reg_32(&priv->regs_t->ctrl_req,
160 CRB_CTRL_REQ_GO_IDLE/* mask */,
161 0, /* value */
162 TPM2_TIMEOUT_C)) {
163 dev_warn(dev, "goIdle timed out\n");
164 return -ETIME;
165 }
166
167 return 0;
168 }
169
crb_go_idle(struct tpm_chip * chip)170 static int crb_go_idle(struct tpm_chip *chip)
171 {
172 struct device *dev = &chip->dev;
173 struct crb_priv *priv = dev_get_drvdata(dev);
174
175 return __crb_go_idle(dev, priv);
176 }
177
178 /**
179 * __crb_cmd_ready - request tpm crb device to enter ready state
180 *
181 * @dev: crb device
182 * @priv: crb private data
183 *
184 * Write CRB_CTRL_REQ_CMD_READY to TPM_CRB_CTRL_REQ
185 * and poll till the device acknowledge it by clearing the bit.
186 * The device should respond within TIMEOUT_C.
187 *
188 * The function does nothing for devices with ACPI-start method
189 * or SMC-start method.
190 *
191 * Return: 0 on success -ETIME on timeout;
192 */
__crb_cmd_ready(struct device * dev,struct crb_priv * priv)193 static int __crb_cmd_ready(struct device *dev, struct crb_priv *priv)
194 {
195 if ((priv->sm == ACPI_TPM2_START_METHOD) ||
196 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) ||
197 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC))
198 return 0;
199
200 iowrite32(CRB_CTRL_REQ_CMD_READY, &priv->regs_t->ctrl_req);
201 if (!crb_wait_for_reg_32(&priv->regs_t->ctrl_req,
202 CRB_CTRL_REQ_CMD_READY /* mask */,
203 0, /* value */
204 TPM2_TIMEOUT_C)) {
205 dev_warn(dev, "cmdReady timed out\n");
206 return -ETIME;
207 }
208
209 return 0;
210 }
211
crb_cmd_ready(struct tpm_chip * chip)212 static int crb_cmd_ready(struct tpm_chip *chip)
213 {
214 struct device *dev = &chip->dev;
215 struct crb_priv *priv = dev_get_drvdata(dev);
216
217 return __crb_cmd_ready(dev, priv);
218 }
219
__crb_request_locality(struct device * dev,struct crb_priv * priv,int loc)220 static int __crb_request_locality(struct device *dev,
221 struct crb_priv *priv, int loc)
222 {
223 u32 value = CRB_LOC_STATE_LOC_ASSIGNED |
224 CRB_LOC_STATE_TPM_REG_VALID_STS;
225
226 if (!priv->regs_h)
227 return 0;
228
229 iowrite32(CRB_LOC_CTRL_REQUEST_ACCESS, &priv->regs_h->loc_ctrl);
230 if (!crb_wait_for_reg_32(&priv->regs_h->loc_state, value, value,
231 TPM2_TIMEOUT_C)) {
232 dev_warn(dev, "TPM_LOC_STATE_x.requestAccess timed out\n");
233 return -ETIME;
234 }
235
236 return 0;
237 }
238
crb_request_locality(struct tpm_chip * chip,int loc)239 static int crb_request_locality(struct tpm_chip *chip, int loc)
240 {
241 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
242
243 return __crb_request_locality(&chip->dev, priv, loc);
244 }
245
__crb_relinquish_locality(struct device * dev,struct crb_priv * priv,int loc)246 static int __crb_relinquish_locality(struct device *dev,
247 struct crb_priv *priv, int loc)
248 {
249 u32 mask = CRB_LOC_STATE_LOC_ASSIGNED |
250 CRB_LOC_STATE_TPM_REG_VALID_STS;
251 u32 value = CRB_LOC_STATE_TPM_REG_VALID_STS;
252
253 if (!priv->regs_h)
254 return 0;
255
256 iowrite32(CRB_LOC_CTRL_RELINQUISH, &priv->regs_h->loc_ctrl);
257 if (!crb_wait_for_reg_32(&priv->regs_h->loc_state, mask, value,
258 TPM2_TIMEOUT_C)) {
259 dev_warn(dev, "TPM_LOC_STATE_x.Relinquish timed out\n");
260 return -ETIME;
261 }
262
263 return 0;
264 }
265
crb_relinquish_locality(struct tpm_chip * chip,int loc)266 static int crb_relinquish_locality(struct tpm_chip *chip, int loc)
267 {
268 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
269
270 return __crb_relinquish_locality(&chip->dev, priv, loc);
271 }
272
crb_status(struct tpm_chip * chip)273 static u8 crb_status(struct tpm_chip *chip)
274 {
275 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
276 u8 sts = 0;
277
278 if ((ioread32(&priv->regs_t->ctrl_start) & CRB_START_INVOKE) !=
279 CRB_START_INVOKE)
280 sts |= CRB_DRV_STS_COMPLETE;
281
282 return sts;
283 }
284
crb_recv(struct tpm_chip * chip,u8 * buf,size_t count)285 static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count)
286 {
287 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
288 unsigned int expected;
289
290 /* A sanity check that the upper layer wants to get at least the header
291 * as that is the minimum size for any TPM response.
292 */
293 if (count < TPM_HEADER_SIZE)
294 return -EIO;
295
296 /* If this bit is set, according to the spec, the TPM is in
297 * unrecoverable condition.
298 */
299 if (ioread32(&priv->regs_t->ctrl_sts) & CRB_CTRL_STS_ERROR)
300 return -EIO;
301
302 /* Read the first 8 bytes in order to get the length of the response.
303 * We read exactly a quad word in order to make sure that the remaining
304 * reads will be aligned.
305 */
306 memcpy_fromio(buf, priv->rsp, 8);
307
308 expected = be32_to_cpup((__be32 *)&buf[2]);
309 if (expected > count || expected < TPM_HEADER_SIZE)
310 return -EIO;
311
312 memcpy_fromio(&buf[8], &priv->rsp[8], expected - 8);
313
314 return expected;
315 }
316
crb_do_acpi_start(struct tpm_chip * chip)317 static int crb_do_acpi_start(struct tpm_chip *chip)
318 {
319 union acpi_object *obj;
320 int rc;
321
322 obj = acpi_evaluate_dsm(chip->acpi_dev_handle,
323 &crb_acpi_start_guid,
324 CRB_ACPI_START_REVISION_ID,
325 CRB_ACPI_START_INDEX,
326 NULL);
327 if (!obj)
328 return -ENXIO;
329 rc = obj->integer.value == 0 ? 0 : -ENXIO;
330 ACPI_FREE(obj);
331 return rc;
332 }
333
334 #ifdef CONFIG_ARM64
335 /*
336 * This is a TPM Command Response Buffer start method that invokes a
337 * Secure Monitor Call to requrest the firmware to execute or cancel
338 * a TPM 2.0 command.
339 */
tpm_crb_smc_start(struct device * dev,unsigned long func_id)340 static int tpm_crb_smc_start(struct device *dev, unsigned long func_id)
341 {
342 struct arm_smccc_res res;
343
344 arm_smccc_smc(func_id, 0, 0, 0, 0, 0, 0, 0, &res);
345 if (res.a0 != 0) {
346 dev_err(dev,
347 FW_BUG "tpm_crb_smc_start() returns res.a0 = 0x%lx\n",
348 res.a0);
349 return -EIO;
350 }
351
352 return 0;
353 }
354 #else
tpm_crb_smc_start(struct device * dev,unsigned long func_id)355 static int tpm_crb_smc_start(struct device *dev, unsigned long func_id)
356 {
357 dev_err(dev, FW_BUG "tpm_crb: incorrect start method\n");
358 return -EINVAL;
359 }
360 #endif
361
crb_send(struct tpm_chip * chip,u8 * buf,size_t len)362 static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len)
363 {
364 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
365 int rc = 0;
366
367 /* Zero the cancel register so that the next command will not get
368 * canceled.
369 */
370 iowrite32(0, &priv->regs_t->ctrl_cancel);
371
372 if (len > priv->cmd_size) {
373 dev_err(&chip->dev, "invalid command count value %zd %d\n",
374 len, priv->cmd_size);
375 return -E2BIG;
376 }
377
378 memcpy_toio(priv->cmd, buf, len);
379
380 /* Make sure that cmd is populated before issuing start. */
381 wmb();
382
383 /* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs
384 * report only ACPI start but in practice seems to require both
385 * CRB start, hence invoking CRB start method if hid == MSFT0101.
386 */
387 if ((priv->sm == ACPI_TPM2_COMMAND_BUFFER) ||
388 (priv->sm == ACPI_TPM2_MEMORY_MAPPED) ||
389 (!strcmp(priv->hid, "MSFT0101")))
390 iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start);
391
392 if ((priv->sm == ACPI_TPM2_START_METHOD) ||
393 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD))
394 rc = crb_do_acpi_start(chip);
395
396 if (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) {
397 iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start);
398 rc = tpm_crb_smc_start(&chip->dev, priv->smc_func_id);
399 }
400
401 return rc;
402 }
403
crb_cancel(struct tpm_chip * chip)404 static void crb_cancel(struct tpm_chip *chip)
405 {
406 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
407
408 iowrite32(CRB_CANCEL_INVOKE, &priv->regs_t->ctrl_cancel);
409
410 if (((priv->sm == ACPI_TPM2_START_METHOD) ||
411 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD)) &&
412 crb_do_acpi_start(chip))
413 dev_err(&chip->dev, "ACPI Start failed\n");
414 }
415
crb_req_canceled(struct tpm_chip * chip,u8 status)416 static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
417 {
418 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
419 u32 cancel = ioread32(&priv->regs_t->ctrl_cancel);
420
421 return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;
422 }
423
424 static const struct tpm_class_ops tpm_crb = {
425 .flags = TPM_OPS_AUTO_STARTUP,
426 .status = crb_status,
427 .recv = crb_recv,
428 .send = crb_send,
429 .cancel = crb_cancel,
430 .req_canceled = crb_req_canceled,
431 .go_idle = crb_go_idle,
432 .cmd_ready = crb_cmd_ready,
433 .request_locality = crb_request_locality,
434 .relinquish_locality = crb_relinquish_locality,
435 .req_complete_mask = CRB_DRV_STS_COMPLETE,
436 .req_complete_val = CRB_DRV_STS_COMPLETE,
437 };
438
crb_check_resource(struct acpi_resource * ares,void * data)439 static int crb_check_resource(struct acpi_resource *ares, void *data)
440 {
441 struct resource *iores_array = data;
442 struct resource_win win;
443 struct resource *res = &(win.res);
444 int i;
445
446 if (acpi_dev_resource_memory(ares, res) ||
447 acpi_dev_resource_address_space(ares, &win)) {
448 for (i = 0; i < TPM_CRB_MAX_RESOURCES + 1; ++i) {
449 if (resource_type(iores_array + i) != IORESOURCE_MEM) {
450 iores_array[i] = *res;
451 iores_array[i].name = NULL;
452 break;
453 }
454 }
455 }
456
457 return 1;
458 }
459
crb_map_res(struct device * dev,struct resource * iores,void __iomem ** iobase_ptr,u64 start,u32 size)460 static void __iomem *crb_map_res(struct device *dev, struct resource *iores,
461 void __iomem **iobase_ptr, u64 start, u32 size)
462 {
463 struct resource new_res = {
464 .start = start,
465 .end = start + size - 1,
466 .flags = IORESOURCE_MEM,
467 };
468
469 /* Detect a 64 bit address on a 32 bit system */
470 if (start != new_res.start)
471 return (void __iomem *) ERR_PTR(-EINVAL);
472
473 if (!iores)
474 return devm_ioremap_resource(dev, &new_res);
475
476 if (!*iobase_ptr) {
477 *iobase_ptr = devm_ioremap_resource(dev, iores);
478 if (IS_ERR(*iobase_ptr))
479 return *iobase_ptr;
480 }
481
482 return *iobase_ptr + (new_res.start - iores->start);
483 }
484
485 /*
486 * Work around broken BIOSs that return inconsistent values from the ACPI
487 * region vs the registers. Trust the ACPI region. Such broken systems
488 * probably cannot send large TPM commands since the buffer will be truncated.
489 */
crb_fixup_cmd_size(struct device * dev,struct resource * io_res,u64 start,u64 size)490 static u64 crb_fixup_cmd_size(struct device *dev, struct resource *io_res,
491 u64 start, u64 size)
492 {
493 if (io_res->start > start || io_res->end < start)
494 return size;
495
496 if (start + size - 1 <= io_res->end)
497 return size;
498
499 dev_err(dev,
500 FW_BUG "ACPI region does not cover the entire command/response buffer. %pr vs %llx %llx\n",
501 io_res, start, size);
502
503 return io_res->end - start + 1;
504 }
505
crb_map_io(struct acpi_device * device,struct crb_priv * priv,struct acpi_table_tpm2 * buf)506 static int crb_map_io(struct acpi_device *device, struct crb_priv *priv,
507 struct acpi_table_tpm2 *buf)
508 {
509 struct list_head acpi_resource_list;
510 struct resource iores_array[TPM_CRB_MAX_RESOURCES + 1] = { {0} };
511 void __iomem *iobase_array[TPM_CRB_MAX_RESOURCES] = {NULL};
512 struct device *dev = &device->dev;
513 struct resource *iores;
514 void __iomem **iobase_ptr;
515 int i;
516 u32 pa_high, pa_low;
517 u64 cmd_pa;
518 u32 cmd_size;
519 __le64 __rsp_pa;
520 u64 rsp_pa;
521 u32 rsp_size;
522 int ret;
523
524 INIT_LIST_HEAD(&acpi_resource_list);
525 ret = acpi_dev_get_resources(device, &acpi_resource_list,
526 crb_check_resource, iores_array);
527 if (ret < 0)
528 return ret;
529 acpi_dev_free_resource_list(&acpi_resource_list);
530
531 if (resource_type(iores_array) != IORESOURCE_MEM) {
532 dev_err(dev, FW_BUG "TPM2 ACPI table does not define a memory resource\n");
533 return -EINVAL;
534 } else if (resource_type(iores_array + TPM_CRB_MAX_RESOURCES) ==
535 IORESOURCE_MEM) {
536 dev_warn(dev, "TPM2 ACPI table defines too many memory resources\n");
537 memset(iores_array + TPM_CRB_MAX_RESOURCES,
538 0, sizeof(*iores_array));
539 iores_array[TPM_CRB_MAX_RESOURCES].flags = 0;
540 }
541
542 iores = NULL;
543 iobase_ptr = NULL;
544 for (i = 0; resource_type(iores_array + i) == IORESOURCE_MEM; ++i) {
545 if (buf->control_address >= iores_array[i].start &&
546 buf->control_address + sizeof(struct crb_regs_tail) - 1 <=
547 iores_array[i].end) {
548 iores = iores_array + i;
549 iobase_ptr = iobase_array + i;
550 break;
551 }
552 }
553
554 priv->regs_t = crb_map_res(dev, iores, iobase_ptr, buf->control_address,
555 sizeof(struct crb_regs_tail));
556
557 if (IS_ERR(priv->regs_t))
558 return PTR_ERR(priv->regs_t);
559
560 /* The ACPI IO region starts at the head area and continues to include
561 * the control area, as one nice sane region except for some older
562 * stuff that puts the control area outside the ACPI IO region.
563 */
564 if ((priv->sm == ACPI_TPM2_COMMAND_BUFFER) ||
565 (priv->sm == ACPI_TPM2_MEMORY_MAPPED)) {
566 if (iores &&
567 buf->control_address == iores->start +
568 sizeof(*priv->regs_h))
569 priv->regs_h = *iobase_ptr;
570 else
571 dev_warn(dev, FW_BUG "Bad ACPI memory layout");
572 }
573
574 ret = __crb_request_locality(dev, priv, 0);
575 if (ret)
576 return ret;
577
578 /*
579 * PTT HW bug w/a: wake up the device to access
580 * possibly not retained registers.
581 */
582 ret = __crb_cmd_ready(dev, priv);
583 if (ret)
584 goto out_relinquish_locality;
585
586 pa_high = ioread32(&priv->regs_t->ctrl_cmd_pa_high);
587 pa_low = ioread32(&priv->regs_t->ctrl_cmd_pa_low);
588 cmd_pa = ((u64)pa_high << 32) | pa_low;
589 cmd_size = ioread32(&priv->regs_t->ctrl_cmd_size);
590
591 iores = NULL;
592 iobase_ptr = NULL;
593 for (i = 0; iores_array[i].end; ++i) {
594 if (cmd_pa >= iores_array[i].start &&
595 cmd_pa <= iores_array[i].end) {
596 iores = iores_array + i;
597 iobase_ptr = iobase_array + i;
598 break;
599 }
600 }
601
602 if (iores)
603 cmd_size = crb_fixup_cmd_size(dev, iores, cmd_pa, cmd_size);
604
605 dev_dbg(dev, "cmd_hi = %X cmd_low = %X cmd_size %X\n",
606 pa_high, pa_low, cmd_size);
607
608 priv->cmd = crb_map_res(dev, iores, iobase_ptr, cmd_pa, cmd_size);
609 if (IS_ERR(priv->cmd)) {
610 ret = PTR_ERR(priv->cmd);
611 goto out;
612 }
613
614 memcpy_fromio(&__rsp_pa, &priv->regs_t->ctrl_rsp_pa, 8);
615 rsp_pa = le64_to_cpu(__rsp_pa);
616 rsp_size = ioread32(&priv->regs_t->ctrl_rsp_size);
617
618 iores = NULL;
619 iobase_ptr = NULL;
620 for (i = 0; resource_type(iores_array + i) == IORESOURCE_MEM; ++i) {
621 if (rsp_pa >= iores_array[i].start &&
622 rsp_pa <= iores_array[i].end) {
623 iores = iores_array + i;
624 iobase_ptr = iobase_array + i;
625 break;
626 }
627 }
628
629 if (iores)
630 rsp_size = crb_fixup_cmd_size(dev, iores, rsp_pa, rsp_size);
631
632 if (cmd_pa != rsp_pa) {
633 priv->rsp = crb_map_res(dev, iores, iobase_ptr,
634 rsp_pa, rsp_size);
635 ret = PTR_ERR_OR_ZERO(priv->rsp);
636 goto out;
637 }
638
639 /* According to the PTP specification, overlapping command and response
640 * buffer sizes must be identical.
641 */
642 if (cmd_size != rsp_size) {
643 dev_err(dev, FW_BUG "overlapping command and response buffer sizes are not identical");
644 ret = -EINVAL;
645 goto out;
646 }
647
648 priv->rsp = priv->cmd;
649
650 out:
651 if (!ret)
652 priv->cmd_size = cmd_size;
653
654 __crb_go_idle(dev, priv);
655
656 out_relinquish_locality:
657
658 __crb_relinquish_locality(dev, priv, 0);
659
660 return ret;
661 }
662
crb_acpi_add(struct acpi_device * device)663 static int crb_acpi_add(struct acpi_device *device)
664 {
665 struct acpi_table_tpm2 *buf;
666 struct crb_priv *priv;
667 struct tpm_chip *chip;
668 struct device *dev = &device->dev;
669 struct tpm2_crb_smc *crb_smc;
670 acpi_status status;
671 u32 sm;
672 int rc;
673
674 status = acpi_get_table(ACPI_SIG_TPM2, 1,
675 (struct acpi_table_header **) &buf);
676 if (ACPI_FAILURE(status) || buf->header.length < sizeof(*buf)) {
677 dev_err(dev, FW_BUG "failed to get TPM2 ACPI table\n");
678 return -EINVAL;
679 }
680
681 /* Should the FIFO driver handle this? */
682 sm = buf->start_method;
683 if (sm == ACPI_TPM2_MEMORY_MAPPED) {
684 rc = -ENODEV;
685 goto out;
686 }
687
688 priv = devm_kzalloc(dev, sizeof(struct crb_priv), GFP_KERNEL);
689 if (!priv) {
690 rc = -ENOMEM;
691 goto out;
692 }
693
694 if (sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) {
695 if (buf->header.length < (sizeof(*buf) + sizeof(*crb_smc))) {
696 dev_err(dev,
697 FW_BUG "TPM2 ACPI table has wrong size %u for start method type %d\n",
698 buf->header.length,
699 ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC);
700 rc = -EINVAL;
701 goto out;
702 }
703 crb_smc = ACPI_ADD_PTR(struct tpm2_crb_smc, buf, sizeof(*buf));
704 priv->smc_func_id = crb_smc->smc_func_id;
705 }
706
707 priv->sm = sm;
708 priv->hid = acpi_device_hid(device);
709
710 rc = crb_map_io(device, priv, buf);
711 if (rc)
712 goto out;
713
714 chip = tpmm_chip_alloc(dev, &tpm_crb);
715 if (IS_ERR(chip)) {
716 rc = PTR_ERR(chip);
717 goto out;
718 }
719
720 dev_set_drvdata(&chip->dev, priv);
721 chip->acpi_dev_handle = device->handle;
722 chip->flags = TPM_CHIP_FLAG_TPM2;
723
724 rc = tpm_chip_register(chip);
725
726 out:
727 acpi_put_table((struct acpi_table_header *)buf);
728 return rc;
729 }
730
crb_acpi_remove(struct acpi_device * device)731 static int crb_acpi_remove(struct acpi_device *device)
732 {
733 struct device *dev = &device->dev;
734 struct tpm_chip *chip = dev_get_drvdata(dev);
735
736 tpm_chip_unregister(chip);
737
738 return 0;
739 }
740
741 static const struct dev_pm_ops crb_pm = {
742 SET_SYSTEM_SLEEP_PM_OPS(tpm_pm_suspend, tpm_pm_resume)
743 };
744
745 static const struct acpi_device_id crb_device_ids[] = {
746 {"MSFT0101", 0},
747 {"", 0},
748 };
749 MODULE_DEVICE_TABLE(acpi, crb_device_ids);
750
751 static struct acpi_driver crb_acpi_driver = {
752 .name = "tpm_crb",
753 .ids = crb_device_ids,
754 .ops = {
755 .add = crb_acpi_add,
756 .remove = crb_acpi_remove,
757 },
758 .drv = {
759 .pm = &crb_pm,
760 },
761 };
762
763 module_acpi_driver(crb_acpi_driver);
764 MODULE_AUTHOR("Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>");
765 MODULE_DESCRIPTION("TPM2 Driver");
766 MODULE_VERSION("0.1");
767 MODULE_LICENSE("GPL");
768