1 /*
2 * Copyright (C) 2005, 2006 IBM Corporation
3 * Copyright (C) 2014, 2015 Intel Corporation
4 *
5 * Authors:
6 * Leendert van Doorn <leendert@watson.ibm.com>
7 * Kylene Hall <kjhall@us.ibm.com>
8 *
9 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
10 *
11 * Device driver for TCG/TCPA TPM (trusted platform module).
12 * Specifications at www.trustedcomputinggroup.org
13 *
14 * This device driver implements the TPM interface as defined in
15 * the TCG TPM Interface Spec version 1.2, revision 1.0.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation, version 2 of the
20 * License.
21 */
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/pnp.h>
26 #include <linux/slab.h>
27 #include <linux/interrupt.h>
28 #include <linux/wait.h>
29 #include <linux/acpi.h>
30 #include <linux/freezer.h>
31 #include "tpm.h"
32 #include "tpm_tis_core.h"
33
34 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
35
wait_for_tpm_stat_cond(struct tpm_chip * chip,u8 mask,bool check_cancel,bool * canceled)36 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
37 bool check_cancel, bool *canceled)
38 {
39 u8 status = chip->ops->status(chip);
40
41 *canceled = false;
42 if ((status & mask) == mask)
43 return true;
44 if (check_cancel && chip->ops->req_canceled(chip, status)) {
45 *canceled = true;
46 return true;
47 }
48 return false;
49 }
50
wait_for_tpm_stat(struct tpm_chip * chip,u8 mask,unsigned long timeout,wait_queue_head_t * queue,bool check_cancel)51 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
52 unsigned long timeout, wait_queue_head_t *queue,
53 bool check_cancel)
54 {
55 unsigned long stop;
56 long rc;
57 u8 status;
58 bool canceled = false;
59
60 /* check current status */
61 status = chip->ops->status(chip);
62 if ((status & mask) == mask)
63 return 0;
64
65 stop = jiffies + timeout;
66
67 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
68 again:
69 timeout = stop - jiffies;
70 if ((long)timeout <= 0)
71 return -ETIME;
72 rc = wait_event_interruptible_timeout(*queue,
73 wait_for_tpm_stat_cond(chip, mask, check_cancel,
74 &canceled),
75 timeout);
76 if (rc > 0) {
77 if (canceled)
78 return -ECANCELED;
79 return 0;
80 }
81 if (rc == -ERESTARTSYS && freezing(current)) {
82 clear_thread_flag(TIF_SIGPENDING);
83 goto again;
84 }
85 } else {
86 do {
87 usleep_range(TPM_TIMEOUT_USECS_MIN,
88 TPM_TIMEOUT_USECS_MAX);
89 status = chip->ops->status(chip);
90 if ((status & mask) == mask)
91 return 0;
92 } while (time_before(jiffies, stop));
93 }
94 return -ETIME;
95 }
96
97 /* Before we attempt to access the TPM we must see that the valid bit is set.
98 * The specification says that this bit is 0 at reset and remains 0 until the
99 * 'TPM has gone through its self test and initialization and has established
100 * correct values in the other bits.'
101 */
wait_startup(struct tpm_chip * chip,int l)102 static int wait_startup(struct tpm_chip *chip, int l)
103 {
104 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
105 unsigned long stop = jiffies + chip->timeout_a;
106
107 do {
108 int rc;
109 u8 access;
110
111 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
112 if (rc < 0)
113 return rc;
114
115 if (access & TPM_ACCESS_VALID)
116 return 0;
117 tpm_msleep(TPM_TIMEOUT);
118 } while (time_before(jiffies, stop));
119 return -1;
120 }
121
check_locality(struct tpm_chip * chip,int l)122 static bool check_locality(struct tpm_chip *chip, int l)
123 {
124 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
125 int rc;
126 u8 access;
127
128 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
129 if (rc < 0)
130 return false;
131
132 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID
133 | TPM_ACCESS_REQUEST_USE)) ==
134 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
135 priv->locality = l;
136 return true;
137 }
138
139 return false;
140 }
141
release_locality(struct tpm_chip * chip,int l)142 static int release_locality(struct tpm_chip *chip, int l)
143 {
144 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
145
146 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
147
148 return 0;
149 }
150
request_locality(struct tpm_chip * chip,int l)151 static int request_locality(struct tpm_chip *chip, int l)
152 {
153 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
154 unsigned long stop, timeout;
155 long rc;
156
157 if (check_locality(chip, l))
158 return l;
159
160 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
161 if (rc < 0)
162 return rc;
163
164 stop = jiffies + chip->timeout_a;
165
166 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
167 again:
168 timeout = stop - jiffies;
169 if ((long)timeout <= 0)
170 return -1;
171 rc = wait_event_interruptible_timeout(priv->int_queue,
172 (check_locality
173 (chip, l)),
174 timeout);
175 if (rc > 0)
176 return l;
177 if (rc == -ERESTARTSYS && freezing(current)) {
178 clear_thread_flag(TIF_SIGPENDING);
179 goto again;
180 }
181 } else {
182 /* wait for burstcount */
183 do {
184 if (check_locality(chip, l))
185 return l;
186 tpm_msleep(TPM_TIMEOUT);
187 } while (time_before(jiffies, stop));
188 }
189 return -1;
190 }
191
tpm_tis_status(struct tpm_chip * chip)192 static u8 tpm_tis_status(struct tpm_chip *chip)
193 {
194 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
195 int rc;
196 u8 status;
197
198 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
199 if (rc < 0)
200 return 0;
201
202 return status;
203 }
204
tpm_tis_ready(struct tpm_chip * chip)205 static void tpm_tis_ready(struct tpm_chip *chip)
206 {
207 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
208
209 /* this causes the current command to be aborted */
210 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
211 }
212
get_burstcount(struct tpm_chip * chip)213 static int get_burstcount(struct tpm_chip *chip)
214 {
215 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
216 unsigned long stop;
217 int burstcnt, rc;
218 u32 value;
219
220 /* wait for burstcount */
221 if (chip->flags & TPM_CHIP_FLAG_TPM2)
222 stop = jiffies + chip->timeout_a;
223 else
224 stop = jiffies + chip->timeout_d;
225 do {
226 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
227 if (rc < 0)
228 return rc;
229
230 burstcnt = (value >> 8) & 0xFFFF;
231 if (burstcnt)
232 return burstcnt;
233 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX);
234 } while (time_before(jiffies, stop));
235 return -EBUSY;
236 }
237
recv_data(struct tpm_chip * chip,u8 * buf,size_t count)238 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
239 {
240 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
241 int size = 0, burstcnt, rc;
242
243 while (size < count) {
244 rc = wait_for_tpm_stat(chip,
245 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
246 chip->timeout_c,
247 &priv->read_queue, true);
248 if (rc < 0)
249 return rc;
250 burstcnt = get_burstcount(chip);
251 if (burstcnt < 0) {
252 dev_err(&chip->dev, "Unable to read burstcount\n");
253 return burstcnt;
254 }
255 burstcnt = min_t(int, burstcnt, count - size);
256
257 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
258 burstcnt, buf + size);
259 if (rc < 0)
260 return rc;
261
262 size += burstcnt;
263 }
264 return size;
265 }
266
tpm_tis_recv(struct tpm_chip * chip,u8 * buf,size_t count)267 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
268 {
269 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
270 int size = 0;
271 int status;
272 u32 expected;
273 int rc;
274
275 if (count < TPM_HEADER_SIZE) {
276 size = -EIO;
277 goto out;
278 }
279
280 size = recv_data(chip, buf, TPM_HEADER_SIZE);
281 /* read first 10 bytes, including tag, paramsize, and result */
282 if (size < TPM_HEADER_SIZE) {
283 dev_err(&chip->dev, "Unable to read header\n");
284 goto out;
285 }
286
287 expected = be32_to_cpu(*(__be32 *) (buf + 2));
288 if (expected > count || expected < TPM_HEADER_SIZE) {
289 size = -EIO;
290 goto out;
291 }
292
293 rc = recv_data(chip, &buf[TPM_HEADER_SIZE],
294 expected - TPM_HEADER_SIZE);
295 if (rc < 0) {
296 size = rc;
297 goto out;
298 }
299 size += rc;
300 if (size < expected) {
301 dev_err(&chip->dev, "Unable to read remainder of result\n");
302 size = -ETIME;
303 goto out;
304 }
305
306 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
307 &priv->int_queue, false) < 0) {
308 size = -ETIME;
309 goto out;
310 }
311 status = tpm_tis_status(chip);
312 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
313 dev_err(&chip->dev, "Error left over data\n");
314 size = -EIO;
315 goto out;
316 }
317
318 out:
319 tpm_tis_ready(chip);
320 return size;
321 }
322
323 /*
324 * If interrupts are used (signaled by an irq set in the vendor structure)
325 * tpm.c can skip polling for the data to be available as the interrupt is
326 * waited for here
327 */
tpm_tis_send_data(struct tpm_chip * chip,const u8 * buf,size_t len)328 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
329 {
330 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
331 int rc, status, burstcnt;
332 size_t count = 0;
333 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND;
334
335 status = tpm_tis_status(chip);
336 if ((status & TPM_STS_COMMAND_READY) == 0) {
337 tpm_tis_ready(chip);
338 if (wait_for_tpm_stat
339 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
340 &priv->int_queue, false) < 0) {
341 rc = -ETIME;
342 goto out_err;
343 }
344 }
345
346 while (count < len - 1) {
347 burstcnt = get_burstcount(chip);
348 if (burstcnt < 0) {
349 dev_err(&chip->dev, "Unable to read burstcount\n");
350 rc = burstcnt;
351 goto out_err;
352 }
353 burstcnt = min_t(int, burstcnt, len - count - 1);
354 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
355 burstcnt, buf + count);
356 if (rc < 0)
357 goto out_err;
358
359 count += burstcnt;
360
361 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
362 &priv->int_queue, false) < 0) {
363 rc = -ETIME;
364 goto out_err;
365 }
366 status = tpm_tis_status(chip);
367 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
368 rc = -EIO;
369 goto out_err;
370 }
371 }
372
373 /* write last byte */
374 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
375 if (rc < 0)
376 goto out_err;
377
378 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
379 &priv->int_queue, false) < 0) {
380 rc = -ETIME;
381 goto out_err;
382 }
383 status = tpm_tis_status(chip);
384 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
385 rc = -EIO;
386 goto out_err;
387 }
388
389 return 0;
390
391 out_err:
392 tpm_tis_ready(chip);
393 return rc;
394 }
395
disable_interrupts(struct tpm_chip * chip)396 static void disable_interrupts(struct tpm_chip *chip)
397 {
398 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
399 u32 intmask;
400 int rc;
401
402 if (priv->irq == 0)
403 return;
404
405 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
406 if (rc < 0)
407 intmask = 0;
408
409 intmask &= ~TPM_GLOBAL_INT_ENABLE;
410 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
411
412 devm_free_irq(chip->dev.parent, priv->irq, chip);
413 priv->irq = 0;
414 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
415 }
416
417 /*
418 * If interrupts are used (signaled by an irq set in the vendor structure)
419 * tpm.c can skip polling for the data to be available as the interrupt is
420 * waited for here
421 */
tpm_tis_send_main(struct tpm_chip * chip,const u8 * buf,size_t len)422 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
423 {
424 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
425 int rc;
426 u32 ordinal;
427 unsigned long dur;
428 unsigned int try;
429
430 for (try = 0; try < TPM_RETRY; try++) {
431 rc = tpm_tis_send_data(chip, buf, len);
432 if (rc >= 0)
433 /* Data transfer done successfully */
434 break;
435 else if (rc != -EIO)
436 /* Data transfer failed, not recoverable */
437 return rc;
438 }
439
440 /* go and do it */
441 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
442 if (rc < 0)
443 goto out_err;
444
445 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
446 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
447
448 if (chip->flags & TPM_CHIP_FLAG_TPM2)
449 dur = tpm2_calc_ordinal_duration(chip, ordinal);
450 else
451 dur = tpm_calc_ordinal_duration(chip, ordinal);
452
453 if (wait_for_tpm_stat
454 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
455 &priv->read_queue, false) < 0) {
456 rc = -ETIME;
457 goto out_err;
458 }
459 }
460 return 0;
461 out_err:
462 tpm_tis_ready(chip);
463 return rc;
464 }
465
tpm_tis_send(struct tpm_chip * chip,u8 * buf,size_t len)466 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
467 {
468 int rc, irq;
469 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
470
471 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
472 return tpm_tis_send_main(chip, buf, len);
473
474 /* Verify receipt of the expected IRQ */
475 irq = priv->irq;
476 priv->irq = 0;
477 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
478 rc = tpm_tis_send_main(chip, buf, len);
479 priv->irq = irq;
480 chip->flags |= TPM_CHIP_FLAG_IRQ;
481 if (!priv->irq_tested)
482 tpm_msleep(1);
483 if (!priv->irq_tested)
484 disable_interrupts(chip);
485 priv->irq_tested = true;
486 return rc;
487 }
488
489 struct tis_vendor_timeout_override {
490 u32 did_vid;
491 unsigned long timeout_us[4];
492 };
493
494 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
495 /* Atmel 3204 */
496 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
497 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
498 };
499
tpm_tis_update_timeouts(struct tpm_chip * chip,unsigned long * timeout_cap)500 static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
501 unsigned long *timeout_cap)
502 {
503 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
504 int i, rc;
505 u32 did_vid;
506
507 if (chip->ops->clk_enable != NULL)
508 chip->ops->clk_enable(chip, true);
509
510 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
511 if (rc < 0)
512 goto out;
513
514 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
515 if (vendor_timeout_overrides[i].did_vid != did_vid)
516 continue;
517 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
518 sizeof(vendor_timeout_overrides[i].timeout_us));
519 rc = true;
520 }
521
522 rc = false;
523
524 out:
525 if (chip->ops->clk_enable != NULL)
526 chip->ops->clk_enable(chip, false);
527
528 return rc;
529 }
530
531 /*
532 * Early probing for iTPM with STS_DATA_EXPECT flaw.
533 * Try sending command without itpm flag set and if that
534 * fails, repeat with itpm flag set.
535 */
probe_itpm(struct tpm_chip * chip)536 static int probe_itpm(struct tpm_chip *chip)
537 {
538 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
539 int rc = 0;
540 static const u8 cmd_getticks[] = {
541 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
542 0x00, 0x00, 0x00, 0xf1
543 };
544 size_t len = sizeof(cmd_getticks);
545 u16 vendor;
546
547 if (priv->flags & TPM_TIS_ITPM_WORKAROUND)
548 return 0;
549
550 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
551 if (rc < 0)
552 return rc;
553
554 /* probe only iTPMS */
555 if (vendor != TPM_VID_INTEL)
556 return 0;
557
558 if (request_locality(chip, 0) != 0)
559 return -EBUSY;
560
561 rc = tpm_tis_send_data(chip, cmd_getticks, len);
562 if (rc == 0)
563 goto out;
564
565 tpm_tis_ready(chip);
566
567 priv->flags |= TPM_TIS_ITPM_WORKAROUND;
568
569 rc = tpm_tis_send_data(chip, cmd_getticks, len);
570 if (rc == 0)
571 dev_info(&chip->dev, "Detected an iTPM.\n");
572 else {
573 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND;
574 rc = -EFAULT;
575 }
576
577 out:
578 tpm_tis_ready(chip);
579 release_locality(chip, priv->locality);
580
581 return rc;
582 }
583
tpm_tis_req_canceled(struct tpm_chip * chip,u8 status)584 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
585 {
586 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
587
588 switch (priv->manufacturer_id) {
589 case TPM_VID_WINBOND:
590 return ((status == TPM_STS_VALID) ||
591 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
592 case TPM_VID_STM:
593 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
594 default:
595 return (status == TPM_STS_COMMAND_READY);
596 }
597 }
598
tis_int_handler(int dummy,void * dev_id)599 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
600 {
601 struct tpm_chip *chip = dev_id;
602 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
603 u32 interrupt;
604 int i, rc;
605
606 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
607 if (rc < 0)
608 return IRQ_NONE;
609
610 if (interrupt == 0)
611 return IRQ_NONE;
612
613 priv->irq_tested = true;
614 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
615 wake_up_interruptible(&priv->read_queue);
616 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
617 for (i = 0; i < 5; i++)
618 if (check_locality(chip, i))
619 break;
620 if (interrupt &
621 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
622 TPM_INTF_CMD_READY_INT))
623 wake_up_interruptible(&priv->int_queue);
624
625 /* Clear interrupts handled with TPM_EOI */
626 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
627 if (rc < 0)
628 return IRQ_NONE;
629
630 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
631 return IRQ_HANDLED;
632 }
633
tpm_tis_gen_interrupt(struct tpm_chip * chip)634 static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
635 {
636 const char *desc = "attempting to generate an interrupt";
637 u32 cap2;
638 cap_t cap;
639
640 if (chip->flags & TPM_CHIP_FLAG_TPM2)
641 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
642 else
643 return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc,
644 0);
645 }
646
647 /* Register the IRQ and issue a command that will cause an interrupt. If an
648 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
649 * everything and leave in polling mode. Returns 0 on success.
650 */
tpm_tis_probe_irq_single(struct tpm_chip * chip,u32 intmask,int flags,int irq)651 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
652 int flags, int irq)
653 {
654 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
655 u8 original_int_vec;
656 int rc;
657 u32 int_status;
658
659 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
660 dev_name(&chip->dev), chip) != 0) {
661 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
662 irq);
663 return -1;
664 }
665 priv->irq = irq;
666
667 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
668 &original_int_vec);
669 if (rc < 0)
670 return rc;
671
672 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
673 if (rc < 0)
674 return rc;
675
676 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
677 if (rc < 0)
678 return rc;
679
680 /* Clear all existing */
681 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
682 if (rc < 0)
683 return rc;
684
685 /* Turn on */
686 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
687 intmask | TPM_GLOBAL_INT_ENABLE);
688 if (rc < 0)
689 return rc;
690
691 priv->irq_tested = false;
692
693 /* Generate an interrupt by having the core call through to
694 * tpm_tis_send
695 */
696 rc = tpm_tis_gen_interrupt(chip);
697 if (rc < 0)
698 return rc;
699
700 /* tpm_tis_send will either confirm the interrupt is working or it
701 * will call disable_irq which undoes all of the above.
702 */
703 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
704 rc = tpm_tis_write8(priv, original_int_vec,
705 TPM_INT_VECTOR(priv->locality));
706 if (rc < 0)
707 return rc;
708
709 return 1;
710 }
711
712 return 0;
713 }
714
715 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
716 * do not have ACPI/etc. We typically expect the interrupt to be declared if
717 * present.
718 */
tpm_tis_probe_irq(struct tpm_chip * chip,u32 intmask)719 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
720 {
721 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
722 u8 original_int_vec;
723 int i, rc;
724
725 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
726 &original_int_vec);
727 if (rc < 0)
728 return;
729
730 if (!original_int_vec) {
731 if (IS_ENABLED(CONFIG_X86))
732 for (i = 3; i <= 15; i++)
733 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
734 i))
735 return;
736 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
737 original_int_vec))
738 return;
739 }
740
tpm_tis_remove(struct tpm_chip * chip)741 void tpm_tis_remove(struct tpm_chip *chip)
742 {
743 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
744 u32 reg = TPM_INT_ENABLE(priv->locality);
745 u32 interrupt;
746 int rc;
747
748 tpm_tis_clkrun_enable(chip, true);
749
750 rc = tpm_tis_read32(priv, reg, &interrupt);
751 if (rc < 0)
752 interrupt = 0;
753
754 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
755
756 tpm_tis_clkrun_enable(chip, false);
757
758 if (priv->ilb_base_addr)
759 iounmap(priv->ilb_base_addr);
760 }
761 EXPORT_SYMBOL_GPL(tpm_tis_remove);
762
763 /**
764 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
765 * of a single TPM command
766 * @chip: TPM chip to use
767 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running
768 * 0 - Enable CLKRUN protocol
769 * Call this function directly in tpm_tis_remove() in error or driver removal
770 * path, since the chip->ops is set to NULL in tpm_chip_unregister().
771 */
tpm_tis_clkrun_enable(struct tpm_chip * chip,bool value)772 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
773 {
774 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
775 u32 clkrun_val;
776
777 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
778 !data->ilb_base_addr)
779 return;
780
781 if (value) {
782 data->clkrun_enabled++;
783 if (data->clkrun_enabled > 1)
784 return;
785 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
786
787 /* Disable LPC CLKRUN# */
788 clkrun_val &= ~LPC_CLKRUN_EN;
789 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
790
791 /*
792 * Write any random value on port 0x80 which is on LPC, to make
793 * sure LPC clock is running before sending any TPM command.
794 */
795 outb(0xCC, 0x80);
796 } else {
797 data->clkrun_enabled--;
798 if (data->clkrun_enabled)
799 return;
800
801 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
802
803 /* Enable LPC CLKRUN# */
804 clkrun_val |= LPC_CLKRUN_EN;
805 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
806
807 /*
808 * Write any random value on port 0x80 which is on LPC, to make
809 * sure LPC clock is running before sending any TPM command.
810 */
811 outb(0xCC, 0x80);
812 }
813 }
814
815 static const struct tpm_class_ops tpm_tis = {
816 .flags = TPM_OPS_AUTO_STARTUP,
817 .status = tpm_tis_status,
818 .recv = tpm_tis_recv,
819 .send = tpm_tis_send,
820 .cancel = tpm_tis_ready,
821 .update_timeouts = tpm_tis_update_timeouts,
822 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
823 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
824 .req_canceled = tpm_tis_req_canceled,
825 .request_locality = request_locality,
826 .relinquish_locality = release_locality,
827 .clk_enable = tpm_tis_clkrun_enable,
828 };
829
tpm_tis_core_init(struct device * dev,struct tpm_tis_data * priv,int irq,const struct tpm_tis_phy_ops * phy_ops,acpi_handle acpi_dev_handle)830 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
831 const struct tpm_tis_phy_ops *phy_ops,
832 acpi_handle acpi_dev_handle)
833 {
834 u32 vendor;
835 u32 intfcaps;
836 u32 intmask;
837 u32 clkrun_val;
838 u8 rid;
839 int rc, probe;
840 struct tpm_chip *chip;
841
842 chip = tpmm_chip_alloc(dev, &tpm_tis);
843 if (IS_ERR(chip))
844 return PTR_ERR(chip);
845
846 #ifdef CONFIG_ACPI
847 chip->acpi_dev_handle = acpi_dev_handle;
848 #endif
849
850 chip->hwrng.quality = priv->rng_quality;
851
852 /* Maximum timeouts */
853 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
854 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
855 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
856 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
857 priv->phy_ops = phy_ops;
858 dev_set_drvdata(&chip->dev, priv);
859
860 if (is_bsw()) {
861 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
862 ILB_REMAP_SIZE);
863 if (!priv->ilb_base_addr)
864 return -ENOMEM;
865
866 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
867 /* Check if CLKRUN# is already not enabled in the LPC bus */
868 if (!(clkrun_val & LPC_CLKRUN_EN)) {
869 iounmap(priv->ilb_base_addr);
870 priv->ilb_base_addr = NULL;
871 }
872 }
873
874 if (chip->ops->clk_enable != NULL)
875 chip->ops->clk_enable(chip, true);
876
877 if (wait_startup(chip, 0) != 0) {
878 rc = -ENODEV;
879 goto out_err;
880 }
881
882 /* Take control of the TPM's interrupt hardware and shut it off */
883 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
884 if (rc < 0)
885 goto out_err;
886
887 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
888 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
889 intmask &= ~TPM_GLOBAL_INT_ENABLE;
890
891 rc = request_locality(chip, 0);
892 if (rc < 0) {
893 rc = -ENODEV;
894 goto out_err;
895 }
896
897 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
898 release_locality(chip, 0);
899
900 rc = tpm2_probe(chip);
901 if (rc)
902 goto out_err;
903
904 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
905 if (rc < 0)
906 goto out_err;
907
908 priv->manufacturer_id = vendor;
909
910 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
911 if (rc < 0)
912 goto out_err;
913
914 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
915 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
916 vendor >> 16, rid);
917
918 probe = probe_itpm(chip);
919 if (probe < 0) {
920 rc = -ENODEV;
921 goto out_err;
922 }
923
924 /* Figure out the capabilities */
925 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
926 if (rc < 0)
927 goto out_err;
928
929 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
930 intfcaps);
931 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
932 dev_dbg(dev, "\tBurst Count Static\n");
933 if (intfcaps & TPM_INTF_CMD_READY_INT)
934 dev_dbg(dev, "\tCommand Ready Int Support\n");
935 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
936 dev_dbg(dev, "\tInterrupt Edge Falling\n");
937 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
938 dev_dbg(dev, "\tInterrupt Edge Rising\n");
939 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
940 dev_dbg(dev, "\tInterrupt Level Low\n");
941 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
942 dev_dbg(dev, "\tInterrupt Level High\n");
943 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
944 dev_dbg(dev, "\tLocality Change Int Support\n");
945 if (intfcaps & TPM_INTF_STS_VALID_INT)
946 dev_dbg(dev, "\tSts Valid Int Support\n");
947 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
948 dev_dbg(dev, "\tData Avail Int Support\n");
949
950 /* INTERRUPT Setup */
951 init_waitqueue_head(&priv->read_queue);
952 init_waitqueue_head(&priv->int_queue);
953 if (irq != -1) {
954 /* Before doing irq testing issue a command to the TPM in polling mode
955 * to make sure it works. May as well use that command to set the
956 * proper timeouts for the driver.
957 */
958 if (tpm_get_timeouts(chip)) {
959 dev_err(dev, "Could not get TPM timeouts and durations\n");
960 rc = -ENODEV;
961 goto out_err;
962 }
963
964 if (irq) {
965 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
966 irq);
967 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
968 dev_err(&chip->dev, FW_BUG
969 "TPM interrupt not working, polling instead\n");
970
971 disable_interrupts(chip);
972 }
973 } else {
974 tpm_tis_probe_irq(chip, intmask);
975 }
976 }
977
978 rc = tpm_chip_register(chip);
979 if (rc)
980 goto out_err;
981
982 if (chip->ops->clk_enable != NULL)
983 chip->ops->clk_enable(chip, false);
984
985 return 0;
986 out_err:
987 if (chip->ops->clk_enable != NULL)
988 chip->ops->clk_enable(chip, false);
989
990 tpm_tis_remove(chip);
991
992 return rc;
993 }
994 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
995
996 #ifdef CONFIG_PM_SLEEP
tpm_tis_reenable_interrupts(struct tpm_chip * chip)997 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
998 {
999 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1000 u32 intmask;
1001 int rc;
1002
1003 if (chip->ops->clk_enable != NULL)
1004 chip->ops->clk_enable(chip, true);
1005
1006 /* reenable interrupts that device may have lost or
1007 * BIOS/firmware may have disabled
1008 */
1009 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
1010 if (rc < 0)
1011 goto out;
1012
1013 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
1014 if (rc < 0)
1015 goto out;
1016
1017 intmask |= TPM_INTF_CMD_READY_INT
1018 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
1019 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
1020
1021 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1022
1023 out:
1024 if (chip->ops->clk_enable != NULL)
1025 chip->ops->clk_enable(chip, false);
1026
1027 return;
1028 }
1029
tpm_tis_resume(struct device * dev)1030 int tpm_tis_resume(struct device *dev)
1031 {
1032 struct tpm_chip *chip = dev_get_drvdata(dev);
1033 int ret;
1034
1035 if (chip->flags & TPM_CHIP_FLAG_IRQ)
1036 tpm_tis_reenable_interrupts(chip);
1037
1038 ret = tpm_pm_resume(dev);
1039 if (ret)
1040 return ret;
1041
1042 /* TPM 1.2 requires self-test on resume. This function actually returns
1043 * an error code but for unknown reason it isn't handled.
1044 */
1045 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
1046 tpm_do_selftest(chip);
1047
1048 return 0;
1049 }
1050 EXPORT_SYMBOL_GPL(tpm_tis_resume);
1051 #endif
1052
1053 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
1054 MODULE_DESCRIPTION("TPM Driver");
1055 MODULE_VERSION("2.0");
1056 MODULE_LICENSE("GPL");
1057