1 /*
2  * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3  * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * Gated clock implementation
10  */
11 
12 #include <linux/clk-provider.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/io.h>
16 #include <linux/err.h>
17 #include <linux/string.h>
18 
19 /**
20  * DOC: basic gatable clock which can gate and ungate it's ouput
21  *
22  * Traits of this clock:
23  * prepare - clk_(un)prepare only ensures parent is (un)prepared
24  * enable - clk_enable and clk_disable are functional & control gating
25  * rate - inherits rate from parent.  No clk_set_rate support
26  * parent - fixed parent.  No clk_set_parent support
27  */
28 
29 /*
30  * It works on following logic:
31  *
32  * For enabling clock, enable = 1
33  *	set2dis = 1	-> clear bit	-> set = 0
34  *	set2dis = 0	-> set bit	-> set = 1
35  *
36  * For disabling clock, enable = 0
37  *	set2dis = 1	-> set bit	-> set = 1
38  *	set2dis = 0	-> clear bit	-> set = 0
39  *
40  * So, result is always: enable xor set2dis.
41  */
clk_gate_endisable(struct clk_hw * hw,int enable)42 static void clk_gate_endisable(struct clk_hw *hw, int enable)
43 {
44 	struct clk_gate *gate = to_clk_gate(hw);
45 	int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
46 	unsigned long flags;
47 	u32 reg;
48 
49 	set ^= enable;
50 
51 	if (gate->lock)
52 		spin_lock_irqsave(gate->lock, flags);
53 	else
54 		__acquire(gate->lock);
55 
56 	if (gate->flags & CLK_GATE_HIWORD_MASK) {
57 		reg = BIT(gate->bit_idx + 16);
58 		if (set)
59 			reg |= BIT(gate->bit_idx);
60 	} else {
61 		reg = clk_readl(gate->reg);
62 
63 		if (set)
64 			reg |= BIT(gate->bit_idx);
65 		else
66 			reg &= ~BIT(gate->bit_idx);
67 	}
68 
69 	clk_writel(reg, gate->reg);
70 
71 	if (gate->lock)
72 		spin_unlock_irqrestore(gate->lock, flags);
73 	else
74 		__release(gate->lock);
75 }
76 
clk_gate_enable(struct clk_hw * hw)77 static int clk_gate_enable(struct clk_hw *hw)
78 {
79 	clk_gate_endisable(hw, 1);
80 
81 	return 0;
82 }
83 
clk_gate_disable(struct clk_hw * hw)84 static void clk_gate_disable(struct clk_hw *hw)
85 {
86 	clk_gate_endisable(hw, 0);
87 }
88 
clk_gate_is_enabled(struct clk_hw * hw)89 int clk_gate_is_enabled(struct clk_hw *hw)
90 {
91 	u32 reg;
92 	struct clk_gate *gate = to_clk_gate(hw);
93 
94 	reg = clk_readl(gate->reg);
95 
96 	/* if a set bit disables this clk, flip it before masking */
97 	if (gate->flags & CLK_GATE_SET_TO_DISABLE)
98 		reg ^= BIT(gate->bit_idx);
99 
100 	reg &= BIT(gate->bit_idx);
101 
102 	return reg ? 1 : 0;
103 }
104 EXPORT_SYMBOL_GPL(clk_gate_is_enabled);
105 
106 const struct clk_ops clk_gate_ops = {
107 	.enable = clk_gate_enable,
108 	.disable = clk_gate_disable,
109 	.is_enabled = clk_gate_is_enabled,
110 };
111 EXPORT_SYMBOL_GPL(clk_gate_ops);
112 
113 /**
114  * clk_hw_register_gate - register a gate clock with the clock framework
115  * @dev: device that is registering this clock
116  * @name: name of this clock
117  * @parent_name: name of this clock's parent
118  * @flags: framework-specific flags for this clock
119  * @reg: register address to control gating of this clock
120  * @bit_idx: which bit in the register controls gating of this clock
121  * @clk_gate_flags: gate-specific flags for this clock
122  * @lock: shared register lock for this clock
123  */
clk_hw_register_gate(struct device * dev,const char * name,const char * parent_name,unsigned long flags,void __iomem * reg,u8 bit_idx,u8 clk_gate_flags,spinlock_t * lock)124 struct clk_hw *clk_hw_register_gate(struct device *dev, const char *name,
125 		const char *parent_name, unsigned long flags,
126 		void __iomem *reg, u8 bit_idx,
127 		u8 clk_gate_flags, spinlock_t *lock)
128 {
129 	struct clk_gate *gate;
130 	struct clk_hw *hw;
131 	struct clk_init_data init;
132 	int ret;
133 
134 	if (clk_gate_flags & CLK_GATE_HIWORD_MASK) {
135 		if (bit_idx > 15) {
136 			pr_err("gate bit exceeds LOWORD field\n");
137 			return ERR_PTR(-EINVAL);
138 		}
139 	}
140 
141 	/* allocate the gate */
142 	gate = kzalloc(sizeof(*gate), GFP_KERNEL);
143 	if (!gate)
144 		return ERR_PTR(-ENOMEM);
145 
146 	init.name = name;
147 	init.ops = &clk_gate_ops;
148 	init.flags = flags | CLK_IS_BASIC;
149 	init.parent_names = parent_name ? &parent_name : NULL;
150 	init.num_parents = parent_name ? 1 : 0;
151 
152 	/* struct clk_gate assignments */
153 	gate->reg = reg;
154 	gate->bit_idx = bit_idx;
155 	gate->flags = clk_gate_flags;
156 	gate->lock = lock;
157 	gate->hw.init = &init;
158 
159 	hw = &gate->hw;
160 	ret = clk_hw_register(dev, hw);
161 	if (ret) {
162 		kfree(gate);
163 		hw = ERR_PTR(ret);
164 	}
165 
166 	return hw;
167 }
168 EXPORT_SYMBOL_GPL(clk_hw_register_gate);
169 
clk_register_gate(struct device * dev,const char * name,const char * parent_name,unsigned long flags,void __iomem * reg,u8 bit_idx,u8 clk_gate_flags,spinlock_t * lock)170 struct clk *clk_register_gate(struct device *dev, const char *name,
171 		const char *parent_name, unsigned long flags,
172 		void __iomem *reg, u8 bit_idx,
173 		u8 clk_gate_flags, spinlock_t *lock)
174 {
175 	struct clk_hw *hw;
176 
177 	hw = clk_hw_register_gate(dev, name, parent_name, flags, reg,
178 				  bit_idx, clk_gate_flags, lock);
179 	if (IS_ERR(hw))
180 		return ERR_CAST(hw);
181 	return hw->clk;
182 }
183 EXPORT_SYMBOL_GPL(clk_register_gate);
184 
clk_unregister_gate(struct clk * clk)185 void clk_unregister_gate(struct clk *clk)
186 {
187 	struct clk_gate *gate;
188 	struct clk_hw *hw;
189 
190 	hw = __clk_get_hw(clk);
191 	if (!hw)
192 		return;
193 
194 	gate = to_clk_gate(hw);
195 
196 	clk_unregister(clk);
197 	kfree(gate);
198 }
199 EXPORT_SYMBOL_GPL(clk_unregister_gate);
200 
clk_hw_unregister_gate(struct clk_hw * hw)201 void clk_hw_unregister_gate(struct clk_hw *hw)
202 {
203 	struct clk_gate *gate;
204 
205 	gate = to_clk_gate(hw);
206 
207 	clk_hw_unregister(hw);
208 	kfree(gate);
209 }
210 EXPORT_SYMBOL_GPL(clk_hw_unregister_gate);
211