1 /*
2  * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
3  *
4  * Authors:
5  *    Jyri Sarha <jsarha@ti.com>
6  *    Sergej Sawazki <ce3a@gmx.de>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * Gpio controlled clock implementation
13  */
14 
15 #include <linux/clk-provider.h>
16 #include <linux/export.h>
17 #include <linux/slab.h>
18 #include <linux/gpio/consumer.h>
19 #include <linux/err.h>
20 #include <linux/device.h>
21 #include <linux/platform_device.h>
22 #include <linux/of_device.h>
23 
24 /**
25  * DOC: basic gpio gated clock which can be enabled and disabled
26  *      with gpio output
27  * Traits of this clock:
28  * prepare - clk_(un)prepare only ensures parent is (un)prepared
29  * enable - clk_enable and clk_disable are functional & control gpio
30  * rate - inherits rate from parent.  No clk_set_rate support
31  * parent - fixed parent.  No clk_set_parent support
32  */
33 
clk_gpio_gate_enable(struct clk_hw * hw)34 static int clk_gpio_gate_enable(struct clk_hw *hw)
35 {
36 	struct clk_gpio *clk = to_clk_gpio(hw);
37 
38 	gpiod_set_value(clk->gpiod, 1);
39 
40 	return 0;
41 }
42 
clk_gpio_gate_disable(struct clk_hw * hw)43 static void clk_gpio_gate_disable(struct clk_hw *hw)
44 {
45 	struct clk_gpio *clk = to_clk_gpio(hw);
46 
47 	gpiod_set_value(clk->gpiod, 0);
48 }
49 
clk_gpio_gate_is_enabled(struct clk_hw * hw)50 static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
51 {
52 	struct clk_gpio *clk = to_clk_gpio(hw);
53 
54 	return gpiod_get_value(clk->gpiod);
55 }
56 
57 const struct clk_ops clk_gpio_gate_ops = {
58 	.enable = clk_gpio_gate_enable,
59 	.disable = clk_gpio_gate_disable,
60 	.is_enabled = clk_gpio_gate_is_enabled,
61 };
62 EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
63 
64 /**
65  * DOC: basic clock multiplexer which can be controlled with a gpio output
66  * Traits of this clock:
67  * prepare - clk_prepare only ensures that parents are prepared
68  * rate - rate is only affected by parent switching.  No clk_set_rate support
69  * parent - parent is adjustable through clk_set_parent
70  */
71 
clk_gpio_mux_get_parent(struct clk_hw * hw)72 static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
73 {
74 	struct clk_gpio *clk = to_clk_gpio(hw);
75 
76 	return gpiod_get_value_cansleep(clk->gpiod);
77 }
78 
clk_gpio_mux_set_parent(struct clk_hw * hw,u8 index)79 static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
80 {
81 	struct clk_gpio *clk = to_clk_gpio(hw);
82 
83 	gpiod_set_value_cansleep(clk->gpiod, index);
84 
85 	return 0;
86 }
87 
88 const struct clk_ops clk_gpio_mux_ops = {
89 	.get_parent = clk_gpio_mux_get_parent,
90 	.set_parent = clk_gpio_mux_set_parent,
91 	.determine_rate = __clk_mux_determine_rate,
92 };
93 EXPORT_SYMBOL_GPL(clk_gpio_mux_ops);
94 
clk_register_gpio(struct device * dev,const char * name,const char * const * parent_names,u8 num_parents,struct gpio_desc * gpiod,unsigned long flags,const struct clk_ops * clk_gpio_ops)95 static struct clk_hw *clk_register_gpio(struct device *dev, const char *name,
96 		const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
97 		unsigned long flags, const struct clk_ops *clk_gpio_ops)
98 {
99 	struct clk_gpio *clk_gpio;
100 	struct clk_hw *hw;
101 	struct clk_init_data init = {};
102 	int err;
103 
104 	if (dev)
105 		clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio),	GFP_KERNEL);
106 	else
107 		clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
108 
109 	if (!clk_gpio)
110 		return ERR_PTR(-ENOMEM);
111 
112 	init.name = name;
113 	init.ops = clk_gpio_ops;
114 	init.flags = flags | CLK_IS_BASIC;
115 	init.parent_names = parent_names;
116 	init.num_parents = num_parents;
117 
118 	clk_gpio->gpiod = gpiod;
119 	clk_gpio->hw.init = &init;
120 
121 	hw = &clk_gpio->hw;
122 	if (dev)
123 		err = devm_clk_hw_register(dev, hw);
124 	else
125 		err = clk_hw_register(NULL, hw);
126 
127 	if (!err)
128 		return hw;
129 
130 	if (!dev) {
131 		kfree(clk_gpio);
132 	}
133 
134 	return ERR_PTR(err);
135 }
136 
137 /**
138  * clk_hw_register_gpio_gate - register a gpio clock gate with the clock
139  * framework
140  * @dev: device that is registering this clock
141  * @name: name of this clock
142  * @parent_name: name of this clock's parent
143  * @gpiod: gpio descriptor to gate this clock
144  * @flags: clock flags
145  */
clk_hw_register_gpio_gate(struct device * dev,const char * name,const char * parent_name,struct gpio_desc * gpiod,unsigned long flags)146 struct clk_hw *clk_hw_register_gpio_gate(struct device *dev, const char *name,
147 		const char *parent_name, struct gpio_desc *gpiod,
148 		unsigned long flags)
149 {
150 	return clk_register_gpio(dev, name,
151 			(parent_name ? &parent_name : NULL),
152 			(parent_name ? 1 : 0), gpiod, flags,
153 			&clk_gpio_gate_ops);
154 }
155 EXPORT_SYMBOL_GPL(clk_hw_register_gpio_gate);
156 
clk_register_gpio_gate(struct device * dev,const char * name,const char * parent_name,struct gpio_desc * gpiod,unsigned long flags)157 struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
158 		const char *parent_name, struct gpio_desc *gpiod,
159 		unsigned long flags)
160 {
161 	struct clk_hw *hw;
162 
163 	hw = clk_hw_register_gpio_gate(dev, name, parent_name, gpiod, flags);
164 	if (IS_ERR(hw))
165 		return ERR_CAST(hw);
166 	return hw->clk;
167 }
168 EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
169 
170 /**
171  * clk_hw_register_gpio_mux - register a gpio clock mux with the clock framework
172  * @dev: device that is registering this clock
173  * @name: name of this clock
174  * @parent_names: names of this clock's parents
175  * @num_parents: number of parents listed in @parent_names
176  * @gpiod: gpio descriptor to gate this clock
177  * @flags: clock flags
178  */
clk_hw_register_gpio_mux(struct device * dev,const char * name,const char * const * parent_names,u8 num_parents,struct gpio_desc * gpiod,unsigned long flags)179 struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, const char *name,
180 		const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
181 		unsigned long flags)
182 {
183 	if (num_parents != 2) {
184 		pr_err("mux-clock %s must have 2 parents\n", name);
185 		return ERR_PTR(-EINVAL);
186 	}
187 
188 	return clk_register_gpio(dev, name, parent_names, num_parents,
189 			gpiod, flags, &clk_gpio_mux_ops);
190 }
191 EXPORT_SYMBOL_GPL(clk_hw_register_gpio_mux);
192 
clk_register_gpio_mux(struct device * dev,const char * name,const char * const * parent_names,u8 num_parents,struct gpio_desc * gpiod,unsigned long flags)193 struct clk *clk_register_gpio_mux(struct device *dev, const char *name,
194 		const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
195 		unsigned long flags)
196 {
197 	struct clk_hw *hw;
198 
199 	hw = clk_hw_register_gpio_mux(dev, name, parent_names, num_parents,
200 			gpiod, flags);
201 	if (IS_ERR(hw))
202 		return ERR_CAST(hw);
203 	return hw->clk;
204 }
205 EXPORT_SYMBOL_GPL(clk_register_gpio_mux);
206 
gpio_clk_driver_probe(struct platform_device * pdev)207 static int gpio_clk_driver_probe(struct platform_device *pdev)
208 {
209 	struct device_node *node = pdev->dev.of_node;
210 	const char **parent_names, *gpio_name;
211 	unsigned int num_parents;
212 	struct gpio_desc *gpiod;
213 	struct clk *clk;
214 	bool is_mux;
215 	int ret;
216 
217 	num_parents = of_clk_get_parent_count(node);
218 	if (num_parents) {
219 		parent_names = devm_kcalloc(&pdev->dev, num_parents,
220 					    sizeof(char *), GFP_KERNEL);
221 		if (!parent_names)
222 			return -ENOMEM;
223 
224 		of_clk_parent_fill(node, parent_names, num_parents);
225 	} else {
226 		parent_names = NULL;
227 	}
228 
229 	is_mux = of_device_is_compatible(node, "gpio-mux-clock");
230 
231 	gpio_name = is_mux ? "select" : "enable";
232 	gpiod = devm_gpiod_get(&pdev->dev, gpio_name, GPIOD_OUT_LOW);
233 	if (IS_ERR(gpiod)) {
234 		ret = PTR_ERR(gpiod);
235 		if (ret == -EPROBE_DEFER)
236 			pr_debug("%s: %s: GPIOs not yet available, retry later\n",
237 					node->name, __func__);
238 		else
239 			pr_err("%s: %s: Can't get '%s' named GPIO property\n",
240 					node->name, __func__,
241 					gpio_name);
242 		return ret;
243 	}
244 
245 	if (is_mux)
246 		clk = clk_register_gpio_mux(&pdev->dev, node->name,
247 				parent_names, num_parents, gpiod, 0);
248 	else
249 		clk = clk_register_gpio_gate(&pdev->dev, node->name,
250 				parent_names ?  parent_names[0] : NULL, gpiod,
251 				CLK_SET_RATE_PARENT);
252 	if (IS_ERR(clk))
253 		return PTR_ERR(clk);
254 
255 	return of_clk_add_provider(node, of_clk_src_simple_get, clk);
256 }
257 
258 static const struct of_device_id gpio_clk_match_table[] = {
259 	{ .compatible = "gpio-mux-clock" },
260 	{ .compatible = "gpio-gate-clock" },
261 	{ }
262 };
263 
264 static struct platform_driver gpio_clk_driver = {
265 	.probe		= gpio_clk_driver_probe,
266 	.driver		= {
267 		.name	= "gpio-clk",
268 		.of_match_table = gpio_clk_match_table,
269 	},
270 };
271 builtin_platform_driver(gpio_clk_driver);
272