1 /*
2 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
3 *
4 * Licensed under the terms of the GNU GPL License version 2.
5 *
6 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
7 */
8
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/cpufreq.h>
13 #include <linux/timex.h>
14
15 #include <asm/msr.h>
16 #include <asm/processor.h>
17 #include <asm/cpu_device_id.h>
18
19 static struct cpufreq_driver longrun_driver;
20
21 /**
22 * longrun_{low,high}_freq is needed for the conversion of cpufreq kHz
23 * values into per cent values. In TMTA microcode, the following is valid:
24 * performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
25 */
26 static unsigned int longrun_low_freq, longrun_high_freq;
27
28
29 /**
30 * longrun_get_policy - get the current LongRun policy
31 * @policy: struct cpufreq_policy where current policy is written into
32 *
33 * Reads the current LongRun policy by access to MSR_TMTA_LONGRUN_FLAGS
34 * and MSR_TMTA_LONGRUN_CTRL
35 */
longrun_get_policy(struct cpufreq_policy * policy)36 static void longrun_get_policy(struct cpufreq_policy *policy)
37 {
38 u32 msr_lo, msr_hi;
39
40 rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
41 pr_debug("longrun flags are %x - %x\n", msr_lo, msr_hi);
42 if (msr_lo & 0x01)
43 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
44 else
45 policy->policy = CPUFREQ_POLICY_POWERSAVE;
46
47 rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
48 pr_debug("longrun ctrl is %x - %x\n", msr_lo, msr_hi);
49 msr_lo &= 0x0000007F;
50 msr_hi &= 0x0000007F;
51
52 if (longrun_high_freq <= longrun_low_freq) {
53 /* Assume degenerate Longrun table */
54 policy->min = policy->max = longrun_high_freq;
55 } else {
56 policy->min = longrun_low_freq + msr_lo *
57 ((longrun_high_freq - longrun_low_freq) / 100);
58 policy->max = longrun_low_freq + msr_hi *
59 ((longrun_high_freq - longrun_low_freq) / 100);
60 }
61 policy->cpu = 0;
62 }
63
64
65 /**
66 * longrun_set_policy - sets a new CPUFreq policy
67 * @policy: new policy
68 *
69 * Sets a new CPUFreq policy on LongRun-capable processors. This function
70 * has to be called with cpufreq_driver locked.
71 */
longrun_set_policy(struct cpufreq_policy * policy)72 static int longrun_set_policy(struct cpufreq_policy *policy)
73 {
74 u32 msr_lo, msr_hi;
75 u32 pctg_lo, pctg_hi;
76
77 if (!policy)
78 return -EINVAL;
79
80 if (longrun_high_freq <= longrun_low_freq) {
81 /* Assume degenerate Longrun table */
82 pctg_lo = pctg_hi = 100;
83 } else {
84 pctg_lo = (policy->min - longrun_low_freq) /
85 ((longrun_high_freq - longrun_low_freq) / 100);
86 pctg_hi = (policy->max - longrun_low_freq) /
87 ((longrun_high_freq - longrun_low_freq) / 100);
88 }
89
90 if (pctg_hi > 100)
91 pctg_hi = 100;
92 if (pctg_lo > pctg_hi)
93 pctg_lo = pctg_hi;
94
95 /* performance or economy mode */
96 rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
97 msr_lo &= 0xFFFFFFFE;
98 switch (policy->policy) {
99 case CPUFREQ_POLICY_PERFORMANCE:
100 msr_lo |= 0x00000001;
101 break;
102 case CPUFREQ_POLICY_POWERSAVE:
103 break;
104 }
105 wrmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
106
107 /* lower and upper boundary */
108 rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
109 msr_lo &= 0xFFFFFF80;
110 msr_hi &= 0xFFFFFF80;
111 msr_lo |= pctg_lo;
112 msr_hi |= pctg_hi;
113 wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
114
115 return 0;
116 }
117
118
119 /**
120 * longrun_verify_poliy - verifies a new CPUFreq policy
121 * @policy: the policy to verify
122 *
123 * Validates a new CPUFreq policy. This function has to be called with
124 * cpufreq_driver locked.
125 */
longrun_verify_policy(struct cpufreq_policy * policy)126 static int longrun_verify_policy(struct cpufreq_policy *policy)
127 {
128 if (!policy)
129 return -EINVAL;
130
131 policy->cpu = 0;
132 cpufreq_verify_within_cpu_limits(policy);
133
134 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
135 (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
136 return -EINVAL;
137
138 return 0;
139 }
140
longrun_get(unsigned int cpu)141 static unsigned int longrun_get(unsigned int cpu)
142 {
143 u32 eax, ebx, ecx, edx;
144
145 if (cpu)
146 return 0;
147
148 cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
149 pr_debug("cpuid eax is %u\n", eax);
150
151 return eax * 1000;
152 }
153
154 /**
155 * longrun_determine_freqs - determines the lowest and highest possible core frequency
156 * @low_freq: an int to put the lowest frequency into
157 * @high_freq: an int to put the highest frequency into
158 *
159 * Determines the lowest and highest possible core frequencies on this CPU.
160 * This is necessary to calculate the performance percentage according to
161 * TMTA rules:
162 * performance_pctg = (target_freq - low_freq)/(high_freq - low_freq)
163 */
longrun_determine_freqs(unsigned int * low_freq,unsigned int * high_freq)164 static int longrun_determine_freqs(unsigned int *low_freq,
165 unsigned int *high_freq)
166 {
167 u32 msr_lo, msr_hi;
168 u32 save_lo, save_hi;
169 u32 eax, ebx, ecx, edx;
170 u32 try_hi;
171 struct cpuinfo_x86 *c = &cpu_data(0);
172
173 if (!low_freq || !high_freq)
174 return -EINVAL;
175
176 if (cpu_has(c, X86_FEATURE_LRTI)) {
177 /* if the LongRun Table Interface is present, the
178 * detection is a bit easier:
179 * For minimum frequency, read out the maximum
180 * level (msr_hi), write that into "currently
181 * selected level", and read out the frequency.
182 * For maximum frequency, read out level zero.
183 */
184 /* minimum */
185 rdmsr(MSR_TMTA_LRTI_READOUT, msr_lo, msr_hi);
186 wrmsr(MSR_TMTA_LRTI_READOUT, msr_hi, msr_hi);
187 rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
188 *low_freq = msr_lo * 1000; /* to kHz */
189
190 /* maximum */
191 wrmsr(MSR_TMTA_LRTI_READOUT, 0, msr_hi);
192 rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
193 *high_freq = msr_lo * 1000; /* to kHz */
194
195 pr_debug("longrun table interface told %u - %u kHz\n",
196 *low_freq, *high_freq);
197
198 if (*low_freq > *high_freq)
199 *low_freq = *high_freq;
200 return 0;
201 }
202
203 /* set the upper border to the value determined during TSC init */
204 *high_freq = (cpu_khz / 1000);
205 *high_freq = *high_freq * 1000;
206 pr_debug("high frequency is %u kHz\n", *high_freq);
207
208 /* get current borders */
209 rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
210 save_lo = msr_lo & 0x0000007F;
211 save_hi = msr_hi & 0x0000007F;
212
213 /* if current perf_pctg is larger than 90%, we need to decrease the
214 * upper limit to make the calculation more accurate.
215 */
216 cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
217 /* try decreasing in 10% steps, some processors react only
218 * on some barrier values */
219 for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -= 10) {
220 /* set to 0 to try_hi perf_pctg */
221 msr_lo &= 0xFFFFFF80;
222 msr_hi &= 0xFFFFFF80;
223 msr_hi |= try_hi;
224 wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
225
226 /* read out current core MHz and current perf_pctg */
227 cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
228
229 /* restore values */
230 wrmsr(MSR_TMTA_LONGRUN_CTRL, save_lo, save_hi);
231 }
232 pr_debug("percentage is %u %%, freq is %u MHz\n", ecx, eax);
233
234 /* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
235 * eqals
236 * low_freq * (1 - perf_pctg) = (cur_freq - high_freq * perf_pctg)
237 *
238 * high_freq * perf_pctg is stored tempoarily into "ebx".
239 */
240 ebx = (((cpu_khz / 1000) * ecx) / 100); /* to MHz */
241
242 if ((ecx > 95) || (ecx == 0) || (eax < ebx))
243 return -EIO;
244
245 edx = ((eax - ebx) * 100) / (100 - ecx);
246 *low_freq = edx * 1000; /* back to kHz */
247
248 pr_debug("low frequency is %u kHz\n", *low_freq);
249
250 if (*low_freq > *high_freq)
251 *low_freq = *high_freq;
252
253 return 0;
254 }
255
256
longrun_cpu_init(struct cpufreq_policy * policy)257 static int longrun_cpu_init(struct cpufreq_policy *policy)
258 {
259 int result = 0;
260
261 /* capability check */
262 if (policy->cpu != 0)
263 return -ENODEV;
264
265 /* detect low and high frequency */
266 result = longrun_determine_freqs(&longrun_low_freq, &longrun_high_freq);
267 if (result)
268 return result;
269
270 /* cpuinfo and default policy values */
271 policy->cpuinfo.min_freq = longrun_low_freq;
272 policy->cpuinfo.max_freq = longrun_high_freq;
273 longrun_get_policy(policy);
274
275 return 0;
276 }
277
278
279 static struct cpufreq_driver longrun_driver = {
280 .flags = CPUFREQ_CONST_LOOPS,
281 .verify = longrun_verify_policy,
282 .setpolicy = longrun_set_policy,
283 .get = longrun_get,
284 .init = longrun_cpu_init,
285 .name = "longrun",
286 };
287
288 static const struct x86_cpu_id longrun_ids[] = {
289 { X86_VENDOR_TRANSMETA, X86_FAMILY_ANY, X86_MODEL_ANY,
290 X86_FEATURE_LONGRUN },
291 {}
292 };
293 MODULE_DEVICE_TABLE(x86cpu, longrun_ids);
294
295 /**
296 * longrun_init - initializes the Transmeta Crusoe LongRun CPUFreq driver
297 *
298 * Initializes the LongRun support.
299 */
longrun_init(void)300 static int __init longrun_init(void)
301 {
302 if (!x86_match_cpu(longrun_ids))
303 return -ENODEV;
304 return cpufreq_register_driver(&longrun_driver);
305 }
306
307
308 /**
309 * longrun_exit - unregisters LongRun support
310 */
longrun_exit(void)311 static void __exit longrun_exit(void)
312 {
313 cpufreq_unregister_driver(&longrun_driver);
314 }
315
316
317 MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
318 MODULE_DESCRIPTION("LongRun driver for Transmeta Crusoe and "
319 "Efficeon processors.");
320 MODULE_LICENSE("GPL");
321
322 module_init(longrun_init);
323 module_exit(longrun_exit);
324