1 /*
2 * Copyright (C) 2007 PA Semi, Inc
3 *
4 * Authors: Egor Martovetsky <egor@pasemi.com>
5 * Olof Johansson <olof@lixom.net>
6 *
7 * Maintained by: Olof Johansson <olof@lixom.net>
8 *
9 * Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
10 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 */
27
28 #include <linux/cpufreq.h>
29 #include <linux/timer.h>
30 #include <linux/module.h>
31 #include <linux/of_address.h>
32
33 #include <asm/hw_irq.h>
34 #include <asm/io.h>
35 #include <asm/prom.h>
36 #include <asm/time.h>
37 #include <asm/smp.h>
38
39 #define SDCASR_REG 0x0100
40 #define SDCASR_REG_STRIDE 0x1000
41 #define SDCPWR_CFGA0_REG 0x0100
42 #define SDCPWR_PWST0_REG 0x0000
43 #define SDCPWR_GIZTIME_REG 0x0440
44
45 /* SDCPWR_GIZTIME_REG fields */
46 #define SDCPWR_GIZTIME_GR 0x80000000
47 #define SDCPWR_GIZTIME_LONGLOCK 0x000000ff
48
49 /* Offset of ASR registers from SDC base */
50 #define SDCASR_OFFSET 0x120000
51
52 static void __iomem *sdcpwr_mapbase;
53 static void __iomem *sdcasr_mapbase;
54
55 /* Current astate, is used when waking up from power savings on
56 * one core, in case the other core has switched states during
57 * the idle time.
58 */
59 static int current_astate;
60
61 /* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
62 static struct cpufreq_frequency_table pas_freqs[] = {
63 {0, 0, 0},
64 {0, 1, 0},
65 {0, 2, 0},
66 {0, 3, 0},
67 {0, 4, 0},
68 {0, 0, CPUFREQ_TABLE_END},
69 };
70
71 /*
72 * hardware specific functions
73 */
74
get_astate_freq(int astate)75 static int get_astate_freq(int astate)
76 {
77 u32 ret;
78 ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));
79
80 return ret & 0x3f;
81 }
82
get_cur_astate(int cpu)83 static int get_cur_astate(int cpu)
84 {
85 u32 ret;
86
87 ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
88 ret = (ret >> (cpu * 4)) & 0x7;
89
90 return ret;
91 }
92
get_gizmo_latency(void)93 static int get_gizmo_latency(void)
94 {
95 u32 giztime, ret;
96
97 giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);
98
99 /* just provide the upper bound */
100 if (giztime & SDCPWR_GIZTIME_GR)
101 ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
102 else
103 ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;
104
105 return ret;
106 }
107
set_astate(int cpu,unsigned int astate)108 static void set_astate(int cpu, unsigned int astate)
109 {
110 unsigned long flags;
111
112 /* Return if called before init has run */
113 if (unlikely(!sdcasr_mapbase))
114 return;
115
116 local_irq_save(flags);
117
118 out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);
119
120 local_irq_restore(flags);
121 }
122
check_astate(void)123 int check_astate(void)
124 {
125 return get_cur_astate(hard_smp_processor_id());
126 }
127
restore_astate(int cpu)128 void restore_astate(int cpu)
129 {
130 set_astate(cpu, current_astate);
131 }
132
133 /*
134 * cpufreq functions
135 */
136
pas_cpufreq_cpu_init(struct cpufreq_policy * policy)137 static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
138 {
139 struct cpufreq_frequency_table *pos;
140 const u32 *max_freqp;
141 u32 max_freq;
142 int cur_astate, idx;
143 struct resource res;
144 struct device_node *cpu, *dn;
145 int err = -ENODEV;
146
147 cpu = of_get_cpu_node(policy->cpu, NULL);
148 if (!cpu)
149 goto out;
150
151 max_freqp = of_get_property(cpu, "clock-frequency", NULL);
152 of_node_put(cpu);
153 if (!max_freqp) {
154 err = -EINVAL;
155 goto out;
156 }
157
158 /* we need the freq in kHz */
159 max_freq = *max_freqp / 1000;
160
161 dn = of_find_compatible_node(NULL, NULL, "1682m-sdc");
162 if (!dn)
163 dn = of_find_compatible_node(NULL, NULL,
164 "pasemi,pwrficient-sdc");
165 if (!dn)
166 goto out;
167 err = of_address_to_resource(dn, 0, &res);
168 of_node_put(dn);
169 if (err)
170 goto out;
171 sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
172 if (!sdcasr_mapbase) {
173 err = -EINVAL;
174 goto out;
175 }
176
177 dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo");
178 if (!dn)
179 dn = of_find_compatible_node(NULL, NULL,
180 "pasemi,pwrficient-gizmo");
181 if (!dn) {
182 err = -ENODEV;
183 goto out_unmap_sdcasr;
184 }
185 err = of_address_to_resource(dn, 0, &res);
186 of_node_put(dn);
187 if (err)
188 goto out_unmap_sdcasr;
189 sdcpwr_mapbase = ioremap(res.start, 0x1000);
190 if (!sdcpwr_mapbase) {
191 err = -EINVAL;
192 goto out_unmap_sdcasr;
193 }
194
195 pr_debug("init cpufreq on CPU %d\n", policy->cpu);
196 pr_debug("max clock-frequency is at %u kHz\n", max_freq);
197 pr_debug("initializing frequency table\n");
198
199 /* initialize frequency table */
200 cpufreq_for_each_entry_idx(pos, pas_freqs, idx) {
201 pos->frequency = get_astate_freq(pos->driver_data) * 100000;
202 pr_debug("%d: %d\n", idx, pos->frequency);
203 }
204
205 cur_astate = get_cur_astate(policy->cpu);
206 pr_debug("current astate is at %d\n",cur_astate);
207
208 policy->cur = pas_freqs[cur_astate].frequency;
209 ppc_proc_freq = policy->cur * 1000ul;
210
211 return cpufreq_generic_init(policy, pas_freqs, get_gizmo_latency());
212
213 out_unmap_sdcasr:
214 iounmap(sdcasr_mapbase);
215 out:
216 return err;
217 }
218
pas_cpufreq_cpu_exit(struct cpufreq_policy * policy)219 static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
220 {
221 /*
222 * We don't support CPU hotplug. Don't unmap after the system
223 * has already made it to a running state.
224 */
225 if (system_state >= SYSTEM_RUNNING)
226 return 0;
227
228 if (sdcasr_mapbase)
229 iounmap(sdcasr_mapbase);
230 if (sdcpwr_mapbase)
231 iounmap(sdcpwr_mapbase);
232
233 return 0;
234 }
235
pas_cpufreq_target(struct cpufreq_policy * policy,unsigned int pas_astate_new)236 static int pas_cpufreq_target(struct cpufreq_policy *policy,
237 unsigned int pas_astate_new)
238 {
239 int i;
240
241 pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
242 policy->cpu,
243 pas_freqs[pas_astate_new].frequency,
244 pas_freqs[pas_astate_new].driver_data);
245
246 current_astate = pas_astate_new;
247
248 for_each_online_cpu(i)
249 set_astate(i, pas_astate_new);
250
251 ppc_proc_freq = pas_freqs[pas_astate_new].frequency * 1000ul;
252 return 0;
253 }
254
255 static struct cpufreq_driver pas_cpufreq_driver = {
256 .name = "pas-cpufreq",
257 .flags = CPUFREQ_CONST_LOOPS,
258 .init = pas_cpufreq_cpu_init,
259 .exit = pas_cpufreq_cpu_exit,
260 .verify = cpufreq_generic_frequency_table_verify,
261 .target_index = pas_cpufreq_target,
262 .attr = cpufreq_generic_attr,
263 };
264
265 /*
266 * module init and destoy
267 */
268
pas_cpufreq_init(void)269 static int __init pas_cpufreq_init(void)
270 {
271 if (!of_machine_is_compatible("PA6T-1682M") &&
272 !of_machine_is_compatible("pasemi,pwrficient"))
273 return -ENODEV;
274
275 return cpufreq_register_driver(&pas_cpufreq_driver);
276 }
277
pas_cpufreq_exit(void)278 static void __exit pas_cpufreq_exit(void)
279 {
280 cpufreq_unregister_driver(&pas_cpufreq_driver);
281 }
282
283 module_init(pas_cpufreq_init);
284 module_exit(pas_cpufreq_exit);
285
286 MODULE_LICENSE("GPL");
287 MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");
288