1 /*
2  *  Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
3  *  Copyright (C) 2004        John Steele Scott <toojays@toojays.net>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * TODO: Need a big cleanup here. Basically, we need to have different
10  * cpufreq_driver structures for the different type of HW instead of the
11  * current mess. We also need to better deal with the detection of the
12  * type of machine.
13  *
14  */
15 
16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17 
18 #include <linux/module.h>
19 #include <linux/types.h>
20 #include <linux/errno.h>
21 #include <linux/kernel.h>
22 #include <linux/delay.h>
23 #include <linux/sched.h>
24 #include <linux/adb.h>
25 #include <linux/pmu.h>
26 #include <linux/cpufreq.h>
27 #include <linux/init.h>
28 #include <linux/device.h>
29 #include <linux/hardirq.h>
30 #include <linux/of_device.h>
31 #include <asm/prom.h>
32 #include <asm/machdep.h>
33 #include <asm/irq.h>
34 #include <asm/pmac_feature.h>
35 #include <asm/mmu_context.h>
36 #include <asm/sections.h>
37 #include <asm/cputable.h>
38 #include <asm/time.h>
39 #include <asm/mpic.h>
40 #include <asm/keylargo.h>
41 #include <asm/switch_to.h>
42 
43 /* WARNING !!! This will cause calibrate_delay() to be called,
44  * but this is an __init function ! So you MUST go edit
45  * init/main.c to make it non-init before enabling DEBUG_FREQ
46  */
47 #undef DEBUG_FREQ
48 
49 extern void low_choose_7447a_dfs(int dfs);
50 extern void low_choose_750fx_pll(int pll);
51 extern void low_sleep_handler(void);
52 
53 /*
54  * Currently, PowerMac cpufreq supports only high & low frequencies
55  * that are set by the firmware
56  */
57 static unsigned int low_freq;
58 static unsigned int hi_freq;
59 static unsigned int cur_freq;
60 static unsigned int sleep_freq;
61 static unsigned long transition_latency;
62 
63 /*
64  * Different models uses different mechanisms to switch the frequency
65  */
66 static int (*set_speed_proc)(int low_speed);
67 static unsigned int (*get_speed_proc)(void);
68 
69 /*
70  * Some definitions used by the various speedprocs
71  */
72 static u32 voltage_gpio;
73 static u32 frequency_gpio;
74 static u32 slew_done_gpio;
75 static int no_schedule;
76 static int has_cpu_l2lve;
77 static int is_pmu_based;
78 
79 /* There are only two frequency states for each processor. Values
80  * are in kHz for the time being.
81  */
82 #define CPUFREQ_HIGH                  0
83 #define CPUFREQ_LOW                   1
84 
85 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
86 	{0, CPUFREQ_HIGH,	0},
87 	{0, CPUFREQ_LOW,	0},
88 	{0, 0,			CPUFREQ_TABLE_END},
89 };
90 
local_delay(unsigned long ms)91 static inline void local_delay(unsigned long ms)
92 {
93 	if (no_schedule)
94 		mdelay(ms);
95 	else
96 		msleep(ms);
97 }
98 
99 #ifdef DEBUG_FREQ
debug_calc_bogomips(void)100 static inline void debug_calc_bogomips(void)
101 {
102 	/* This will cause a recalc of bogomips and display the
103 	 * result. We backup/restore the value to avoid affecting the
104 	 * core cpufreq framework's own calculation.
105 	 */
106 	unsigned long save_lpj = loops_per_jiffy;
107 	calibrate_delay();
108 	loops_per_jiffy = save_lpj;
109 }
110 #endif /* DEBUG_FREQ */
111 
112 /* Switch CPU speed under 750FX CPU control
113  */
cpu_750fx_cpu_speed(int low_speed)114 static int cpu_750fx_cpu_speed(int low_speed)
115 {
116 	u32 hid2;
117 
118 	if (low_speed == 0) {
119 		/* ramping up, set voltage first */
120 		pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
121 		/* Make sure we sleep for at least 1ms */
122 		local_delay(10);
123 
124 		/* tweak L2 for high voltage */
125 		if (has_cpu_l2lve) {
126 			hid2 = mfspr(SPRN_HID2);
127 			hid2 &= ~0x2000;
128 			mtspr(SPRN_HID2, hid2);
129 		}
130 	}
131 #ifdef CONFIG_6xx
132 	low_choose_750fx_pll(low_speed);
133 #endif
134 	if (low_speed == 1) {
135 		/* tweak L2 for low voltage */
136 		if (has_cpu_l2lve) {
137 			hid2 = mfspr(SPRN_HID2);
138 			hid2 |= 0x2000;
139 			mtspr(SPRN_HID2, hid2);
140 		}
141 
142 		/* ramping down, set voltage last */
143 		pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
144 		local_delay(10);
145 	}
146 
147 	return 0;
148 }
149 
cpu_750fx_get_cpu_speed(void)150 static unsigned int cpu_750fx_get_cpu_speed(void)
151 {
152 	if (mfspr(SPRN_HID1) & HID1_PS)
153 		return low_freq;
154 	else
155 		return hi_freq;
156 }
157 
158 /* Switch CPU speed using DFS */
dfs_set_cpu_speed(int low_speed)159 static int dfs_set_cpu_speed(int low_speed)
160 {
161 	if (low_speed == 0) {
162 		/* ramping up, set voltage first */
163 		pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
164 		/* Make sure we sleep for at least 1ms */
165 		local_delay(1);
166 	}
167 
168 	/* set frequency */
169 #ifdef CONFIG_6xx
170 	low_choose_7447a_dfs(low_speed);
171 #endif
172 	udelay(100);
173 
174 	if (low_speed == 1) {
175 		/* ramping down, set voltage last */
176 		pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
177 		local_delay(1);
178 	}
179 
180 	return 0;
181 }
182 
dfs_get_cpu_speed(void)183 static unsigned int dfs_get_cpu_speed(void)
184 {
185 	if (mfspr(SPRN_HID1) & HID1_DFS)
186 		return low_freq;
187 	else
188 		return hi_freq;
189 }
190 
191 
192 /* Switch CPU speed using slewing GPIOs
193  */
gpios_set_cpu_speed(int low_speed)194 static int gpios_set_cpu_speed(int low_speed)
195 {
196 	int gpio, timeout = 0;
197 
198 	/* If ramping up, set voltage first */
199 	if (low_speed == 0) {
200 		pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
201 		/* Delay is way too big but it's ok, we schedule */
202 		local_delay(10);
203 	}
204 
205 	/* Set frequency */
206 	gpio = 	pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
207 	if (low_speed == ((gpio & 0x01) == 0))
208 		goto skip;
209 
210 	pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
211 			  low_speed ? 0x04 : 0x05);
212 	udelay(200);
213 	do {
214 		if (++timeout > 100)
215 			break;
216 		local_delay(1);
217 		gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
218 	} while((gpio & 0x02) == 0);
219  skip:
220 	/* If ramping down, set voltage last */
221 	if (low_speed == 1) {
222 		pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
223 		/* Delay is way too big but it's ok, we schedule */
224 		local_delay(10);
225 	}
226 
227 #ifdef DEBUG_FREQ
228 	debug_calc_bogomips();
229 #endif
230 
231 	return 0;
232 }
233 
234 /* Switch CPU speed under PMU control
235  */
pmu_set_cpu_speed(int low_speed)236 static int pmu_set_cpu_speed(int low_speed)
237 {
238 	struct adb_request req;
239 	unsigned long save_l2cr;
240 	unsigned long save_l3cr;
241 	unsigned int pic_prio;
242 	unsigned long flags;
243 
244 	preempt_disable();
245 
246 #ifdef DEBUG_FREQ
247 	printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
248 #endif
249 	pmu_suspend();
250 
251 	/* Disable all interrupt sources on openpic */
252  	pic_prio = mpic_cpu_get_priority();
253 	mpic_cpu_set_priority(0xf);
254 
255 	/* Make sure the decrementer won't interrupt us */
256 	asm volatile("mtdec %0" : : "r" (0x7fffffff));
257 	/* Make sure any pending DEC interrupt occurring while we did
258 	 * the above didn't re-enable the DEC */
259 	mb();
260 	asm volatile("mtdec %0" : : "r" (0x7fffffff));
261 
262 	/* We can now disable MSR_EE */
263 	local_irq_save(flags);
264 
265 	/* Giveup the FPU & vec */
266 	enable_kernel_fp();
267 
268 #ifdef CONFIG_ALTIVEC
269 	if (cpu_has_feature(CPU_FTR_ALTIVEC))
270 		enable_kernel_altivec();
271 #endif /* CONFIG_ALTIVEC */
272 
273 	/* Save & disable L2 and L3 caches */
274 	save_l3cr = _get_L3CR();	/* (returns -1 if not available) */
275 	save_l2cr = _get_L2CR();	/* (returns -1 if not available) */
276 
277 	/* Send the new speed command. My assumption is that this command
278 	 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
279 	 */
280 	pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
281 	while (!req.complete)
282 		pmu_poll();
283 
284 	/* Prepare the northbridge for the speed transition */
285 	pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
286 
287 	/* Call low level code to backup CPU state and recover from
288 	 * hardware reset
289 	 */
290 	low_sleep_handler();
291 
292 	/* Restore the northbridge */
293 	pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
294 
295 	/* Restore L2 cache */
296 	if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
297  		_set_L2CR(save_l2cr);
298 	/* Restore L3 cache */
299 	if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
300  		_set_L3CR(save_l3cr);
301 
302 	/* Restore userland MMU context */
303 	switch_mmu_context(NULL, current->active_mm, NULL);
304 
305 #ifdef DEBUG_FREQ
306 	printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
307 #endif
308 
309 	/* Restore low level PMU operations */
310 	pmu_unlock();
311 
312 	/*
313 	 * Restore decrementer; we'll take a decrementer interrupt
314 	 * as soon as interrupts are re-enabled and the generic
315 	 * clockevents code will reprogram it with the right value.
316 	 */
317 	set_dec(1);
318 
319 	/* Restore interrupts */
320  	mpic_cpu_set_priority(pic_prio);
321 
322 	/* Let interrupts flow again ... */
323 	local_irq_restore(flags);
324 
325 #ifdef DEBUG_FREQ
326 	debug_calc_bogomips();
327 #endif
328 
329 	pmu_resume();
330 
331 	preempt_enable();
332 
333 	return 0;
334 }
335 
do_set_cpu_speed(struct cpufreq_policy * policy,int speed_mode)336 static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode)
337 {
338 	unsigned long l3cr;
339 	static unsigned long prev_l3cr;
340 
341 	if (speed_mode == CPUFREQ_LOW &&
342 	    cpu_has_feature(CPU_FTR_L3CR)) {
343 		l3cr = _get_L3CR();
344 		if (l3cr & L3CR_L3E) {
345 			prev_l3cr = l3cr;
346 			_set_L3CR(0);
347 		}
348 	}
349 	set_speed_proc(speed_mode == CPUFREQ_LOW);
350 	if (speed_mode == CPUFREQ_HIGH &&
351 	    cpu_has_feature(CPU_FTR_L3CR)) {
352 		l3cr = _get_L3CR();
353 		if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
354 			_set_L3CR(prev_l3cr);
355 	}
356 	cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
357 
358 	return 0;
359 }
360 
pmac_cpufreq_get_speed(unsigned int cpu)361 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
362 {
363 	return cur_freq;
364 }
365 
pmac_cpufreq_target(struct cpufreq_policy * policy,unsigned int index)366 static int pmac_cpufreq_target(	struct cpufreq_policy *policy,
367 					unsigned int index)
368 {
369 	int		rc;
370 
371 	rc = do_set_cpu_speed(policy, index);
372 
373 	ppc_proc_freq = cur_freq * 1000ul;
374 	return rc;
375 }
376 
pmac_cpufreq_cpu_init(struct cpufreq_policy * policy)377 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
378 {
379 	return cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency);
380 }
381 
read_gpio(struct device_node * np)382 static u32 read_gpio(struct device_node *np)
383 {
384 	const u32 *reg = of_get_property(np, "reg", NULL);
385 	u32 offset;
386 
387 	if (reg == NULL)
388 		return 0;
389 	/* That works for all keylargos but shall be fixed properly
390 	 * some day... The problem is that it seems we can't rely
391 	 * on the "reg" property of the GPIO nodes, they are either
392 	 * relative to the base of KeyLargo or to the base of the
393 	 * GPIO space, and the device-tree doesn't help.
394 	 */
395 	offset = *reg;
396 	if (offset < KEYLARGO_GPIO_LEVELS0)
397 		offset += KEYLARGO_GPIO_LEVELS0;
398 	return offset;
399 }
400 
pmac_cpufreq_suspend(struct cpufreq_policy * policy)401 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
402 {
403 	/* Ok, this could be made a bit smarter, but let's be robust for now. We
404 	 * always force a speed change to high speed before sleep, to make sure
405 	 * we have appropriate voltage and/or bus speed for the wakeup process,
406 	 * and to make sure our loops_per_jiffies are "good enough", that is will
407 	 * not cause too short delays if we sleep in low speed and wake in high
408 	 * speed..
409 	 */
410 	no_schedule = 1;
411 	sleep_freq = cur_freq;
412 	if (cur_freq == low_freq && !is_pmu_based)
413 		do_set_cpu_speed(policy, CPUFREQ_HIGH);
414 	return 0;
415 }
416 
pmac_cpufreq_resume(struct cpufreq_policy * policy)417 static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
418 {
419 	/* If we resume, first check if we have a get() function */
420 	if (get_speed_proc)
421 		cur_freq = get_speed_proc();
422 	else
423 		cur_freq = 0;
424 
425 	/* We don't, hrm... we don't really know our speed here, best
426 	 * is that we force a switch to whatever it was, which is
427 	 * probably high speed due to our suspend() routine
428 	 */
429 	do_set_cpu_speed(policy, sleep_freq == low_freq ?
430 			 CPUFREQ_LOW : CPUFREQ_HIGH);
431 
432 	ppc_proc_freq = cur_freq * 1000ul;
433 
434 	no_schedule = 0;
435 	return 0;
436 }
437 
438 static struct cpufreq_driver pmac_cpufreq_driver = {
439 	.verify 	= cpufreq_generic_frequency_table_verify,
440 	.target_index	= pmac_cpufreq_target,
441 	.get		= pmac_cpufreq_get_speed,
442 	.init		= pmac_cpufreq_cpu_init,
443 	.suspend	= pmac_cpufreq_suspend,
444 	.resume		= pmac_cpufreq_resume,
445 	.flags		= CPUFREQ_PM_NO_WARN |
446 			  CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
447 	.attr		= cpufreq_generic_attr,
448 	.name		= "powermac",
449 };
450 
451 
pmac_cpufreq_init_MacRISC3(struct device_node * cpunode)452 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
453 {
454 	struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
455 								"voltage-gpio");
456 	struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
457 								"frequency-gpio");
458 	struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
459 								     "slewing-done");
460 	const u32 *value;
461 
462 	/*
463 	 * Check to see if it's GPIO driven or PMU only
464 	 *
465 	 * The way we extract the GPIO address is slightly hackish, but it
466 	 * works well enough for now. We need to abstract the whole GPIO
467 	 * stuff sooner or later anyway
468 	 */
469 
470 	if (volt_gpio_np)
471 		voltage_gpio = read_gpio(volt_gpio_np);
472 	if (freq_gpio_np)
473 		frequency_gpio = read_gpio(freq_gpio_np);
474 	if (slew_done_gpio_np)
475 		slew_done_gpio = read_gpio(slew_done_gpio_np);
476 
477 	of_node_put(volt_gpio_np);
478 	of_node_put(freq_gpio_np);
479 	of_node_put(slew_done_gpio_np);
480 
481 	/* If we use the frequency GPIOs, calculate the min/max speeds based
482 	 * on the bus frequencies
483 	 */
484 	if (frequency_gpio && slew_done_gpio) {
485 		int lenp, rc;
486 		const u32 *freqs, *ratio;
487 
488 		freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
489 		lenp /= sizeof(u32);
490 		if (freqs == NULL || lenp != 2) {
491 			pr_err("bus-frequencies incorrect or missing\n");
492 			return 1;
493 		}
494 		ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
495 						NULL);
496 		if (ratio == NULL) {
497 			pr_err("processor-to-bus-ratio*2 missing\n");
498 			return 1;
499 		}
500 
501 		/* Get the min/max bus frequencies */
502 		low_freq = min(freqs[0], freqs[1]);
503 		hi_freq = max(freqs[0], freqs[1]);
504 
505 		/* Grrrr.. It _seems_ that the device-tree is lying on the low bus
506 		 * frequency, it claims it to be around 84Mhz on some models while
507 		 * it appears to be approx. 101Mhz on all. Let's hack around here...
508 		 * fortunately, we don't need to be too precise
509 		 */
510 		if (low_freq < 98000000)
511 			low_freq = 101000000;
512 
513 		/* Convert those to CPU core clocks */
514 		low_freq = (low_freq * (*ratio)) / 2000;
515 		hi_freq = (hi_freq * (*ratio)) / 2000;
516 
517 		/* Now we get the frequencies, we read the GPIO to see what is out current
518 		 * speed
519 		 */
520 		rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
521 		cur_freq = (rc & 0x01) ? hi_freq : low_freq;
522 
523 		set_speed_proc = gpios_set_cpu_speed;
524 		return 1;
525 	}
526 
527 	/* If we use the PMU, look for the min & max frequencies in the
528 	 * device-tree
529 	 */
530 	value = of_get_property(cpunode, "min-clock-frequency", NULL);
531 	if (!value)
532 		return 1;
533 	low_freq = (*value) / 1000;
534 	/* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
535 	 * here */
536 	if (low_freq < 100000)
537 		low_freq *= 10;
538 
539 	value = of_get_property(cpunode, "max-clock-frequency", NULL);
540 	if (!value)
541 		return 1;
542 	hi_freq = (*value) / 1000;
543 	set_speed_proc = pmu_set_cpu_speed;
544 	is_pmu_based = 1;
545 
546 	return 0;
547 }
548 
pmac_cpufreq_init_7447A(struct device_node * cpunode)549 static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
550 {
551 	struct device_node *volt_gpio_np;
552 
553 	if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
554 		return 1;
555 
556 	volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
557 	if (volt_gpio_np)
558 		voltage_gpio = read_gpio(volt_gpio_np);
559 	of_node_put(volt_gpio_np);
560 	if (!voltage_gpio){
561 		pr_err("missing cpu-vcore-select gpio\n");
562 		return 1;
563 	}
564 
565 	/* OF only reports the high frequency */
566 	hi_freq = cur_freq;
567 	low_freq = cur_freq/2;
568 
569 	/* Read actual frequency from CPU */
570 	cur_freq = dfs_get_cpu_speed();
571 	set_speed_proc = dfs_set_cpu_speed;
572 	get_speed_proc = dfs_get_cpu_speed;
573 
574 	return 0;
575 }
576 
pmac_cpufreq_init_750FX(struct device_node * cpunode)577 static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
578 {
579 	struct device_node *volt_gpio_np;
580 	u32 pvr;
581 	const u32 *value;
582 
583 	if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
584 		return 1;
585 
586 	hi_freq = cur_freq;
587 	value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
588 	if (!value)
589 		return 1;
590 	low_freq = (*value) / 1000;
591 
592 	volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
593 	if (volt_gpio_np)
594 		voltage_gpio = read_gpio(volt_gpio_np);
595 
596 	of_node_put(volt_gpio_np);
597 	pvr = mfspr(SPRN_PVR);
598 	has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
599 
600 	set_speed_proc = cpu_750fx_cpu_speed;
601 	get_speed_proc = cpu_750fx_get_cpu_speed;
602 	cur_freq = cpu_750fx_get_cpu_speed();
603 
604 	return 0;
605 }
606 
607 /* Currently, we support the following machines:
608  *
609  *  - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
610  *  - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
611  *  - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
612  *  - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
613  *  - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
614  *  - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
615  *  - Recent MacRISC3 laptops
616  *  - All new machines with 7447A CPUs
617  */
pmac_cpufreq_setup(void)618 static int __init pmac_cpufreq_setup(void)
619 {
620 	struct device_node	*cpunode;
621 	const u32		*value;
622 
623 	if (strstr(boot_command_line, "nocpufreq"))
624 		return 0;
625 
626 	/* Get first CPU node */
627 	cpunode = of_cpu_device_node_get(0);
628 	if (!cpunode)
629 		goto out;
630 
631 	/* Get current cpu clock freq */
632 	value = of_get_property(cpunode, "clock-frequency", NULL);
633 	if (!value)
634 		goto out;
635 	cur_freq = (*value) / 1000;
636 
637 	/*  Check for 7447A based MacRISC3 */
638 	if (of_machine_is_compatible("MacRISC3") &&
639 	    of_get_property(cpunode, "dynamic-power-step", NULL) &&
640 	    PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
641 		pmac_cpufreq_init_7447A(cpunode);
642 
643 		/* Allow dynamic switching */
644 		transition_latency = 8000000;
645 		pmac_cpufreq_driver.flags &= ~CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING;
646 	/* Check for other MacRISC3 machines */
647 	} else if (of_machine_is_compatible("PowerBook3,4") ||
648 		   of_machine_is_compatible("PowerBook3,5") ||
649 		   of_machine_is_compatible("MacRISC3")) {
650 		pmac_cpufreq_init_MacRISC3(cpunode);
651 	/* Else check for iBook2 500/600 */
652 	} else if (of_machine_is_compatible("PowerBook4,1")) {
653 		hi_freq = cur_freq;
654 		low_freq = 400000;
655 		set_speed_proc = pmu_set_cpu_speed;
656 		is_pmu_based = 1;
657 	}
658 	/* Else check for TiPb 550 */
659 	else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
660 		hi_freq = cur_freq;
661 		low_freq = 500000;
662 		set_speed_proc = pmu_set_cpu_speed;
663 		is_pmu_based = 1;
664 	}
665 	/* Else check for TiPb 400 & 500 */
666 	else if (of_machine_is_compatible("PowerBook3,2")) {
667 		/* We only know about the 400 MHz and the 500Mhz model
668 		 * they both have 300 MHz as low frequency
669 		 */
670 		if (cur_freq < 350000 || cur_freq > 550000)
671 			goto out;
672 		hi_freq = cur_freq;
673 		low_freq = 300000;
674 		set_speed_proc = pmu_set_cpu_speed;
675 		is_pmu_based = 1;
676 	}
677 	/* Else check for 750FX */
678 	else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
679 		pmac_cpufreq_init_750FX(cpunode);
680 out:
681 	of_node_put(cpunode);
682 	if (set_speed_proc == NULL)
683 		return -ENODEV;
684 
685 	pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
686 	pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
687 	ppc_proc_freq = cur_freq * 1000ul;
688 
689 	pr_info("Registering PowerMac CPU frequency driver\n");
690 	pr_info("Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
691 		low_freq/1000, hi_freq/1000, cur_freq/1000);
692 
693 	return cpufreq_register_driver(&pmac_cpufreq_driver);
694 }
695 
696 module_init(pmac_cpufreq_setup);
697 
698