1 /*
2  *   (c) 2003-2012 Advanced Micro Devices, Inc.
3  *  Your use of this code is subject to the terms and conditions of the
4  *  GNU general public license version 2. See "COPYING" or
5  *  http://www.gnu.org/licenses/gpl.html
6  *
7  *  Maintainer:
8  *  Andreas Herrmann <herrmann.der.user@googlemail.com>
9  *
10  *  Based on the powernow-k7.c module written by Dave Jones.
11  *  (C) 2003 Dave Jones on behalf of SuSE Labs
12  *  (C) 2004 Dominik Brodowski <linux@brodo.de>
13  *  (C) 2004 Pavel Machek <pavel@ucw.cz>
14  *  Licensed under the terms of the GNU GPL License version 2.
15  *  Based upon datasheets & sample CPUs kindly provided by AMD.
16  *
17  *  Valuable input gratefully received from Dave Jones, Pavel Machek,
18  *  Dominik Brodowski, Jacob Shin, and others.
19  *  Originally developed by Paul Devriendt.
20  *
21  *  Processor information obtained from Chapter 9 (Power and Thermal
22  *  Management) of the "BIOS and Kernel Developer's Guide (BKDG) for
23  *  the AMD Athlon 64 and AMD Opteron Processors" and section "2.x
24  *  Power Management" in BKDGs for newer AMD CPU families.
25  *
26  *  Tables for specific CPUs can be inferred from AMD's processor
27  *  power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf)
28  */
29 
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31 
32 #include <linux/kernel.h>
33 #include <linux/smp.h>
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/cpufreq.h>
37 #include <linux/slab.h>
38 #include <linux/string.h>
39 #include <linux/cpumask.h>
40 #include <linux/io.h>
41 #include <linux/delay.h>
42 
43 #include <asm/msr.h>
44 #include <asm/cpu_device_id.h>
45 
46 #include <linux/acpi.h>
47 #include <linux/mutex.h>
48 #include <acpi/processor.h>
49 
50 #define VERSION "version 2.20.00"
51 #include "powernow-k8.h"
52 
53 /* serialize freq changes  */
54 static DEFINE_MUTEX(fidvid_mutex);
55 
56 static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
57 
58 static struct cpufreq_driver cpufreq_amd64_driver;
59 
60 /* Return a frequency in MHz, given an input fid */
find_freq_from_fid(u32 fid)61 static u32 find_freq_from_fid(u32 fid)
62 {
63 	return 800 + (fid * 100);
64 }
65 
66 /* Return a frequency in KHz, given an input fid */
find_khz_freq_from_fid(u32 fid)67 static u32 find_khz_freq_from_fid(u32 fid)
68 {
69 	return 1000 * find_freq_from_fid(fid);
70 }
71 
72 /* Return the vco fid for an input fid
73  *
74  * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
75  * only from corresponding high fids. This returns "high" fid corresponding to
76  * "low" one.
77  */
convert_fid_to_vco_fid(u32 fid)78 static u32 convert_fid_to_vco_fid(u32 fid)
79 {
80 	if (fid < HI_FID_TABLE_BOTTOM)
81 		return 8 + (2 * fid);
82 	else
83 		return fid;
84 }
85 
86 /*
87  * Return 1 if the pending bit is set. Unless we just instructed the processor
88  * to transition to a new state, seeing this bit set is really bad news.
89  */
pending_bit_stuck(void)90 static int pending_bit_stuck(void)
91 {
92 	u32 lo, hi;
93 
94 	rdmsr(MSR_FIDVID_STATUS, lo, hi);
95 	return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
96 }
97 
98 /*
99  * Update the global current fid / vid values from the status msr.
100  * Returns 1 on error.
101  */
query_current_values_with_pending_wait(struct powernow_k8_data * data)102 static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
103 {
104 	u32 lo, hi;
105 	u32 i = 0;
106 
107 	do {
108 		if (i++ > 10000) {
109 			pr_debug("detected change pending stuck\n");
110 			return 1;
111 		}
112 		rdmsr(MSR_FIDVID_STATUS, lo, hi);
113 	} while (lo & MSR_S_LO_CHANGE_PENDING);
114 
115 	data->currvid = hi & MSR_S_HI_CURRENT_VID;
116 	data->currfid = lo & MSR_S_LO_CURRENT_FID;
117 
118 	return 0;
119 }
120 
121 /* the isochronous relief time */
count_off_irt(struct powernow_k8_data * data)122 static void count_off_irt(struct powernow_k8_data *data)
123 {
124 	udelay((1 << data->irt) * 10);
125 }
126 
127 /* the voltage stabilization time */
count_off_vst(struct powernow_k8_data * data)128 static void count_off_vst(struct powernow_k8_data *data)
129 {
130 	udelay(data->vstable * VST_UNITS_20US);
131 }
132 
133 /* need to init the control msr to a safe value (for each cpu) */
fidvid_msr_init(void)134 static void fidvid_msr_init(void)
135 {
136 	u32 lo, hi;
137 	u8 fid, vid;
138 
139 	rdmsr(MSR_FIDVID_STATUS, lo, hi);
140 	vid = hi & MSR_S_HI_CURRENT_VID;
141 	fid = lo & MSR_S_LO_CURRENT_FID;
142 	lo = fid | (vid << MSR_C_LO_VID_SHIFT);
143 	hi = MSR_C_HI_STP_GNT_BENIGN;
144 	pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
145 	wrmsr(MSR_FIDVID_CTL, lo, hi);
146 }
147 
148 /* write the new fid value along with the other control fields to the msr */
write_new_fid(struct powernow_k8_data * data,u32 fid)149 static int write_new_fid(struct powernow_k8_data *data, u32 fid)
150 {
151 	u32 lo;
152 	u32 savevid = data->currvid;
153 	u32 i = 0;
154 
155 	if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
156 		pr_err("internal error - overflow on fid write\n");
157 		return 1;
158 	}
159 
160 	lo = fid;
161 	lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
162 	lo |= MSR_C_LO_INIT_FID_VID;
163 
164 	pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
165 		fid, lo, data->plllock * PLL_LOCK_CONVERSION);
166 
167 	do {
168 		wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
169 		if (i++ > 100) {
170 			pr_err("Hardware error - pending bit very stuck - no further pstate changes possible\n");
171 			return 1;
172 		}
173 	} while (query_current_values_with_pending_wait(data));
174 
175 	count_off_irt(data);
176 
177 	if (savevid != data->currvid) {
178 		pr_err("vid change on fid trans, old 0x%x, new 0x%x\n",
179 		       savevid, data->currvid);
180 		return 1;
181 	}
182 
183 	if (fid != data->currfid) {
184 		pr_err("fid trans failed, fid 0x%x, curr 0x%x\n", fid,
185 			data->currfid);
186 		return 1;
187 	}
188 
189 	return 0;
190 }
191 
192 /* Write a new vid to the hardware */
write_new_vid(struct powernow_k8_data * data,u32 vid)193 static int write_new_vid(struct powernow_k8_data *data, u32 vid)
194 {
195 	u32 lo;
196 	u32 savefid = data->currfid;
197 	int i = 0;
198 
199 	if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
200 		pr_err("internal error - overflow on vid write\n");
201 		return 1;
202 	}
203 
204 	lo = data->currfid;
205 	lo |= (vid << MSR_C_LO_VID_SHIFT);
206 	lo |= MSR_C_LO_INIT_FID_VID;
207 
208 	pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
209 		vid, lo, STOP_GRANT_5NS);
210 
211 	do {
212 		wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
213 		if (i++ > 100) {
214 			pr_err("internal error - pending bit very stuck - no further pstate changes possible\n");
215 			return 1;
216 		}
217 	} while (query_current_values_with_pending_wait(data));
218 
219 	if (savefid != data->currfid) {
220 		pr_err("fid changed on vid trans, old 0x%x new 0x%x\n",
221 			savefid, data->currfid);
222 		return 1;
223 	}
224 
225 	if (vid != data->currvid) {
226 		pr_err("vid trans failed, vid 0x%x, curr 0x%x\n",
227 				vid, data->currvid);
228 		return 1;
229 	}
230 
231 	return 0;
232 }
233 
234 /*
235  * Reduce the vid by the max of step or reqvid.
236  * Decreasing vid codes represent increasing voltages:
237  * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
238  */
decrease_vid_code_by_step(struct powernow_k8_data * data,u32 reqvid,u32 step)239 static int decrease_vid_code_by_step(struct powernow_k8_data *data,
240 		u32 reqvid, u32 step)
241 {
242 	if ((data->currvid - reqvid) > step)
243 		reqvid = data->currvid - step;
244 
245 	if (write_new_vid(data, reqvid))
246 		return 1;
247 
248 	count_off_vst(data);
249 
250 	return 0;
251 }
252 
253 /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
transition_fid_vid(struct powernow_k8_data * data,u32 reqfid,u32 reqvid)254 static int transition_fid_vid(struct powernow_k8_data *data,
255 		u32 reqfid, u32 reqvid)
256 {
257 	if (core_voltage_pre_transition(data, reqvid, reqfid))
258 		return 1;
259 
260 	if (core_frequency_transition(data, reqfid))
261 		return 1;
262 
263 	if (core_voltage_post_transition(data, reqvid))
264 		return 1;
265 
266 	if (query_current_values_with_pending_wait(data))
267 		return 1;
268 
269 	if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
270 		pr_err("failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
271 				smp_processor_id(),
272 				reqfid, reqvid, data->currfid, data->currvid);
273 		return 1;
274 	}
275 
276 	pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
277 		smp_processor_id(), data->currfid, data->currvid);
278 
279 	return 0;
280 }
281 
282 /* Phase 1 - core voltage transition ... setup voltage */
core_voltage_pre_transition(struct powernow_k8_data * data,u32 reqvid,u32 reqfid)283 static int core_voltage_pre_transition(struct powernow_k8_data *data,
284 		u32 reqvid, u32 reqfid)
285 {
286 	u32 rvosteps = data->rvo;
287 	u32 savefid = data->currfid;
288 	u32 maxvid, lo, rvomult = 1;
289 
290 	pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
291 		smp_processor_id(),
292 		data->currfid, data->currvid, reqvid, data->rvo);
293 
294 	if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP))
295 		rvomult = 2;
296 	rvosteps *= rvomult;
297 	rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
298 	maxvid = 0x1f & (maxvid >> 16);
299 	pr_debug("ph1 maxvid=0x%x\n", maxvid);
300 	if (reqvid < maxvid) /* lower numbers are higher voltages */
301 		reqvid = maxvid;
302 
303 	while (data->currvid > reqvid) {
304 		pr_debug("ph1: curr 0x%x, req vid 0x%x\n",
305 			data->currvid, reqvid);
306 		if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
307 			return 1;
308 	}
309 
310 	while ((rvosteps > 0) &&
311 			((rvomult * data->rvo + data->currvid) > reqvid)) {
312 		if (data->currvid == maxvid) {
313 			rvosteps = 0;
314 		} else {
315 			pr_debug("ph1: changing vid for rvo, req 0x%x\n",
316 				data->currvid - 1);
317 			if (decrease_vid_code_by_step(data, data->currvid-1, 1))
318 				return 1;
319 			rvosteps--;
320 		}
321 	}
322 
323 	if (query_current_values_with_pending_wait(data))
324 		return 1;
325 
326 	if (savefid != data->currfid) {
327 		pr_err("ph1 err, currfid changed 0x%x\n", data->currfid);
328 		return 1;
329 	}
330 
331 	pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n",
332 		data->currfid, data->currvid);
333 
334 	return 0;
335 }
336 
337 /* Phase 2 - core frequency transition */
core_frequency_transition(struct powernow_k8_data * data,u32 reqfid)338 static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
339 {
340 	u32 vcoreqfid, vcocurrfid, vcofiddiff;
341 	u32 fid_interval, savevid = data->currvid;
342 
343 	if (data->currfid == reqfid) {
344 		pr_err("ph2 null fid transition 0x%x\n", data->currfid);
345 		return 0;
346 	}
347 
348 	pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
349 		smp_processor_id(),
350 		data->currfid, data->currvid, reqfid);
351 
352 	vcoreqfid = convert_fid_to_vco_fid(reqfid);
353 	vcocurrfid = convert_fid_to_vco_fid(data->currfid);
354 	vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
355 	    : vcoreqfid - vcocurrfid;
356 
357 	if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP))
358 		vcofiddiff = 0;
359 
360 	while (vcofiddiff > 2) {
361 		(data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
362 
363 		if (reqfid > data->currfid) {
364 			if (data->currfid > LO_FID_TABLE_TOP) {
365 				if (write_new_fid(data,
366 						data->currfid + fid_interval))
367 					return 1;
368 			} else {
369 				if (write_new_fid
370 				    (data,
371 				     2 + convert_fid_to_vco_fid(data->currfid)))
372 					return 1;
373 			}
374 		} else {
375 			if (write_new_fid(data, data->currfid - fid_interval))
376 				return 1;
377 		}
378 
379 		vcocurrfid = convert_fid_to_vco_fid(data->currfid);
380 		vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
381 		    : vcoreqfid - vcocurrfid;
382 	}
383 
384 	if (write_new_fid(data, reqfid))
385 		return 1;
386 
387 	if (query_current_values_with_pending_wait(data))
388 		return 1;
389 
390 	if (data->currfid != reqfid) {
391 		pr_err("ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
392 			data->currfid, reqfid);
393 		return 1;
394 	}
395 
396 	if (savevid != data->currvid) {
397 		pr_err("ph2: vid changed, save 0x%x, curr 0x%x\n",
398 			savevid, data->currvid);
399 		return 1;
400 	}
401 
402 	pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n",
403 		data->currfid, data->currvid);
404 
405 	return 0;
406 }
407 
408 /* Phase 3 - core voltage transition flow ... jump to the final vid. */
core_voltage_post_transition(struct powernow_k8_data * data,u32 reqvid)409 static int core_voltage_post_transition(struct powernow_k8_data *data,
410 		u32 reqvid)
411 {
412 	u32 savefid = data->currfid;
413 	u32 savereqvid = reqvid;
414 
415 	pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
416 		smp_processor_id(),
417 		data->currfid, data->currvid);
418 
419 	if (reqvid != data->currvid) {
420 		if (write_new_vid(data, reqvid))
421 			return 1;
422 
423 		if (savefid != data->currfid) {
424 			pr_err("ph3: bad fid change, save 0x%x, curr 0x%x\n",
425 				savefid, data->currfid);
426 			return 1;
427 		}
428 
429 		if (data->currvid != reqvid) {
430 			pr_err("ph3: failed vid transition\n, req 0x%x, curr 0x%x",
431 				reqvid, data->currvid);
432 			return 1;
433 		}
434 	}
435 
436 	if (query_current_values_with_pending_wait(data))
437 		return 1;
438 
439 	if (savereqvid != data->currvid) {
440 		pr_debug("ph3 failed, currvid 0x%x\n", data->currvid);
441 		return 1;
442 	}
443 
444 	if (savefid != data->currfid) {
445 		pr_debug("ph3 failed, currfid changed 0x%x\n",
446 			data->currfid);
447 		return 1;
448 	}
449 
450 	pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n",
451 		data->currfid, data->currvid);
452 
453 	return 0;
454 }
455 
456 static const struct x86_cpu_id powernow_k8_ids[] = {
457 	/* IO based frequency switching */
458 	{ X86_VENDOR_AMD, 0xf },
459 	{}
460 };
461 MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids);
462 
check_supported_cpu(void * _rc)463 static void check_supported_cpu(void *_rc)
464 {
465 	u32 eax, ebx, ecx, edx;
466 	int *rc = _rc;
467 
468 	*rc = -ENODEV;
469 
470 	eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
471 
472 	if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
473 		if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
474 		    ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
475 			pr_info("Processor cpuid %x not supported\n", eax);
476 			return;
477 		}
478 
479 		eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
480 		if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
481 			pr_info("No frequency change capabilities detected\n");
482 			return;
483 		}
484 
485 		cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
486 		if ((edx & P_STATE_TRANSITION_CAPABLE)
487 			!= P_STATE_TRANSITION_CAPABLE) {
488 			pr_info("Power state transitions not supported\n");
489 			return;
490 		}
491 		*rc = 0;
492 	}
493 }
494 
check_pst_table(struct powernow_k8_data * data,struct pst_s * pst,u8 maxvid)495 static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
496 		u8 maxvid)
497 {
498 	unsigned int j;
499 	u8 lastfid = 0xff;
500 
501 	for (j = 0; j < data->numps; j++) {
502 		if (pst[j].vid > LEAST_VID) {
503 			pr_err(FW_BUG "vid %d invalid : 0x%x\n", j,
504 				pst[j].vid);
505 			return -EINVAL;
506 		}
507 		if (pst[j].vid < data->rvo) {
508 			/* vid + rvo >= 0 */
509 			pr_err(FW_BUG "0 vid exceeded with pstate %d\n", j);
510 			return -ENODEV;
511 		}
512 		if (pst[j].vid < maxvid + data->rvo) {
513 			/* vid + rvo >= maxvid */
514 			pr_err(FW_BUG "maxvid exceeded with pstate %d\n", j);
515 			return -ENODEV;
516 		}
517 		if (pst[j].fid > MAX_FID) {
518 			pr_err(FW_BUG "maxfid exceeded with pstate %d\n", j);
519 			return -ENODEV;
520 		}
521 		if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
522 			/* Only first fid is allowed to be in "low" range */
523 			pr_err(FW_BUG "two low fids - %d : 0x%x\n", j,
524 				pst[j].fid);
525 			return -EINVAL;
526 		}
527 		if (pst[j].fid < lastfid)
528 			lastfid = pst[j].fid;
529 	}
530 	if (lastfid & 1) {
531 		pr_err(FW_BUG "lastfid invalid\n");
532 		return -EINVAL;
533 	}
534 	if (lastfid > LO_FID_TABLE_TOP)
535 		pr_info(FW_BUG "first fid not from lo freq table\n");
536 
537 	return 0;
538 }
539 
invalidate_entry(struct cpufreq_frequency_table * powernow_table,unsigned int entry)540 static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
541 		unsigned int entry)
542 {
543 	powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
544 }
545 
print_basics(struct powernow_k8_data * data)546 static void print_basics(struct powernow_k8_data *data)
547 {
548 	int j;
549 	for (j = 0; j < data->numps; j++) {
550 		if (data->powernow_table[j].frequency !=
551 				CPUFREQ_ENTRY_INVALID) {
552 			pr_info("fid 0x%x (%d MHz), vid 0x%x\n",
553 				data->powernow_table[j].driver_data & 0xff,
554 				data->powernow_table[j].frequency/1000,
555 				data->powernow_table[j].driver_data >> 8);
556 		}
557 	}
558 	if (data->batps)
559 		pr_info("Only %d pstates on battery\n", data->batps);
560 }
561 
fill_powernow_table(struct powernow_k8_data * data,struct pst_s * pst,u8 maxvid)562 static int fill_powernow_table(struct powernow_k8_data *data,
563 		struct pst_s *pst, u8 maxvid)
564 {
565 	struct cpufreq_frequency_table *powernow_table;
566 	unsigned int j;
567 
568 	if (data->batps) {
569 		/* use ACPI support to get full speed on mains power */
570 		pr_warn("Only %d pstates usable (use ACPI driver for full range\n",
571 			data->batps);
572 		data->numps = data->batps;
573 	}
574 
575 	for (j = 1; j < data->numps; j++) {
576 		if (pst[j-1].fid >= pst[j].fid) {
577 			pr_err("PST out of sequence\n");
578 			return -EINVAL;
579 		}
580 	}
581 
582 	if (data->numps < 2) {
583 		pr_err("no p states to transition\n");
584 		return -ENODEV;
585 	}
586 
587 	if (check_pst_table(data, pst, maxvid))
588 		return -EINVAL;
589 
590 	powernow_table = kzalloc((sizeof(*powernow_table)
591 		* (data->numps + 1)), GFP_KERNEL);
592 	if (!powernow_table)
593 		return -ENOMEM;
594 
595 	for (j = 0; j < data->numps; j++) {
596 		int freq;
597 		powernow_table[j].driver_data = pst[j].fid; /* lower 8 bits */
598 		powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */
599 		freq = find_khz_freq_from_fid(pst[j].fid);
600 		powernow_table[j].frequency = freq;
601 	}
602 	powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
603 	powernow_table[data->numps].driver_data = 0;
604 
605 	if (query_current_values_with_pending_wait(data)) {
606 		kfree(powernow_table);
607 		return -EIO;
608 	}
609 
610 	pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
611 	data->powernow_table = powernow_table;
612 	if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu)
613 		print_basics(data);
614 
615 	for (j = 0; j < data->numps; j++)
616 		if ((pst[j].fid == data->currfid) &&
617 		    (pst[j].vid == data->currvid))
618 			return 0;
619 
620 	pr_debug("currfid/vid do not match PST, ignoring\n");
621 	return 0;
622 }
623 
624 /* Find and validate the PSB/PST table in BIOS. */
find_psb_table(struct powernow_k8_data * data)625 static int find_psb_table(struct powernow_k8_data *data)
626 {
627 	struct psb_s *psb;
628 	unsigned int i;
629 	u32 mvs;
630 	u8 maxvid;
631 	u32 cpst = 0;
632 	u32 thiscpuid;
633 
634 	for (i = 0xc0000; i < 0xffff0; i += 0x10) {
635 		/* Scan BIOS looking for the signature. */
636 		/* It can not be at ffff0 - it is too big. */
637 
638 		psb = phys_to_virt(i);
639 		if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
640 			continue;
641 
642 		pr_debug("found PSB header at 0x%p\n", psb);
643 
644 		pr_debug("table vers: 0x%x\n", psb->tableversion);
645 		if (psb->tableversion != PSB_VERSION_1_4) {
646 			pr_err(FW_BUG "PSB table is not v1.4\n");
647 			return -ENODEV;
648 		}
649 
650 		pr_debug("flags: 0x%x\n", psb->flags1);
651 		if (psb->flags1) {
652 			pr_err(FW_BUG "unknown flags\n");
653 			return -ENODEV;
654 		}
655 
656 		data->vstable = psb->vstable;
657 		pr_debug("voltage stabilization time: %d(*20us)\n",
658 				data->vstable);
659 
660 		pr_debug("flags2: 0x%x\n", psb->flags2);
661 		data->rvo = psb->flags2 & 3;
662 		data->irt = ((psb->flags2) >> 2) & 3;
663 		mvs = ((psb->flags2) >> 4) & 3;
664 		data->vidmvs = 1 << mvs;
665 		data->batps = ((psb->flags2) >> 6) & 3;
666 
667 		pr_debug("ramp voltage offset: %d\n", data->rvo);
668 		pr_debug("isochronous relief time: %d\n", data->irt);
669 		pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
670 
671 		pr_debug("numpst: 0x%x\n", psb->num_tables);
672 		cpst = psb->num_tables;
673 		if ((psb->cpuid == 0x00000fc0) ||
674 		    (psb->cpuid == 0x00000fe0)) {
675 			thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
676 			if ((thiscpuid == 0x00000fc0) ||
677 			    (thiscpuid == 0x00000fe0))
678 				cpst = 1;
679 		}
680 		if (cpst != 1) {
681 			pr_err(FW_BUG "numpst must be 1\n");
682 			return -ENODEV;
683 		}
684 
685 		data->plllock = psb->plllocktime;
686 		pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
687 		pr_debug("maxfid: 0x%x\n", psb->maxfid);
688 		pr_debug("maxvid: 0x%x\n", psb->maxvid);
689 		maxvid = psb->maxvid;
690 
691 		data->numps = psb->numps;
692 		pr_debug("numpstates: 0x%x\n", data->numps);
693 		return fill_powernow_table(data,
694 				(struct pst_s *)(psb+1), maxvid);
695 	}
696 	/*
697 	 * If you see this message, complain to BIOS manufacturer. If
698 	 * he tells you "we do not support Linux" or some similar
699 	 * nonsense, remember that Windows 2000 uses the same legacy
700 	 * mechanism that the old Linux PSB driver uses. Tell them it
701 	 * is broken with Windows 2000.
702 	 *
703 	 * The reference to the AMD documentation is chapter 9 in the
704 	 * BIOS and Kernel Developer's Guide, which is available on
705 	 * www.amd.com
706 	 */
707 	pr_err(FW_BUG "No PSB or ACPI _PSS objects\n");
708 	pr_err("Make sure that your BIOS is up to date and Cool'N'Quiet support is enabled in BIOS setup\n");
709 	return -ENODEV;
710 }
711 
powernow_k8_acpi_pst_values(struct powernow_k8_data * data,unsigned int index)712 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
713 		unsigned int index)
714 {
715 	u64 control;
716 
717 	if (!data->acpi_data.state_count)
718 		return;
719 
720 	control = data->acpi_data.states[index].control;
721 	data->irt = (control >> IRT_SHIFT) & IRT_MASK;
722 	data->rvo = (control >> RVO_SHIFT) & RVO_MASK;
723 	data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
724 	data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK;
725 	data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK);
726 	data->vstable = (control >> VST_SHIFT) & VST_MASK;
727 }
728 
powernow_k8_cpu_init_acpi(struct powernow_k8_data * data)729 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
730 {
731 	struct cpufreq_frequency_table *powernow_table;
732 	int ret_val = -ENODEV;
733 	u64 control, status;
734 
735 	if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
736 		pr_debug("register performance failed: bad ACPI data\n");
737 		return -EIO;
738 	}
739 
740 	/* verify the data contained in the ACPI structures */
741 	if (data->acpi_data.state_count <= 1) {
742 		pr_debug("No ACPI P-States\n");
743 		goto err_out;
744 	}
745 
746 	control = data->acpi_data.control_register.space_id;
747 	status = data->acpi_data.status_register.space_id;
748 
749 	if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
750 	    (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
751 		pr_debug("Invalid control/status registers (%llx - %llx)\n",
752 			control, status);
753 		goto err_out;
754 	}
755 
756 	/* fill in data->powernow_table */
757 	powernow_table = kzalloc((sizeof(*powernow_table)
758 		* (data->acpi_data.state_count + 1)), GFP_KERNEL);
759 	if (!powernow_table)
760 		goto err_out;
761 
762 	/* fill in data */
763 	data->numps = data->acpi_data.state_count;
764 	powernow_k8_acpi_pst_values(data, 0);
765 
766 	ret_val = fill_powernow_table_fidvid(data, powernow_table);
767 	if (ret_val)
768 		goto err_out_mem;
769 
770 	powernow_table[data->acpi_data.state_count].frequency =
771 		CPUFREQ_TABLE_END;
772 	data->powernow_table = powernow_table;
773 
774 	if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu)
775 		print_basics(data);
776 
777 	/* notify BIOS that we exist */
778 	acpi_processor_notify_smm(THIS_MODULE);
779 
780 	if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
781 		pr_err("unable to alloc powernow_k8_data cpumask\n");
782 		ret_val = -ENOMEM;
783 		goto err_out_mem;
784 	}
785 
786 	return 0;
787 
788 err_out_mem:
789 	kfree(powernow_table);
790 
791 err_out:
792 	acpi_processor_unregister_performance(data->cpu);
793 
794 	/* data->acpi_data.state_count informs us at ->exit()
795 	 * whether ACPI was used */
796 	data->acpi_data.state_count = 0;
797 
798 	return ret_val;
799 }
800 
fill_powernow_table_fidvid(struct powernow_k8_data * data,struct cpufreq_frequency_table * powernow_table)801 static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
802 		struct cpufreq_frequency_table *powernow_table)
803 {
804 	int i;
805 
806 	for (i = 0; i < data->acpi_data.state_count; i++) {
807 		u32 fid;
808 		u32 vid;
809 		u32 freq, index;
810 		u64 status, control;
811 
812 		if (data->exttype) {
813 			status =  data->acpi_data.states[i].status;
814 			fid = status & EXT_FID_MASK;
815 			vid = (status >> VID_SHIFT) & EXT_VID_MASK;
816 		} else {
817 			control =  data->acpi_data.states[i].control;
818 			fid = control & FID_MASK;
819 			vid = (control >> VID_SHIFT) & VID_MASK;
820 		}
821 
822 		pr_debug("   %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
823 
824 		index = fid | (vid<<8);
825 		powernow_table[i].driver_data = index;
826 
827 		freq = find_khz_freq_from_fid(fid);
828 		powernow_table[i].frequency = freq;
829 
830 		/* verify frequency is OK */
831 		if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
832 			pr_debug("invalid freq %u kHz, ignoring\n", freq);
833 			invalidate_entry(powernow_table, i);
834 			continue;
835 		}
836 
837 		/* verify voltage is OK -
838 		 * BIOSs are using "off" to indicate invalid */
839 		if (vid == VID_OFF) {
840 			pr_debug("invalid vid %u, ignoring\n", vid);
841 			invalidate_entry(powernow_table, i);
842 			continue;
843 		}
844 
845 		if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
846 			pr_info("invalid freq entries %u kHz vs. %u kHz\n",
847 				freq, (unsigned int)
848 				(data->acpi_data.states[i].core_frequency
849 				 * 1000));
850 			invalidate_entry(powernow_table, i);
851 			continue;
852 		}
853 	}
854 	return 0;
855 }
856 
powernow_k8_cpu_exit_acpi(struct powernow_k8_data * data)857 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
858 {
859 	if (data->acpi_data.state_count)
860 		acpi_processor_unregister_performance(data->cpu);
861 	free_cpumask_var(data->acpi_data.shared_cpu_map);
862 }
863 
get_transition_latency(struct powernow_k8_data * data)864 static int get_transition_latency(struct powernow_k8_data *data)
865 {
866 	int max_latency = 0;
867 	int i;
868 	for (i = 0; i < data->acpi_data.state_count; i++) {
869 		int cur_latency = data->acpi_data.states[i].transition_latency
870 			+ data->acpi_data.states[i].bus_master_latency;
871 		if (cur_latency > max_latency)
872 			max_latency = cur_latency;
873 	}
874 	if (max_latency == 0) {
875 		pr_err(FW_WARN "Invalid zero transition latency\n");
876 		max_latency = 1;
877 	}
878 	/* value in usecs, needs to be in nanoseconds */
879 	return 1000 * max_latency;
880 }
881 
882 /* Take a frequency, and issue the fid/vid transition command */
transition_frequency_fidvid(struct powernow_k8_data * data,unsigned int index,struct cpufreq_policy * policy)883 static int transition_frequency_fidvid(struct powernow_k8_data *data,
884 		unsigned int index,
885 		struct cpufreq_policy *policy)
886 {
887 	u32 fid = 0;
888 	u32 vid = 0;
889 	int res;
890 	struct cpufreq_freqs freqs;
891 
892 	pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index);
893 
894 	/* fid/vid correctness check for k8 */
895 	/* fid are the lower 8 bits of the index we stored into
896 	 * the cpufreq frequency table in find_psb_table, vid
897 	 * are the upper 8 bits.
898 	 */
899 	fid = data->powernow_table[index].driver_data & 0xFF;
900 	vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8;
901 
902 	pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
903 
904 	if (query_current_values_with_pending_wait(data))
905 		return 1;
906 
907 	if ((data->currvid == vid) && (data->currfid == fid)) {
908 		pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n",
909 			fid, vid);
910 		return 0;
911 	}
912 
913 	pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n",
914 		smp_processor_id(), fid, vid);
915 	freqs.old = find_khz_freq_from_fid(data->currfid);
916 	freqs.new = find_khz_freq_from_fid(fid);
917 
918 	cpufreq_freq_transition_begin(policy, &freqs);
919 	res = transition_fid_vid(data, fid, vid);
920 	cpufreq_freq_transition_end(policy, &freqs, res);
921 
922 	return res;
923 }
924 
925 struct powernowk8_target_arg {
926 	struct cpufreq_policy		*pol;
927 	unsigned			newstate;
928 };
929 
powernowk8_target_fn(void * arg)930 static long powernowk8_target_fn(void *arg)
931 {
932 	struct powernowk8_target_arg *pta = arg;
933 	struct cpufreq_policy *pol = pta->pol;
934 	unsigned newstate = pta->newstate;
935 	struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
936 	u32 checkfid;
937 	u32 checkvid;
938 	int ret;
939 
940 	if (!data)
941 		return -EINVAL;
942 
943 	checkfid = data->currfid;
944 	checkvid = data->currvid;
945 
946 	if (pending_bit_stuck()) {
947 		pr_err("failing targ, change pending bit set\n");
948 		return -EIO;
949 	}
950 
951 	pr_debug("targ: cpu %d, %d kHz, min %d, max %d\n",
952 		pol->cpu, data->powernow_table[newstate].frequency, pol->min,
953 		pol->max);
954 
955 	if (query_current_values_with_pending_wait(data))
956 		return -EIO;
957 
958 	pr_debug("targ: curr fid 0x%x, vid 0x%x\n",
959 		data->currfid, data->currvid);
960 
961 	if ((checkvid != data->currvid) ||
962 	    (checkfid != data->currfid)) {
963 		pr_info("error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
964 		       checkfid, data->currfid,
965 		       checkvid, data->currvid);
966 	}
967 
968 	mutex_lock(&fidvid_mutex);
969 
970 	powernow_k8_acpi_pst_values(data, newstate);
971 
972 	ret = transition_frequency_fidvid(data, newstate, pol);
973 
974 	if (ret) {
975 		pr_err("transition frequency failed\n");
976 		mutex_unlock(&fidvid_mutex);
977 		return 1;
978 	}
979 	mutex_unlock(&fidvid_mutex);
980 
981 	pol->cur = find_khz_freq_from_fid(data->currfid);
982 
983 	return 0;
984 }
985 
986 /* Driver entry point to switch to the target frequency */
powernowk8_target(struct cpufreq_policy * pol,unsigned index)987 static int powernowk8_target(struct cpufreq_policy *pol, unsigned index)
988 {
989 	struct powernowk8_target_arg pta = { .pol = pol, .newstate = index };
990 
991 	return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta);
992 }
993 
994 struct init_on_cpu {
995 	struct powernow_k8_data *data;
996 	int rc;
997 };
998 
powernowk8_cpu_init_on_cpu(void * _init_on_cpu)999 static void powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
1000 {
1001 	struct init_on_cpu *init_on_cpu = _init_on_cpu;
1002 
1003 	if (pending_bit_stuck()) {
1004 		pr_err("failing init, change pending bit set\n");
1005 		init_on_cpu->rc = -ENODEV;
1006 		return;
1007 	}
1008 
1009 	if (query_current_values_with_pending_wait(init_on_cpu->data)) {
1010 		init_on_cpu->rc = -ENODEV;
1011 		return;
1012 	}
1013 
1014 	fidvid_msr_init();
1015 
1016 	init_on_cpu->rc = 0;
1017 }
1018 
1019 #define MISSING_PSS_MSG \
1020 	FW_BUG "No compatible ACPI _PSS objects found.\n" \
1021 	FW_BUG "First, make sure Cool'N'Quiet is enabled in the BIOS.\n" \
1022 	FW_BUG "If that doesn't help, try upgrading your BIOS.\n"
1023 
1024 /* per CPU init entry point to the driver */
powernowk8_cpu_init(struct cpufreq_policy * pol)1025 static int powernowk8_cpu_init(struct cpufreq_policy *pol)
1026 {
1027 	struct powernow_k8_data *data;
1028 	struct init_on_cpu init_on_cpu;
1029 	int rc, cpu;
1030 
1031 	smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1);
1032 	if (rc)
1033 		return -ENODEV;
1034 
1035 	data = kzalloc(sizeof(*data), GFP_KERNEL);
1036 	if (!data)
1037 		return -ENOMEM;
1038 
1039 	data->cpu = pol->cpu;
1040 
1041 	if (powernow_k8_cpu_init_acpi(data)) {
1042 		/*
1043 		 * Use the PSB BIOS structure. This is only available on
1044 		 * an UP version, and is deprecated by AMD.
1045 		 */
1046 		if (num_online_cpus() != 1) {
1047 			pr_err_once(MISSING_PSS_MSG);
1048 			goto err_out;
1049 		}
1050 		if (pol->cpu != 0) {
1051 			pr_err(FW_BUG "No ACPI _PSS objects for CPU other than CPU0. Complain to your BIOS vendor.\n");
1052 			goto err_out;
1053 		}
1054 		rc = find_psb_table(data);
1055 		if (rc)
1056 			goto err_out;
1057 
1058 		/* Take a crude guess here.
1059 		 * That guess was in microseconds, so multiply with 1000 */
1060 		pol->cpuinfo.transition_latency = (
1061 			 ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
1062 			 ((1 << data->irt) * 30)) * 1000;
1063 	} else /* ACPI _PSS objects available */
1064 		pol->cpuinfo.transition_latency = get_transition_latency(data);
1065 
1066 	/* only run on specific CPU from here on */
1067 	init_on_cpu.data = data;
1068 	smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu,
1069 				 &init_on_cpu, 1);
1070 	rc = init_on_cpu.rc;
1071 	if (rc != 0)
1072 		goto err_out_exit_acpi;
1073 
1074 	cpumask_copy(pol->cpus, topology_core_cpumask(pol->cpu));
1075 	data->available_cores = pol->cpus;
1076 	pol->freq_table = data->powernow_table;
1077 
1078 	pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n",
1079 		data->currfid, data->currvid);
1080 
1081 	/* Point all the CPUs in this policy to the same data */
1082 	for_each_cpu(cpu, pol->cpus)
1083 		per_cpu(powernow_data, cpu) = data;
1084 
1085 	return 0;
1086 
1087 err_out_exit_acpi:
1088 	powernow_k8_cpu_exit_acpi(data);
1089 
1090 err_out:
1091 	kfree(data);
1092 	return -ENODEV;
1093 }
1094 
powernowk8_cpu_exit(struct cpufreq_policy * pol)1095 static int powernowk8_cpu_exit(struct cpufreq_policy *pol)
1096 {
1097 	struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1098 	int cpu;
1099 
1100 	if (!data)
1101 		return -EINVAL;
1102 
1103 	powernow_k8_cpu_exit_acpi(data);
1104 
1105 	kfree(data->powernow_table);
1106 	kfree(data);
1107 	/* pol->cpus will be empty here, use related_cpus instead. */
1108 	for_each_cpu(cpu, pol->related_cpus)
1109 		per_cpu(powernow_data, cpu) = NULL;
1110 
1111 	return 0;
1112 }
1113 
query_values_on_cpu(void * _err)1114 static void query_values_on_cpu(void *_err)
1115 {
1116 	int *err = _err;
1117 	struct powernow_k8_data *data = __this_cpu_read(powernow_data);
1118 
1119 	*err = query_current_values_with_pending_wait(data);
1120 }
1121 
powernowk8_get(unsigned int cpu)1122 static unsigned int powernowk8_get(unsigned int cpu)
1123 {
1124 	struct powernow_k8_data *data = per_cpu(powernow_data, cpu);
1125 	unsigned int khz = 0;
1126 	int err;
1127 
1128 	if (!data)
1129 		return 0;
1130 
1131 	smp_call_function_single(cpu, query_values_on_cpu, &err, true);
1132 	if (err)
1133 		goto out;
1134 
1135 	khz = find_khz_freq_from_fid(data->currfid);
1136 
1137 
1138 out:
1139 	return khz;
1140 }
1141 
1142 static struct cpufreq_driver cpufreq_amd64_driver = {
1143 	.flags		= CPUFREQ_ASYNC_NOTIFICATION,
1144 	.verify		= cpufreq_generic_frequency_table_verify,
1145 	.target_index	= powernowk8_target,
1146 	.bios_limit	= acpi_processor_get_bios_limit,
1147 	.init		= powernowk8_cpu_init,
1148 	.exit		= powernowk8_cpu_exit,
1149 	.get		= powernowk8_get,
1150 	.name		= "powernow-k8",
1151 	.attr		= cpufreq_generic_attr,
1152 };
1153 
__request_acpi_cpufreq(void)1154 static void __request_acpi_cpufreq(void)
1155 {
1156 	const char drv[] = "acpi-cpufreq";
1157 	const char *cur_drv;
1158 
1159 	cur_drv = cpufreq_get_current_driver();
1160 	if (!cur_drv)
1161 		goto request;
1162 
1163 	if (strncmp(cur_drv, drv, min_t(size_t, strlen(cur_drv), strlen(drv))))
1164 		pr_warn("WTF driver: %s\n", cur_drv);
1165 
1166 	return;
1167 
1168  request:
1169 	pr_warn("This CPU is not supported anymore, using acpi-cpufreq instead.\n");
1170 	request_module(drv);
1171 }
1172 
1173 /* driver entry point for init */
powernowk8_init(void)1174 static int powernowk8_init(void)
1175 {
1176 	unsigned int i, supported_cpus = 0;
1177 	int ret;
1178 
1179 	if (static_cpu_has(X86_FEATURE_HW_PSTATE)) {
1180 		__request_acpi_cpufreq();
1181 		return -ENODEV;
1182 	}
1183 
1184 	if (!x86_match_cpu(powernow_k8_ids))
1185 		return -ENODEV;
1186 
1187 	get_online_cpus();
1188 	for_each_online_cpu(i) {
1189 		smp_call_function_single(i, check_supported_cpu, &ret, 1);
1190 		if (!ret)
1191 			supported_cpus++;
1192 	}
1193 
1194 	if (supported_cpus != num_online_cpus()) {
1195 		put_online_cpus();
1196 		return -ENODEV;
1197 	}
1198 	put_online_cpus();
1199 
1200 	ret = cpufreq_register_driver(&cpufreq_amd64_driver);
1201 	if (ret)
1202 		return ret;
1203 
1204 	pr_info("Found %d %s (%d cpu cores) (" VERSION ")\n",
1205 		num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus);
1206 
1207 	return ret;
1208 }
1209 
1210 /* driver entry point for term */
powernowk8_exit(void)1211 static void __exit powernowk8_exit(void)
1212 {
1213 	pr_debug("exit\n");
1214 
1215 	cpufreq_unregister_driver(&cpufreq_amd64_driver);
1216 }
1217 
1218 MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com>");
1219 MODULE_AUTHOR("Mark Langsdorf <mark.langsdorf@amd.com>");
1220 MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1221 MODULE_LICENSE("GPL");
1222 
1223 late_initcall(powernowk8_init);
1224 module_exit(powernowk8_exit);
1225