1 /*
2 * POWERNV cpufreq driver for the IBM POWER processors
3 *
4 * (C) Copyright IBM 2014
5 *
6 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20 #define pr_fmt(fmt) "powernv-cpufreq: " fmt
21
22 #include <linux/kernel.h>
23 #include <linux/sysfs.h>
24 #include <linux/cpumask.h>
25 #include <linux/module.h>
26 #include <linux/cpufreq.h>
27 #include <linux/smp.h>
28 #include <linux/of.h>
29 #include <linux/reboot.h>
30 #include <linux/slab.h>
31 #include <linux/cpu.h>
32 #include <linux/hashtable.h>
33 #include <trace/events/power.h>
34
35 #include <asm/cputhreads.h>
36 #include <asm/firmware.h>
37 #include <asm/reg.h>
38 #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
39 #include <asm/opal.h>
40 #include <linux/timer.h>
41
42 #define POWERNV_MAX_PSTATES_ORDER 8
43 #define POWERNV_MAX_PSTATES (1UL << (POWERNV_MAX_PSTATES_ORDER))
44 #define PMSR_PSAFE_ENABLE (1UL << 30)
45 #define PMSR_SPR_EM_DISABLE (1UL << 31)
46 #define MAX_PSTATE_SHIFT 32
47 #define LPSTATE_SHIFT 48
48 #define GPSTATE_SHIFT 56
49 #define MAX_NR_CHIPS 32
50
51 #define MAX_RAMP_DOWN_TIME 5120
52 /*
53 * On an idle system we want the global pstate to ramp-down from max value to
54 * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and
55 * then ramp-down rapidly later on.
56 *
57 * This gives a percentage rampdown for time elapsed in milliseconds.
58 * ramp_down_percentage = ((ms * ms) >> 18)
59 * ~= 3.8 * (sec * sec)
60 *
61 * At 0 ms ramp_down_percent = 0
62 * At 5120 ms ramp_down_percent = 100
63 */
64 #define ramp_down_percent(time) ((time * time) >> 18)
65
66 /* Interval after which the timer is queued to bring down global pstate */
67 #define GPSTATE_TIMER_INTERVAL 2000
68
69 /**
70 * struct global_pstate_info - Per policy data structure to maintain history of
71 * global pstates
72 * @highest_lpstate_idx: The local pstate index from which we are
73 * ramping down
74 * @elapsed_time: Time in ms spent in ramping down from
75 * highest_lpstate_idx
76 * @last_sampled_time: Time from boot in ms when global pstates were
77 * last set
78 * @last_lpstate_idx, Last set value of local pstate and global
79 * last_gpstate_idx pstate in terms of cpufreq table index
80 * @timer: Is used for ramping down if cpu goes idle for
81 * a long time with global pstate held high
82 * @gpstate_lock: A spinlock to maintain synchronization between
83 * routines called by the timer handler and
84 * governer's target_index calls
85 */
86 struct global_pstate_info {
87 int highest_lpstate_idx;
88 unsigned int elapsed_time;
89 unsigned int last_sampled_time;
90 int last_lpstate_idx;
91 int last_gpstate_idx;
92 spinlock_t gpstate_lock;
93 struct timer_list timer;
94 struct cpufreq_policy *policy;
95 };
96
97 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
98
99 DEFINE_HASHTABLE(pstate_revmap, POWERNV_MAX_PSTATES_ORDER);
100 /**
101 * struct pstate_idx_revmap_data: Entry in the hashmap pstate_revmap
102 * indexed by a function of pstate id.
103 *
104 * @pstate_id: pstate id for this entry.
105 *
106 * @cpufreq_table_idx: Index into the powernv_freqs
107 * cpufreq_frequency_table for frequency
108 * corresponding to pstate_id.
109 *
110 * @hentry: hlist_node that hooks this entry into the pstate_revmap
111 * hashtable
112 */
113 struct pstate_idx_revmap_data {
114 u8 pstate_id;
115 unsigned int cpufreq_table_idx;
116 struct hlist_node hentry;
117 };
118
119 static bool rebooting, throttled, occ_reset;
120
121 static const char * const throttle_reason[] = {
122 "No throttling",
123 "Power Cap",
124 "Processor Over Temperature",
125 "Power Supply Failure",
126 "Over Current",
127 "OCC Reset"
128 };
129
130 enum throttle_reason_type {
131 NO_THROTTLE = 0,
132 POWERCAP,
133 CPU_OVERTEMP,
134 POWER_SUPPLY_FAILURE,
135 OVERCURRENT,
136 OCC_RESET_THROTTLE,
137 OCC_MAX_REASON
138 };
139
140 static struct chip {
141 unsigned int id;
142 bool throttled;
143 bool restore;
144 u8 throttle_reason;
145 cpumask_t mask;
146 struct work_struct throttle;
147 int throttle_turbo;
148 int throttle_sub_turbo;
149 int reason[OCC_MAX_REASON];
150 } *chips;
151
152 static int nr_chips;
153 static DEFINE_PER_CPU(struct chip *, chip_info);
154
155 /*
156 * Note:
157 * The set of pstates consists of contiguous integers.
158 * powernv_pstate_info stores the index of the frequency table for
159 * max, min and nominal frequencies. It also stores number of
160 * available frequencies.
161 *
162 * powernv_pstate_info.nominal indicates the index to the highest
163 * non-turbo frequency.
164 */
165 static struct powernv_pstate_info {
166 unsigned int min;
167 unsigned int max;
168 unsigned int nominal;
169 unsigned int nr_pstates;
170 bool wof_enabled;
171 } powernv_pstate_info;
172
extract_pstate(u64 pmsr_val,unsigned int shift)173 static inline u8 extract_pstate(u64 pmsr_val, unsigned int shift)
174 {
175 return ((pmsr_val >> shift) & 0xFF);
176 }
177
178 #define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT)
179 #define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT)
180 #define extract_max_pstate(x) extract_pstate(x, MAX_PSTATE_SHIFT)
181
182 /* Use following functions for conversions between pstate_id and index */
183
184 /**
185 * idx_to_pstate : Returns the pstate id corresponding to the
186 * frequency in the cpufreq frequency table
187 * powernv_freqs indexed by @i.
188 *
189 * If @i is out of bound, this will return the pstate
190 * corresponding to the nominal frequency.
191 */
idx_to_pstate(unsigned int i)192 static inline u8 idx_to_pstate(unsigned int i)
193 {
194 if (unlikely(i >= powernv_pstate_info.nr_pstates)) {
195 pr_warn_once("idx_to_pstate: index %u is out of bound\n", i);
196 return powernv_freqs[powernv_pstate_info.nominal].driver_data;
197 }
198
199 return powernv_freqs[i].driver_data;
200 }
201
202 /**
203 * pstate_to_idx : Returns the index in the cpufreq frequencytable
204 * powernv_freqs for the frequency whose corresponding
205 * pstate id is @pstate.
206 *
207 * If no frequency corresponding to @pstate is found,
208 * this will return the index of the nominal
209 * frequency.
210 */
pstate_to_idx(u8 pstate)211 static unsigned int pstate_to_idx(u8 pstate)
212 {
213 unsigned int key = pstate % POWERNV_MAX_PSTATES;
214 struct pstate_idx_revmap_data *revmap_data;
215
216 hash_for_each_possible(pstate_revmap, revmap_data, hentry, key) {
217 if (revmap_data->pstate_id == pstate)
218 return revmap_data->cpufreq_table_idx;
219 }
220
221 pr_warn_once("pstate_to_idx: pstate 0x%x not found\n", pstate);
222 return powernv_pstate_info.nominal;
223 }
224
reset_gpstates(struct cpufreq_policy * policy)225 static inline void reset_gpstates(struct cpufreq_policy *policy)
226 {
227 struct global_pstate_info *gpstates = policy->driver_data;
228
229 gpstates->highest_lpstate_idx = 0;
230 gpstates->elapsed_time = 0;
231 gpstates->last_sampled_time = 0;
232 gpstates->last_lpstate_idx = 0;
233 gpstates->last_gpstate_idx = 0;
234 }
235
236 /*
237 * Initialize the freq table based on data obtained
238 * from the firmware passed via device-tree
239 */
init_powernv_pstates(void)240 static int init_powernv_pstates(void)
241 {
242 struct device_node *power_mgt;
243 int i, nr_pstates = 0;
244 const __be32 *pstate_ids, *pstate_freqs;
245 u32 len_ids, len_freqs;
246 u32 pstate_min, pstate_max, pstate_nominal;
247 u32 pstate_turbo, pstate_ultra_turbo;
248
249 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
250 if (!power_mgt) {
251 pr_warn("power-mgt node not found\n");
252 return -ENODEV;
253 }
254
255 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
256 pr_warn("ibm,pstate-min node not found\n");
257 return -ENODEV;
258 }
259
260 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
261 pr_warn("ibm,pstate-max node not found\n");
262 return -ENODEV;
263 }
264
265 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
266 &pstate_nominal)) {
267 pr_warn("ibm,pstate-nominal not found\n");
268 return -ENODEV;
269 }
270
271 if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo",
272 &pstate_ultra_turbo)) {
273 powernv_pstate_info.wof_enabled = false;
274 goto next;
275 }
276
277 if (of_property_read_u32(power_mgt, "ibm,pstate-turbo",
278 &pstate_turbo)) {
279 powernv_pstate_info.wof_enabled = false;
280 goto next;
281 }
282
283 if (pstate_turbo == pstate_ultra_turbo)
284 powernv_pstate_info.wof_enabled = false;
285 else
286 powernv_pstate_info.wof_enabled = true;
287
288 next:
289 pr_info("cpufreq pstate min 0x%x nominal 0x%x max 0x%x\n", pstate_min,
290 pstate_nominal, pstate_max);
291 pr_info("Workload Optimized Frequency is %s in the platform\n",
292 (powernv_pstate_info.wof_enabled) ? "enabled" : "disabled");
293
294 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
295 if (!pstate_ids) {
296 pr_warn("ibm,pstate-ids not found\n");
297 return -ENODEV;
298 }
299
300 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
301 &len_freqs);
302 if (!pstate_freqs) {
303 pr_warn("ibm,pstate-frequencies-mhz not found\n");
304 return -ENODEV;
305 }
306
307 if (len_ids != len_freqs) {
308 pr_warn("Entries in ibm,pstate-ids and "
309 "ibm,pstate-frequencies-mhz does not match\n");
310 }
311
312 nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
313 if (!nr_pstates) {
314 pr_warn("No PStates found\n");
315 return -ENODEV;
316 }
317
318 powernv_pstate_info.nr_pstates = nr_pstates;
319 pr_debug("NR PStates %d\n", nr_pstates);
320
321 for (i = 0; i < nr_pstates; i++) {
322 u32 id = be32_to_cpu(pstate_ids[i]);
323 u32 freq = be32_to_cpu(pstate_freqs[i]);
324 struct pstate_idx_revmap_data *revmap_data;
325 unsigned int key;
326
327 pr_debug("PState id %d freq %d MHz\n", id, freq);
328 powernv_freqs[i].frequency = freq * 1000; /* kHz */
329 powernv_freqs[i].driver_data = id & 0xFF;
330
331 revmap_data = (struct pstate_idx_revmap_data *)
332 kmalloc(sizeof(*revmap_data), GFP_KERNEL);
333
334 revmap_data->pstate_id = id & 0xFF;
335 revmap_data->cpufreq_table_idx = i;
336 key = (revmap_data->pstate_id) % POWERNV_MAX_PSTATES;
337 hash_add(pstate_revmap, &revmap_data->hentry, key);
338
339 if (id == pstate_max)
340 powernv_pstate_info.max = i;
341 if (id == pstate_nominal)
342 powernv_pstate_info.nominal = i;
343 if (id == pstate_min)
344 powernv_pstate_info.min = i;
345
346 if (powernv_pstate_info.wof_enabled && id == pstate_turbo) {
347 int j;
348
349 for (j = i - 1; j >= (int)powernv_pstate_info.max; j--)
350 powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ;
351 }
352 }
353
354 /* End of list marker entry */
355 powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
356 return 0;
357 }
358
359 /* Returns the CPU frequency corresponding to the pstate_id. */
pstate_id_to_freq(u8 pstate_id)360 static unsigned int pstate_id_to_freq(u8 pstate_id)
361 {
362 int i;
363
364 i = pstate_to_idx(pstate_id);
365 if (i >= powernv_pstate_info.nr_pstates || i < 0) {
366 pr_warn("PState id 0x%x outside of PState table, reporting nominal id 0x%x instead\n",
367 pstate_id, idx_to_pstate(powernv_pstate_info.nominal));
368 i = powernv_pstate_info.nominal;
369 }
370
371 return powernv_freqs[i].frequency;
372 }
373
374 /*
375 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
376 * the firmware
377 */
cpuinfo_nominal_freq_show(struct cpufreq_policy * policy,char * buf)378 static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
379 char *buf)
380 {
381 return sprintf(buf, "%u\n",
382 powernv_freqs[powernv_pstate_info.nominal].frequency);
383 }
384
385 struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
386 __ATTR_RO(cpuinfo_nominal_freq);
387
388 #define SCALING_BOOST_FREQS_ATTR_INDEX 2
389
390 static struct freq_attr *powernv_cpu_freq_attr[] = {
391 &cpufreq_freq_attr_scaling_available_freqs,
392 &cpufreq_freq_attr_cpuinfo_nominal_freq,
393 &cpufreq_freq_attr_scaling_boost_freqs,
394 NULL,
395 };
396
397 #define throttle_attr(name, member) \
398 static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \
399 { \
400 struct chip *chip = per_cpu(chip_info, policy->cpu); \
401 \
402 return sprintf(buf, "%u\n", chip->member); \
403 } \
404 \
405 static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \
406
407 throttle_attr(unthrottle, reason[NO_THROTTLE]);
408 throttle_attr(powercap, reason[POWERCAP]);
409 throttle_attr(overtemp, reason[CPU_OVERTEMP]);
410 throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]);
411 throttle_attr(overcurrent, reason[OVERCURRENT]);
412 throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]);
413 throttle_attr(turbo_stat, throttle_turbo);
414 throttle_attr(sub_turbo_stat, throttle_sub_turbo);
415
416 static struct attribute *throttle_attrs[] = {
417 &throttle_attr_unthrottle.attr,
418 &throttle_attr_powercap.attr,
419 &throttle_attr_overtemp.attr,
420 &throttle_attr_supply_fault.attr,
421 &throttle_attr_overcurrent.attr,
422 &throttle_attr_occ_reset.attr,
423 &throttle_attr_turbo_stat.attr,
424 &throttle_attr_sub_turbo_stat.attr,
425 NULL,
426 };
427
428 static const struct attribute_group throttle_attr_grp = {
429 .name = "throttle_stats",
430 .attrs = throttle_attrs,
431 };
432
433 /* Helper routines */
434
435 /* Access helpers to power mgt SPR */
436
get_pmspr(unsigned long sprn)437 static inline unsigned long get_pmspr(unsigned long sprn)
438 {
439 switch (sprn) {
440 case SPRN_PMCR:
441 return mfspr(SPRN_PMCR);
442
443 case SPRN_PMICR:
444 return mfspr(SPRN_PMICR);
445
446 case SPRN_PMSR:
447 return mfspr(SPRN_PMSR);
448 }
449 BUG();
450 }
451
set_pmspr(unsigned long sprn,unsigned long val)452 static inline void set_pmspr(unsigned long sprn, unsigned long val)
453 {
454 switch (sprn) {
455 case SPRN_PMCR:
456 mtspr(SPRN_PMCR, val);
457 return;
458
459 case SPRN_PMICR:
460 mtspr(SPRN_PMICR, val);
461 return;
462 }
463 BUG();
464 }
465
466 /*
467 * Use objects of this type to query/update
468 * pstates on a remote CPU via smp_call_function.
469 */
470 struct powernv_smp_call_data {
471 unsigned int freq;
472 u8 pstate_id;
473 u8 gpstate_id;
474 };
475
476 /*
477 * powernv_read_cpu_freq: Reads the current frequency on this CPU.
478 *
479 * Called via smp_call_function.
480 *
481 * Note: The caller of the smp_call_function should pass an argument of
482 * the type 'struct powernv_smp_call_data *' along with this function.
483 *
484 * The current frequency on this CPU will be returned via
485 * ((struct powernv_smp_call_data *)arg)->freq;
486 */
powernv_read_cpu_freq(void * arg)487 static void powernv_read_cpu_freq(void *arg)
488 {
489 unsigned long pmspr_val;
490 struct powernv_smp_call_data *freq_data = arg;
491
492 pmspr_val = get_pmspr(SPRN_PMSR);
493 freq_data->pstate_id = extract_local_pstate(pmspr_val);
494 freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
495
496 pr_debug("cpu %d pmsr %016lX pstate_id 0x%x frequency %d kHz\n",
497 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
498 freq_data->freq);
499 }
500
501 /*
502 * powernv_cpufreq_get: Returns the CPU frequency as reported by the
503 * firmware for CPU 'cpu'. This value is reported through the sysfs
504 * file cpuinfo_cur_freq.
505 */
powernv_cpufreq_get(unsigned int cpu)506 static unsigned int powernv_cpufreq_get(unsigned int cpu)
507 {
508 struct powernv_smp_call_data freq_data;
509
510 smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
511 &freq_data, 1);
512
513 return freq_data.freq;
514 }
515
516 /*
517 * set_pstate: Sets the pstate on this CPU.
518 *
519 * This is called via an smp_call_function.
520 *
521 * The caller must ensure that freq_data is of the type
522 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
523 * on this CPU should be present in freq_data->pstate_id.
524 */
set_pstate(void * data)525 static void set_pstate(void *data)
526 {
527 unsigned long val;
528 struct powernv_smp_call_data *freq_data = data;
529 unsigned long pstate_ul = freq_data->pstate_id;
530 unsigned long gpstate_ul = freq_data->gpstate_id;
531
532 val = get_pmspr(SPRN_PMCR);
533 val = val & 0x0000FFFFFFFFFFFFULL;
534
535 pstate_ul = pstate_ul & 0xFF;
536 gpstate_ul = gpstate_ul & 0xFF;
537
538 /* Set both global(bits 56..63) and local(bits 48..55) PStates */
539 val = val | (gpstate_ul << 56) | (pstate_ul << 48);
540
541 pr_debug("Setting cpu %d pmcr to %016lX\n",
542 raw_smp_processor_id(), val);
543 set_pmspr(SPRN_PMCR, val);
544 }
545
546 /*
547 * get_nominal_index: Returns the index corresponding to the nominal
548 * pstate in the cpufreq table
549 */
get_nominal_index(void)550 static inline unsigned int get_nominal_index(void)
551 {
552 return powernv_pstate_info.nominal;
553 }
554
powernv_cpufreq_throttle_check(void * data)555 static void powernv_cpufreq_throttle_check(void *data)
556 {
557 struct chip *chip;
558 unsigned int cpu = smp_processor_id();
559 unsigned long pmsr;
560 u8 pmsr_pmax;
561 unsigned int pmsr_pmax_idx;
562
563 pmsr = get_pmspr(SPRN_PMSR);
564 chip = this_cpu_read(chip_info);
565
566 /* Check for Pmax Capping */
567 pmsr_pmax = extract_max_pstate(pmsr);
568 pmsr_pmax_idx = pstate_to_idx(pmsr_pmax);
569 if (pmsr_pmax_idx != powernv_pstate_info.max) {
570 if (chip->throttled)
571 goto next;
572 chip->throttled = true;
573 if (pmsr_pmax_idx > powernv_pstate_info.nominal) {
574 pr_warn_once("CPU %d on Chip %u has Pmax(0x%x) reduced below that of nominal frequency(0x%x)\n",
575 cpu, chip->id, pmsr_pmax,
576 idx_to_pstate(powernv_pstate_info.nominal));
577 chip->throttle_sub_turbo++;
578 } else {
579 chip->throttle_turbo++;
580 }
581 trace_powernv_throttle(chip->id,
582 throttle_reason[chip->throttle_reason],
583 pmsr_pmax);
584 } else if (chip->throttled) {
585 chip->throttled = false;
586 trace_powernv_throttle(chip->id,
587 throttle_reason[chip->throttle_reason],
588 pmsr_pmax);
589 }
590
591 /* Check if Psafe_mode_active is set in PMSR. */
592 next:
593 if (pmsr & PMSR_PSAFE_ENABLE) {
594 throttled = true;
595 pr_info("Pstate set to safe frequency\n");
596 }
597
598 /* Check if SPR_EM_DISABLE is set in PMSR */
599 if (pmsr & PMSR_SPR_EM_DISABLE) {
600 throttled = true;
601 pr_info("Frequency Control disabled from OS\n");
602 }
603
604 if (throttled) {
605 pr_info("PMSR = %16lx\n", pmsr);
606 pr_warn("CPU Frequency could be throttled\n");
607 }
608 }
609
610 /**
611 * calc_global_pstate - Calculate global pstate
612 * @elapsed_time: Elapsed time in milliseconds
613 * @local_pstate_idx: New local pstate
614 * @highest_lpstate_idx: pstate from which its ramping down
615 *
616 * Finds the appropriate global pstate based on the pstate from which its
617 * ramping down and the time elapsed in ramping down. It follows a quadratic
618 * equation which ensures that it reaches ramping down to pmin in 5sec.
619 */
calc_global_pstate(unsigned int elapsed_time,int highest_lpstate_idx,int local_pstate_idx)620 static inline int calc_global_pstate(unsigned int elapsed_time,
621 int highest_lpstate_idx,
622 int local_pstate_idx)
623 {
624 int index_diff;
625
626 /*
627 * Using ramp_down_percent we get the percentage of rampdown
628 * that we are expecting to be dropping. Difference between
629 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute
630 * number of how many pstates we will drop eventually by the end of
631 * 5 seconds, then just scale it get the number pstates to be dropped.
632 */
633 index_diff = ((int)ramp_down_percent(elapsed_time) *
634 (powernv_pstate_info.min - highest_lpstate_idx)) / 100;
635
636 /* Ensure that global pstate is >= to local pstate */
637 if (highest_lpstate_idx + index_diff >= local_pstate_idx)
638 return local_pstate_idx;
639 else
640 return highest_lpstate_idx + index_diff;
641 }
642
queue_gpstate_timer(struct global_pstate_info * gpstates)643 static inline void queue_gpstate_timer(struct global_pstate_info *gpstates)
644 {
645 unsigned int timer_interval;
646
647 /*
648 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But
649 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time.
650 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME
651 * seconds of ramp down time.
652 */
653 if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL)
654 > MAX_RAMP_DOWN_TIME)
655 timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time;
656 else
657 timer_interval = GPSTATE_TIMER_INTERVAL;
658
659 mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval));
660 }
661
662 /**
663 * gpstate_timer_handler
664 *
665 * @data: pointer to cpufreq_policy on which timer was queued
666 *
667 * This handler brings down the global pstate closer to the local pstate
668 * according quadratic equation. Queues a new timer if it is still not equal
669 * to local pstate
670 */
gpstate_timer_handler(struct timer_list * t)671 void gpstate_timer_handler(struct timer_list *t)
672 {
673 struct global_pstate_info *gpstates = from_timer(gpstates, t, timer);
674 struct cpufreq_policy *policy = gpstates->policy;
675 int gpstate_idx, lpstate_idx;
676 unsigned long val;
677 unsigned int time_diff = jiffies_to_msecs(jiffies)
678 - gpstates->last_sampled_time;
679 struct powernv_smp_call_data freq_data;
680
681 if (!spin_trylock(&gpstates->gpstate_lock))
682 return;
683 /*
684 * If the timer has migrated to the different cpu then bring
685 * it back to one of the policy->cpus
686 */
687 if (!cpumask_test_cpu(raw_smp_processor_id(), policy->cpus)) {
688 gpstates->timer.expires = jiffies + msecs_to_jiffies(1);
689 add_timer_on(&gpstates->timer, cpumask_first(policy->cpus));
690 spin_unlock(&gpstates->gpstate_lock);
691 return;
692 }
693
694 /*
695 * If PMCR was last updated was using fast_swtich then
696 * We may have wrong in gpstate->last_lpstate_idx
697 * value. Hence, read from PMCR to get correct data.
698 */
699 val = get_pmspr(SPRN_PMCR);
700 freq_data.gpstate_id = extract_global_pstate(val);
701 freq_data.pstate_id = extract_local_pstate(val);
702 if (freq_data.gpstate_id == freq_data.pstate_id) {
703 reset_gpstates(policy);
704 spin_unlock(&gpstates->gpstate_lock);
705 return;
706 }
707
708 gpstates->last_sampled_time += time_diff;
709 gpstates->elapsed_time += time_diff;
710
711 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
712 gpstate_idx = pstate_to_idx(freq_data.pstate_id);
713 lpstate_idx = gpstate_idx;
714 reset_gpstates(policy);
715 gpstates->highest_lpstate_idx = gpstate_idx;
716 } else {
717 lpstate_idx = pstate_to_idx(freq_data.pstate_id);
718 gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
719 gpstates->highest_lpstate_idx,
720 lpstate_idx);
721 }
722 freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
723 gpstates->last_gpstate_idx = gpstate_idx;
724 gpstates->last_lpstate_idx = lpstate_idx;
725 /*
726 * If local pstate is equal to global pstate, rampdown is over
727 * So timer is not required to be queued.
728 */
729 if (gpstate_idx != gpstates->last_lpstate_idx)
730 queue_gpstate_timer(gpstates);
731
732 set_pstate(&freq_data);
733 spin_unlock(&gpstates->gpstate_lock);
734 }
735
736 /*
737 * powernv_cpufreq_target_index: Sets the frequency corresponding to
738 * the cpufreq table entry indexed by new_index on the cpus in the
739 * mask policy->cpus
740 */
powernv_cpufreq_target_index(struct cpufreq_policy * policy,unsigned int new_index)741 static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
742 unsigned int new_index)
743 {
744 struct powernv_smp_call_data freq_data;
745 unsigned int cur_msec, gpstate_idx;
746 struct global_pstate_info *gpstates = policy->driver_data;
747
748 if (unlikely(rebooting) && new_index != get_nominal_index())
749 return 0;
750
751 if (!throttled) {
752 /* we don't want to be preempted while
753 * checking if the CPU frequency has been throttled
754 */
755 preempt_disable();
756 powernv_cpufreq_throttle_check(NULL);
757 preempt_enable();
758 }
759
760 cur_msec = jiffies_to_msecs(get_jiffies_64());
761
762 freq_data.pstate_id = idx_to_pstate(new_index);
763 if (!gpstates) {
764 freq_data.gpstate_id = freq_data.pstate_id;
765 goto no_gpstate;
766 }
767
768 spin_lock(&gpstates->gpstate_lock);
769
770 if (!gpstates->last_sampled_time) {
771 gpstate_idx = new_index;
772 gpstates->highest_lpstate_idx = new_index;
773 goto gpstates_done;
774 }
775
776 if (gpstates->last_gpstate_idx < new_index) {
777 gpstates->elapsed_time += cur_msec -
778 gpstates->last_sampled_time;
779
780 /*
781 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME
782 * we should be resetting all global pstate related data. Set it
783 * equal to local pstate to start fresh.
784 */
785 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
786 reset_gpstates(policy);
787 gpstates->highest_lpstate_idx = new_index;
788 gpstate_idx = new_index;
789 } else {
790 /* Elaspsed_time is less than 5 seconds, continue to rampdown */
791 gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
792 gpstates->highest_lpstate_idx,
793 new_index);
794 }
795 } else {
796 reset_gpstates(policy);
797 gpstates->highest_lpstate_idx = new_index;
798 gpstate_idx = new_index;
799 }
800
801 /*
802 * If local pstate is equal to global pstate, rampdown is over
803 * So timer is not required to be queued.
804 */
805 if (gpstate_idx != new_index)
806 queue_gpstate_timer(gpstates);
807 else
808 del_timer_sync(&gpstates->timer);
809
810 gpstates_done:
811 freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
812 gpstates->last_sampled_time = cur_msec;
813 gpstates->last_gpstate_idx = gpstate_idx;
814 gpstates->last_lpstate_idx = new_index;
815
816 spin_unlock(&gpstates->gpstate_lock);
817
818 no_gpstate:
819 /*
820 * Use smp_call_function to send IPI and execute the
821 * mtspr on target CPU. We could do that without IPI
822 * if current CPU is within policy->cpus (core)
823 */
824 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
825 return 0;
826 }
827
powernv_cpufreq_cpu_init(struct cpufreq_policy * policy)828 static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
829 {
830 int base, i;
831 struct kernfs_node *kn;
832 struct global_pstate_info *gpstates;
833
834 base = cpu_first_thread_sibling(policy->cpu);
835
836 for (i = 0; i < threads_per_core; i++)
837 cpumask_set_cpu(base + i, policy->cpus);
838
839 kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name);
840 if (!kn) {
841 int ret;
842
843 ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp);
844 if (ret) {
845 pr_info("Failed to create throttle stats directory for cpu %d\n",
846 policy->cpu);
847 return ret;
848 }
849 } else {
850 kernfs_put(kn);
851 }
852
853 policy->freq_table = powernv_freqs;
854 policy->fast_switch_possible = true;
855
856 if (pvr_version_is(PVR_POWER9))
857 return 0;
858
859 /* Initialise Gpstate ramp-down timer only on POWER8 */
860 gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL);
861 if (!gpstates)
862 return -ENOMEM;
863
864 policy->driver_data = gpstates;
865
866 /* initialize timer */
867 gpstates->policy = policy;
868 timer_setup(&gpstates->timer, gpstate_timer_handler,
869 TIMER_PINNED | TIMER_DEFERRABLE);
870 gpstates->timer.expires = jiffies +
871 msecs_to_jiffies(GPSTATE_TIMER_INTERVAL);
872 spin_lock_init(&gpstates->gpstate_lock);
873
874 return 0;
875 }
876
powernv_cpufreq_cpu_exit(struct cpufreq_policy * policy)877 static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy)
878 {
879 /* timer is deleted in cpufreq_cpu_stop() */
880 kfree(policy->driver_data);
881
882 return 0;
883 }
884
powernv_cpufreq_reboot_notifier(struct notifier_block * nb,unsigned long action,void * unused)885 static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
886 unsigned long action, void *unused)
887 {
888 int cpu;
889 struct cpufreq_policy *cpu_policy;
890
891 rebooting = true;
892 for_each_online_cpu(cpu) {
893 cpu_policy = cpufreq_cpu_get(cpu);
894 if (!cpu_policy)
895 continue;
896 powernv_cpufreq_target_index(cpu_policy, get_nominal_index());
897 cpufreq_cpu_put(cpu_policy);
898 }
899
900 return NOTIFY_DONE;
901 }
902
903 static struct notifier_block powernv_cpufreq_reboot_nb = {
904 .notifier_call = powernv_cpufreq_reboot_notifier,
905 };
906
powernv_cpufreq_work_fn(struct work_struct * work)907 void powernv_cpufreq_work_fn(struct work_struct *work)
908 {
909 struct chip *chip = container_of(work, struct chip, throttle);
910 struct cpufreq_policy *policy;
911 unsigned int cpu;
912 cpumask_t mask;
913
914 get_online_cpus();
915 cpumask_and(&mask, &chip->mask, cpu_online_mask);
916 smp_call_function_any(&mask,
917 powernv_cpufreq_throttle_check, NULL, 0);
918
919 if (!chip->restore)
920 goto out;
921
922 chip->restore = false;
923 for_each_cpu(cpu, &mask) {
924 int index;
925
926 policy = cpufreq_cpu_get(cpu);
927 if (!policy)
928 continue;
929 index = cpufreq_table_find_index_c(policy, policy->cur);
930 powernv_cpufreq_target_index(policy, index);
931 cpumask_andnot(&mask, &mask, policy->cpus);
932 cpufreq_cpu_put(policy);
933 }
934 out:
935 put_online_cpus();
936 }
937
powernv_cpufreq_occ_msg(struct notifier_block * nb,unsigned long msg_type,void * _msg)938 static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
939 unsigned long msg_type, void *_msg)
940 {
941 struct opal_msg *msg = _msg;
942 struct opal_occ_msg omsg;
943 int i;
944
945 if (msg_type != OPAL_MSG_OCC)
946 return 0;
947
948 omsg.type = be64_to_cpu(msg->params[0]);
949
950 switch (omsg.type) {
951 case OCC_RESET:
952 occ_reset = true;
953 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
954 /*
955 * powernv_cpufreq_throttle_check() is called in
956 * target() callback which can detect the throttle state
957 * for governors like ondemand.
958 * But static governors will not call target() often thus
959 * report throttling here.
960 */
961 if (!throttled) {
962 throttled = true;
963 pr_warn("CPU frequency is throttled for duration\n");
964 }
965
966 break;
967 case OCC_LOAD:
968 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
969 break;
970 case OCC_THROTTLE:
971 omsg.chip = be64_to_cpu(msg->params[1]);
972 omsg.throttle_status = be64_to_cpu(msg->params[2]);
973
974 if (occ_reset) {
975 occ_reset = false;
976 throttled = false;
977 pr_info("OCC Active, CPU frequency is no longer throttled\n");
978
979 for (i = 0; i < nr_chips; i++) {
980 chips[i].restore = true;
981 schedule_work(&chips[i].throttle);
982 }
983
984 return 0;
985 }
986
987 for (i = 0; i < nr_chips; i++)
988 if (chips[i].id == omsg.chip)
989 break;
990
991 if (omsg.throttle_status >= 0 &&
992 omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) {
993 chips[i].throttle_reason = omsg.throttle_status;
994 chips[i].reason[omsg.throttle_status]++;
995 }
996
997 if (!omsg.throttle_status)
998 chips[i].restore = true;
999
1000 schedule_work(&chips[i].throttle);
1001 }
1002 return 0;
1003 }
1004
1005 static struct notifier_block powernv_cpufreq_opal_nb = {
1006 .notifier_call = powernv_cpufreq_occ_msg,
1007 .next = NULL,
1008 .priority = 0,
1009 };
1010
powernv_cpufreq_stop_cpu(struct cpufreq_policy * policy)1011 static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy)
1012 {
1013 struct powernv_smp_call_data freq_data;
1014 struct global_pstate_info *gpstates = policy->driver_data;
1015
1016 freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min);
1017 freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min);
1018 smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1);
1019 if (gpstates)
1020 del_timer_sync(&gpstates->timer);
1021 }
1022
powernv_fast_switch(struct cpufreq_policy * policy,unsigned int target_freq)1023 static unsigned int powernv_fast_switch(struct cpufreq_policy *policy,
1024 unsigned int target_freq)
1025 {
1026 int index;
1027 struct powernv_smp_call_data freq_data;
1028
1029 index = cpufreq_table_find_index_dl(policy, target_freq);
1030 freq_data.pstate_id = powernv_freqs[index].driver_data;
1031 freq_data.gpstate_id = powernv_freqs[index].driver_data;
1032 set_pstate(&freq_data);
1033
1034 return powernv_freqs[index].frequency;
1035 }
1036
1037 static struct cpufreq_driver powernv_cpufreq_driver = {
1038 .name = "powernv-cpufreq",
1039 .flags = CPUFREQ_CONST_LOOPS,
1040 .init = powernv_cpufreq_cpu_init,
1041 .exit = powernv_cpufreq_cpu_exit,
1042 .verify = cpufreq_generic_frequency_table_verify,
1043 .target_index = powernv_cpufreq_target_index,
1044 .fast_switch = powernv_fast_switch,
1045 .get = powernv_cpufreq_get,
1046 .stop_cpu = powernv_cpufreq_stop_cpu,
1047 .attr = powernv_cpu_freq_attr,
1048 };
1049
init_chip_info(void)1050 static int init_chip_info(void)
1051 {
1052 unsigned int *chip;
1053 unsigned int cpu, i;
1054 unsigned int prev_chip_id = UINT_MAX;
1055 cpumask_t *chip_cpu_mask;
1056 int ret = 0;
1057
1058 chip = kcalloc(num_possible_cpus(), sizeof(*chip), GFP_KERNEL);
1059 if (!chip)
1060 return -ENOMEM;
1061
1062 /* Allocate a chip cpu mask large enough to fit mask for all chips */
1063 chip_cpu_mask = kcalloc(MAX_NR_CHIPS, sizeof(cpumask_t), GFP_KERNEL);
1064 if (!chip_cpu_mask) {
1065 ret = -ENOMEM;
1066 goto free_and_return;
1067 }
1068
1069 for_each_possible_cpu(cpu) {
1070 unsigned int id = cpu_to_chip_id(cpu);
1071
1072 if (prev_chip_id != id) {
1073 prev_chip_id = id;
1074 chip[nr_chips++] = id;
1075 }
1076 cpumask_set_cpu(cpu, &chip_cpu_mask[nr_chips-1]);
1077 }
1078
1079 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL);
1080 if (!chips) {
1081 ret = -ENOMEM;
1082 goto out_free_chip_cpu_mask;
1083 }
1084
1085 for (i = 0; i < nr_chips; i++) {
1086 chips[i].id = chip[i];
1087 cpumask_copy(&chips[i].mask, &chip_cpu_mask[i]);
1088 INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
1089 for_each_cpu(cpu, &chips[i].mask)
1090 per_cpu(chip_info, cpu) = &chips[i];
1091 }
1092
1093 out_free_chip_cpu_mask:
1094 kfree(chip_cpu_mask);
1095 free_and_return:
1096 kfree(chip);
1097 return ret;
1098 }
1099
clean_chip_info(void)1100 static inline void clean_chip_info(void)
1101 {
1102 int i;
1103
1104 /* flush any pending work items */
1105 if (chips)
1106 for (i = 0; i < nr_chips; i++)
1107 cancel_work_sync(&chips[i].throttle);
1108 kfree(chips);
1109 }
1110
unregister_all_notifiers(void)1111 static inline void unregister_all_notifiers(void)
1112 {
1113 opal_message_notifier_unregister(OPAL_MSG_OCC,
1114 &powernv_cpufreq_opal_nb);
1115 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
1116 }
1117
powernv_cpufreq_init(void)1118 static int __init powernv_cpufreq_init(void)
1119 {
1120 int rc = 0;
1121
1122 /* Don't probe on pseries (guest) platforms */
1123 if (!firmware_has_feature(FW_FEATURE_OPAL))
1124 return -ENODEV;
1125
1126 /* Discover pstates from device tree and init */
1127 rc = init_powernv_pstates();
1128 if (rc)
1129 goto out;
1130
1131 /* Populate chip info */
1132 rc = init_chip_info();
1133 if (rc)
1134 goto out;
1135
1136 register_reboot_notifier(&powernv_cpufreq_reboot_nb);
1137 opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
1138
1139 if (powernv_pstate_info.wof_enabled)
1140 powernv_cpufreq_driver.boost_enabled = true;
1141 else
1142 powernv_cpu_freq_attr[SCALING_BOOST_FREQS_ATTR_INDEX] = NULL;
1143
1144 rc = cpufreq_register_driver(&powernv_cpufreq_driver);
1145 if (rc) {
1146 pr_info("Failed to register the cpufreq driver (%d)\n", rc);
1147 goto cleanup_notifiers;
1148 }
1149
1150 if (powernv_pstate_info.wof_enabled)
1151 cpufreq_enable_boost_support();
1152
1153 return 0;
1154 cleanup_notifiers:
1155 unregister_all_notifiers();
1156 clean_chip_info();
1157 out:
1158 pr_info("Platform driver disabled. System does not support PState control\n");
1159 return rc;
1160 }
1161 module_init(powernv_cpufreq_init);
1162
powernv_cpufreq_exit(void)1163 static void __exit powernv_cpufreq_exit(void)
1164 {
1165 cpufreq_unregister_driver(&powernv_cpufreq_driver);
1166 unregister_all_notifiers();
1167 clean_chip_info();
1168 }
1169 module_exit(powernv_cpufreq_exit);
1170
1171 MODULE_LICENSE("GPL");
1172 MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");
1173