1 /*
2 * Match running platform with pre-defined OPP values for CPUFreq
3 *
4 * Author: Ajit Pal Singh <ajitpal.singh@st.com>
5 * Lee Jones <lee.jones@linaro.org>
6 *
7 * Copyright (C) 2015 STMicroelectronics (R&D) Limited
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the version 2 of the GNU General Public License as
11 * published by the Free Software Foundation
12 */
13
14 #include <linux/cpu.h>
15 #include <linux/io.h>
16 #include <linux/mfd/syscon.h>
17 #include <linux/module.h>
18 #include <linux/of.h>
19 #include <linux/of_platform.h>
20 #include <linux/pm_opp.h>
21 #include <linux/regmap.h>
22
23 #define VERSION_ELEMENTS 3
24 #define MAX_PCODE_NAME_LEN 7
25
26 #define VERSION_SHIFT 28
27 #define HW_INFO_INDEX 1
28 #define MAJOR_ID_INDEX 1
29 #define MINOR_ID_INDEX 2
30
31 /*
32 * Only match on "suitable for ALL versions" entries
33 *
34 * This will be used with the BIT() macro. It sets the
35 * top bit of a 32bit value and is equal to 0x80000000.
36 */
37 #define DEFAULT_VERSION 31
38
39 enum {
40 PCODE = 0,
41 SUBSTRATE,
42 DVFS_MAX_REGFIELDS,
43 };
44
45 /**
46 * ST CPUFreq Driver Data
47 *
48 * @cpu_node CPU's OF node
49 * @syscfg_eng Engineering Syscon register map
50 * @regmap Syscon register map
51 */
52 static struct sti_cpufreq_ddata {
53 struct device *cpu;
54 struct regmap *syscfg_eng;
55 struct regmap *syscfg;
56 } ddata;
57
sti_cpufreq_fetch_major(void)58 static int sti_cpufreq_fetch_major(void) {
59 struct device_node *np = ddata.cpu->of_node;
60 struct device *dev = ddata.cpu;
61 unsigned int major_offset;
62 unsigned int socid;
63 int ret;
64
65 ret = of_property_read_u32_index(np, "st,syscfg",
66 MAJOR_ID_INDEX, &major_offset);
67 if (ret) {
68 dev_err(dev, "No major number offset provided in %pOF [%d]\n",
69 np, ret);
70 return ret;
71 }
72
73 ret = regmap_read(ddata.syscfg, major_offset, &socid);
74 if (ret) {
75 dev_err(dev, "Failed to read major number from syscon [%d]\n",
76 ret);
77 return ret;
78 }
79
80 return ((socid >> VERSION_SHIFT) & 0xf) + 1;
81 }
82
sti_cpufreq_fetch_minor(void)83 static int sti_cpufreq_fetch_minor(void)
84 {
85 struct device *dev = ddata.cpu;
86 struct device_node *np = dev->of_node;
87 unsigned int minor_offset;
88 unsigned int minid;
89 int ret;
90
91 ret = of_property_read_u32_index(np, "st,syscfg-eng",
92 MINOR_ID_INDEX, &minor_offset);
93 if (ret) {
94 dev_err(dev,
95 "No minor number offset provided %pOF [%d]\n",
96 np, ret);
97 return ret;
98 }
99
100 ret = regmap_read(ddata.syscfg_eng, minor_offset, &minid);
101 if (ret) {
102 dev_err(dev,
103 "Failed to read the minor number from syscon [%d]\n",
104 ret);
105 return ret;
106 }
107
108 return minid & 0xf;
109 }
110
sti_cpufreq_fetch_regmap_field(const struct reg_field * reg_fields,int hw_info_offset,int field)111 static int sti_cpufreq_fetch_regmap_field(const struct reg_field *reg_fields,
112 int hw_info_offset, int field)
113 {
114 struct regmap_field *regmap_field;
115 struct reg_field reg_field = reg_fields[field];
116 struct device *dev = ddata.cpu;
117 unsigned int value;
118 int ret;
119
120 reg_field.reg = hw_info_offset;
121 regmap_field = devm_regmap_field_alloc(dev,
122 ddata.syscfg_eng,
123 reg_field);
124 if (IS_ERR(regmap_field)) {
125 dev_err(dev, "Failed to allocate reg field\n");
126 return PTR_ERR(regmap_field);
127 }
128
129 ret = regmap_field_read(regmap_field, &value);
130 if (ret) {
131 dev_err(dev, "Failed to read %s code\n",
132 field ? "SUBSTRATE" : "PCODE");
133 return ret;
134 }
135
136 return value;
137 }
138
139 static const struct reg_field sti_stih407_dvfs_regfields[DVFS_MAX_REGFIELDS] = {
140 [PCODE] = REG_FIELD(0, 16, 19),
141 [SUBSTRATE] = REG_FIELD(0, 0, 2),
142 };
143
sti_cpufreq_match(void)144 static const struct reg_field *sti_cpufreq_match(void)
145 {
146 if (of_machine_is_compatible("st,stih407") ||
147 of_machine_is_compatible("st,stih410") ||
148 of_machine_is_compatible("st,stih418"))
149 return sti_stih407_dvfs_regfields;
150
151 return NULL;
152 }
153
sti_cpufreq_set_opp_info(void)154 static int sti_cpufreq_set_opp_info(void)
155 {
156 struct device *dev = ddata.cpu;
157 struct device_node *np = dev->of_node;
158 const struct reg_field *reg_fields;
159 unsigned int hw_info_offset;
160 unsigned int version[VERSION_ELEMENTS];
161 int pcode, substrate, major, minor;
162 int ret;
163 char name[MAX_PCODE_NAME_LEN];
164 struct opp_table *opp_table;
165
166 reg_fields = sti_cpufreq_match();
167 if (!reg_fields) {
168 dev_err(dev, "This SoC doesn't support voltage scaling\n");
169 return -ENODEV;
170 }
171
172 ret = of_property_read_u32_index(np, "st,syscfg-eng",
173 HW_INFO_INDEX, &hw_info_offset);
174 if (ret) {
175 dev_warn(dev, "Failed to read HW info offset from DT\n");
176 substrate = DEFAULT_VERSION;
177 pcode = 0;
178 goto use_defaults;
179 }
180
181 pcode = sti_cpufreq_fetch_regmap_field(reg_fields,
182 hw_info_offset,
183 PCODE);
184 if (pcode < 0) {
185 dev_warn(dev, "Failed to obtain process code\n");
186 /* Use default pcode */
187 pcode = 0;
188 }
189
190 substrate = sti_cpufreq_fetch_regmap_field(reg_fields,
191 hw_info_offset,
192 SUBSTRATE);
193 if (substrate) {
194 dev_warn(dev, "Failed to obtain substrate code\n");
195 /* Use default substrate */
196 substrate = DEFAULT_VERSION;
197 }
198
199 use_defaults:
200 major = sti_cpufreq_fetch_major();
201 if (major < 0) {
202 dev_err(dev, "Failed to obtain major version\n");
203 /* Use default major number */
204 major = DEFAULT_VERSION;
205 }
206
207 minor = sti_cpufreq_fetch_minor();
208 if (minor < 0) {
209 dev_err(dev, "Failed to obtain minor version\n");
210 /* Use default minor number */
211 minor = DEFAULT_VERSION;
212 }
213
214 snprintf(name, MAX_PCODE_NAME_LEN, "pcode%d", pcode);
215
216 opp_table = dev_pm_opp_set_prop_name(dev, name);
217 if (IS_ERR(opp_table)) {
218 dev_err(dev, "Failed to set prop name\n");
219 return PTR_ERR(opp_table);
220 }
221
222 version[0] = BIT(major);
223 version[1] = BIT(minor);
224 version[2] = BIT(substrate);
225
226 opp_table = dev_pm_opp_set_supported_hw(dev, version, VERSION_ELEMENTS);
227 if (IS_ERR(opp_table)) {
228 dev_err(dev, "Failed to set supported hardware\n");
229 return PTR_ERR(opp_table);
230 }
231
232 dev_dbg(dev, "pcode: %d major: %d minor: %d substrate: %d\n",
233 pcode, major, minor, substrate);
234 dev_dbg(dev, "version[0]: %x version[1]: %x version[2]: %x\n",
235 version[0], version[1], version[2]);
236
237 return 0;
238 }
239
sti_cpufreq_fetch_syscon_registers(void)240 static int sti_cpufreq_fetch_syscon_registers(void)
241 {
242 struct device *dev = ddata.cpu;
243 struct device_node *np = dev->of_node;
244
245 ddata.syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
246 if (IS_ERR(ddata.syscfg)) {
247 dev_err(dev, "\"st,syscfg\" not supplied\n");
248 return PTR_ERR(ddata.syscfg);
249 }
250
251 ddata.syscfg_eng = syscon_regmap_lookup_by_phandle(np, "st,syscfg-eng");
252 if (IS_ERR(ddata.syscfg_eng)) {
253 dev_err(dev, "\"st,syscfg-eng\" not supplied\n");
254 return PTR_ERR(ddata.syscfg_eng);
255 }
256
257 return 0;
258 }
259
sti_cpufreq_init(void)260 static int sti_cpufreq_init(void)
261 {
262 int ret;
263
264 if ((!of_machine_is_compatible("st,stih407")) &&
265 (!of_machine_is_compatible("st,stih410")) &&
266 (!of_machine_is_compatible("st,stih418")))
267 return -ENODEV;
268
269 ddata.cpu = get_cpu_device(0);
270 if (!ddata.cpu) {
271 dev_err(ddata.cpu, "Failed to get device for CPU0\n");
272 goto skip_voltage_scaling;
273 }
274
275 if (!of_get_property(ddata.cpu->of_node, "operating-points-v2", NULL)) {
276 dev_err(ddata.cpu, "OPP-v2 not supported\n");
277 goto skip_voltage_scaling;
278 }
279
280 ret = sti_cpufreq_fetch_syscon_registers();
281 if (ret)
282 goto skip_voltage_scaling;
283
284 ret = sti_cpufreq_set_opp_info();
285 if (!ret)
286 goto register_cpufreq_dt;
287
288 skip_voltage_scaling:
289 dev_err(ddata.cpu, "Not doing voltage scaling\n");
290
291 register_cpufreq_dt:
292 platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
293
294 return 0;
295 }
296 module_init(sti_cpufreq_init);
297
298 static const struct of_device_id __maybe_unused sti_cpufreq_of_match[] = {
299 { .compatible = "st,stih407" },
300 { .compatible = "st,stih410" },
301 { },
302 };
303 MODULE_DEVICE_TABLE(of, sti_cpufreq_of_match);
304
305 MODULE_DESCRIPTION("STMicroelectronics CPUFreq/OPP driver");
306 MODULE_AUTHOR("Ajitpal Singh <ajitpal.singh@st.com>");
307 MODULE_AUTHOR("Lee Jones <lee.jones@linaro.org>");
308 MODULE_LICENSE("GPL v2");
309