1 /*
2 * A FSI master controller, using a simple GPIO bit-banging interface
3 */
4
5 #include <linux/crc4.h>
6 #include <linux/delay.h>
7 #include <linux/device.h>
8 #include <linux/fsi.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/io.h>
11 #include <linux/irqflags.h>
12 #include <linux/module.h>
13 #include <linux/of.h>
14 #include <linux/platform_device.h>
15 #include <linux/slab.h>
16
17 #include "fsi-master.h"
18
19 #define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */
20 #define LAST_ADDR_INVALID 0x1
21
22 struct fsi_master_gpio {
23 struct fsi_master master;
24 struct device *dev;
25 struct mutex cmd_lock; /* mutex for command ordering */
26 struct gpio_desc *gpio_clk;
27 struct gpio_desc *gpio_data;
28 struct gpio_desc *gpio_trans; /* Voltage translator */
29 struct gpio_desc *gpio_enable; /* FSI enable */
30 struct gpio_desc *gpio_mux; /* Mux control */
31 bool external_mode;
32 bool no_delays;
33 uint32_t last_addr;
34 uint8_t t_send_delay;
35 uint8_t t_echo_delay;
36 };
37
38 #define CREATE_TRACE_POINTS
39 #include <trace/events/fsi_master_gpio.h>
40
41 #define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master)
42
43 struct fsi_gpio_msg {
44 uint64_t msg;
45 uint8_t bits;
46 };
47
clock_toggle(struct fsi_master_gpio * master,int count)48 static void clock_toggle(struct fsi_master_gpio *master, int count)
49 {
50 int i;
51
52 for (i = 0; i < count; i++) {
53 if (!master->no_delays)
54 ndelay(FSI_GPIO_STD_DLY);
55 gpiod_set_value(master->gpio_clk, 0);
56 if (!master->no_delays)
57 ndelay(FSI_GPIO_STD_DLY);
58 gpiod_set_value(master->gpio_clk, 1);
59 }
60 }
61
sda_clock_in(struct fsi_master_gpio * master)62 static int sda_clock_in(struct fsi_master_gpio *master)
63 {
64 int in;
65
66 if (!master->no_delays)
67 ndelay(FSI_GPIO_STD_DLY);
68 gpiod_set_value(master->gpio_clk, 0);
69
70 /* Dummy read to feed the synchronizers */
71 gpiod_get_value(master->gpio_data);
72
73 /* Actual data read */
74 in = gpiod_get_value(master->gpio_data);
75 if (!master->no_delays)
76 ndelay(FSI_GPIO_STD_DLY);
77 gpiod_set_value(master->gpio_clk, 1);
78 return in ? 1 : 0;
79 }
80
sda_out(struct fsi_master_gpio * master,int value)81 static void sda_out(struct fsi_master_gpio *master, int value)
82 {
83 gpiod_set_value(master->gpio_data, value);
84 }
85
set_sda_input(struct fsi_master_gpio * master)86 static void set_sda_input(struct fsi_master_gpio *master)
87 {
88 gpiod_direction_input(master->gpio_data);
89 gpiod_set_value(master->gpio_trans, 0);
90 }
91
set_sda_output(struct fsi_master_gpio * master,int value)92 static void set_sda_output(struct fsi_master_gpio *master, int value)
93 {
94 gpiod_set_value(master->gpio_trans, 1);
95 gpiod_direction_output(master->gpio_data, value);
96 }
97
clock_zeros(struct fsi_master_gpio * master,int count)98 static void clock_zeros(struct fsi_master_gpio *master, int count)
99 {
100 trace_fsi_master_gpio_clock_zeros(master, count);
101 set_sda_output(master, 1);
102 clock_toggle(master, count);
103 }
104
echo_delay(struct fsi_master_gpio * master)105 static void echo_delay(struct fsi_master_gpio *master)
106 {
107 clock_zeros(master, master->t_echo_delay);
108 }
109
110
serial_in(struct fsi_master_gpio * master,struct fsi_gpio_msg * msg,uint8_t num_bits)111 static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg,
112 uint8_t num_bits)
113 {
114 uint8_t bit, in_bit;
115
116 set_sda_input(master);
117
118 for (bit = 0; bit < num_bits; bit++) {
119 in_bit = sda_clock_in(master);
120 msg->msg <<= 1;
121 msg->msg |= ~in_bit & 0x1; /* Data is active low */
122 }
123 msg->bits += num_bits;
124
125 trace_fsi_master_gpio_in(master, num_bits, msg->msg);
126 }
127
serial_out(struct fsi_master_gpio * master,const struct fsi_gpio_msg * cmd)128 static void serial_out(struct fsi_master_gpio *master,
129 const struct fsi_gpio_msg *cmd)
130 {
131 uint8_t bit;
132 uint64_t msg = ~cmd->msg; /* Data is active low */
133 uint64_t sda_mask = 0x1ULL << (cmd->bits - 1);
134 uint64_t last_bit = ~0;
135 int next_bit;
136
137 trace_fsi_master_gpio_out(master, cmd->bits, cmd->msg);
138
139 if (!cmd->bits) {
140 dev_warn(master->dev, "trying to output 0 bits\n");
141 return;
142 }
143 set_sda_output(master, 0);
144
145 /* Send the start bit */
146 sda_out(master, 0);
147 clock_toggle(master, 1);
148
149 /* Send the message */
150 for (bit = 0; bit < cmd->bits; bit++) {
151 next_bit = (msg & sda_mask) >> (cmd->bits - 1);
152 if (last_bit ^ next_bit) {
153 sda_out(master, next_bit);
154 last_bit = next_bit;
155 }
156 clock_toggle(master, 1);
157 msg <<= 1;
158 }
159 }
160
msg_push_bits(struct fsi_gpio_msg * msg,uint64_t data,int bits)161 static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits)
162 {
163 msg->msg <<= bits;
164 msg->msg |= data & ((1ull << bits) - 1);
165 msg->bits += bits;
166 }
167
msg_push_crc(struct fsi_gpio_msg * msg)168 static void msg_push_crc(struct fsi_gpio_msg *msg)
169 {
170 uint8_t crc;
171 int top;
172
173 top = msg->bits & 0x3;
174
175 /* start bit, and any non-aligned top bits */
176 crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1);
177
178 /* aligned bits */
179 crc = crc4(crc, msg->msg, msg->bits - top);
180
181 msg_push_bits(msg, crc, 4);
182 }
183
check_same_address(struct fsi_master_gpio * master,int id,uint32_t addr)184 static bool check_same_address(struct fsi_master_gpio *master, int id,
185 uint32_t addr)
186 {
187 /* this will also handle LAST_ADDR_INVALID */
188 return master->last_addr == (((id & 0x3) << 21) | (addr & ~0x3));
189 }
190
check_relative_address(struct fsi_master_gpio * master,int id,uint32_t addr,uint32_t * rel_addrp)191 static bool check_relative_address(struct fsi_master_gpio *master, int id,
192 uint32_t addr, uint32_t *rel_addrp)
193 {
194 uint32_t last_addr = master->last_addr;
195 int32_t rel_addr;
196
197 if (last_addr == LAST_ADDR_INVALID)
198 return false;
199
200 /* We may be in 23-bit addressing mode, which uses the id as the
201 * top two address bits. So, if we're referencing a different ID,
202 * use absolute addresses.
203 */
204 if (((last_addr >> 21) & 0x3) != id)
205 return false;
206
207 /* remove the top two bits from any 23-bit addressing */
208 last_addr &= (1 << 21) - 1;
209
210 /* We know that the addresses are limited to 21 bits, so this won't
211 * overflow the signed rel_addr */
212 rel_addr = addr - last_addr;
213 if (rel_addr > 255 || rel_addr < -256)
214 return false;
215
216 *rel_addrp = (uint32_t)rel_addr;
217
218 return true;
219 }
220
last_address_update(struct fsi_master_gpio * master,int id,bool valid,uint32_t addr)221 static void last_address_update(struct fsi_master_gpio *master,
222 int id, bool valid, uint32_t addr)
223 {
224 if (!valid)
225 master->last_addr = LAST_ADDR_INVALID;
226 else
227 master->last_addr = ((id & 0x3) << 21) | (addr & ~0x3);
228 }
229
230 /*
231 * Encode an Absolute/Relative/Same Address command
232 */
build_ar_command(struct fsi_master_gpio * master,struct fsi_gpio_msg * cmd,uint8_t id,uint32_t addr,size_t size,const void * data)233 static void build_ar_command(struct fsi_master_gpio *master,
234 struct fsi_gpio_msg *cmd, uint8_t id,
235 uint32_t addr, size_t size, const void *data)
236 {
237 int i, addr_bits, opcode_bits;
238 bool write = !!data;
239 uint8_t ds, opcode;
240 uint32_t rel_addr;
241
242 cmd->bits = 0;
243 cmd->msg = 0;
244
245 /* we have 21 bits of address max */
246 addr &= ((1 << 21) - 1);
247
248 /* cmd opcodes are variable length - SAME_AR is only two bits */
249 opcode_bits = 3;
250
251 if (check_same_address(master, id, addr)) {
252 /* we still address the byte offset within the word */
253 addr_bits = 2;
254 opcode_bits = 2;
255 opcode = FSI_CMD_SAME_AR;
256 trace_fsi_master_gpio_cmd_same_addr(master);
257
258 } else if (check_relative_address(master, id, addr, &rel_addr)) {
259 /* 8 bits plus sign */
260 addr_bits = 9;
261 addr = rel_addr;
262 opcode = FSI_CMD_REL_AR;
263 trace_fsi_master_gpio_cmd_rel_addr(master, rel_addr);
264
265 } else {
266 addr_bits = 21;
267 opcode = FSI_CMD_ABS_AR;
268 trace_fsi_master_gpio_cmd_abs_addr(master, addr);
269 }
270
271 /*
272 * The read/write size is encoded in the lower bits of the address
273 * (as it must be naturally-aligned), and the following ds bit.
274 *
275 * size addr:1 addr:0 ds
276 * 1 x x 0
277 * 2 x 0 1
278 * 4 0 1 1
279 *
280 */
281 ds = size > 1 ? 1 : 0;
282 addr &= ~(size - 1);
283 if (size == 4)
284 addr |= 1;
285
286 msg_push_bits(cmd, id, 2);
287 msg_push_bits(cmd, opcode, opcode_bits);
288 msg_push_bits(cmd, write ? 0 : 1, 1);
289 msg_push_bits(cmd, addr, addr_bits);
290 msg_push_bits(cmd, ds, 1);
291 for (i = 0; write && i < size; i++)
292 msg_push_bits(cmd, ((uint8_t *)data)[i], 8);
293
294 msg_push_crc(cmd);
295 }
296
build_dpoll_command(struct fsi_gpio_msg * cmd,uint8_t slave_id)297 static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
298 {
299 cmd->bits = 0;
300 cmd->msg = 0;
301
302 msg_push_bits(cmd, slave_id, 2);
303 msg_push_bits(cmd, FSI_CMD_DPOLL, 3);
304 msg_push_crc(cmd);
305 }
306
build_epoll_command(struct fsi_gpio_msg * cmd,uint8_t slave_id)307 static void build_epoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
308 {
309 cmd->bits = 0;
310 cmd->msg = 0;
311
312 msg_push_bits(cmd, slave_id, 2);
313 msg_push_bits(cmd, FSI_CMD_EPOLL, 3);
314 msg_push_crc(cmd);
315 }
316
build_term_command(struct fsi_gpio_msg * cmd,uint8_t slave_id)317 static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
318 {
319 cmd->bits = 0;
320 cmd->msg = 0;
321
322 msg_push_bits(cmd, slave_id, 2);
323 msg_push_bits(cmd, FSI_CMD_TERM, 6);
324 msg_push_crc(cmd);
325 }
326
327 /*
328 * Note: callers rely specifically on this returning -EAGAIN for
329 * a CRC error detected in the response. Use other error code
330 * for other situations. It will be converted to something else
331 * higher up the stack before it reaches userspace.
332 */
read_one_response(struct fsi_master_gpio * master,uint8_t data_size,struct fsi_gpio_msg * msgp,uint8_t * tagp)333 static int read_one_response(struct fsi_master_gpio *master,
334 uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp)
335 {
336 struct fsi_gpio_msg msg;
337 unsigned long flags;
338 uint32_t crc;
339 uint8_t tag;
340 int i;
341
342 local_irq_save(flags);
343
344 /* wait for the start bit */
345 for (i = 0; i < FSI_MASTER_MTOE_COUNT; i++) {
346 msg.bits = 0;
347 msg.msg = 0;
348 serial_in(master, &msg, 1);
349 if (msg.msg)
350 break;
351 }
352 if (i == FSI_MASTER_MTOE_COUNT) {
353 dev_dbg(master->dev,
354 "Master time out waiting for response\n");
355 local_irq_restore(flags);
356 return -ETIMEDOUT;
357 }
358
359 msg.bits = 0;
360 msg.msg = 0;
361
362 /* Read slave ID & response tag */
363 serial_in(master, &msg, 4);
364
365 tag = msg.msg & 0x3;
366
367 /* If we have an ACK and we're expecting data, clock the data in too */
368 if (tag == FSI_RESP_ACK && data_size)
369 serial_in(master, &msg, data_size * 8);
370
371 /* read CRC */
372 serial_in(master, &msg, FSI_CRC_SIZE);
373
374 local_irq_restore(flags);
375
376 /* we have a whole message now; check CRC */
377 crc = crc4(0, 1, 1);
378 crc = crc4(crc, msg.msg, msg.bits);
379 if (crc) {
380 /* Check if it's all 1's, that probably means the host is off */
381 if (((~msg.msg) & ((1ull << msg.bits) - 1)) == 0)
382 return -ENODEV;
383 dev_dbg(master->dev, "ERR response CRC msg: 0x%016llx (%d bits)\n",
384 msg.msg, msg.bits);
385 return -EAGAIN;
386 }
387
388 if (msgp)
389 *msgp = msg;
390 if (tagp)
391 *tagp = tag;
392
393 return 0;
394 }
395
issue_term(struct fsi_master_gpio * master,uint8_t slave)396 static int issue_term(struct fsi_master_gpio *master, uint8_t slave)
397 {
398 struct fsi_gpio_msg cmd;
399 unsigned long flags;
400 uint8_t tag;
401 int rc;
402
403 build_term_command(&cmd, slave);
404
405 local_irq_save(flags);
406 serial_out(master, &cmd);
407 echo_delay(master);
408 local_irq_restore(flags);
409
410 rc = read_one_response(master, 0, NULL, &tag);
411 if (rc < 0) {
412 dev_err(master->dev,
413 "TERM failed; lost communication with slave\n");
414 return -EIO;
415 } else if (tag != FSI_RESP_ACK) {
416 dev_err(master->dev, "TERM failed; response %d\n", tag);
417 return -EIO;
418 }
419
420 return 0;
421 }
422
poll_for_response(struct fsi_master_gpio * master,uint8_t slave,uint8_t size,void * data)423 static int poll_for_response(struct fsi_master_gpio *master,
424 uint8_t slave, uint8_t size, void *data)
425 {
426 struct fsi_gpio_msg response, cmd;
427 int busy_count = 0, rc, i;
428 unsigned long flags;
429 uint8_t tag;
430 uint8_t *data_byte = data;
431 int crc_err_retries = 0;
432 retry:
433 rc = read_one_response(master, size, &response, &tag);
434
435 /* Handle retries on CRC errors */
436 if (rc == -EAGAIN) {
437 /* Too many retries ? */
438 if (crc_err_retries++ > FSI_CRC_ERR_RETRIES) {
439 /*
440 * Pass it up as a -EIO otherwise upper level will retry
441 * the whole command which isn't what we want here.
442 */
443 rc = -EIO;
444 goto fail;
445 }
446 dev_dbg(master->dev,
447 "CRC error retry %d\n", crc_err_retries);
448 trace_fsi_master_gpio_crc_rsp_error(master);
449 build_epoll_command(&cmd, slave);
450 local_irq_save(flags);
451 clock_zeros(master, FSI_MASTER_EPOLL_CLOCKS);
452 serial_out(master, &cmd);
453 echo_delay(master);
454 local_irq_restore(flags);
455 goto retry;
456 } else if (rc)
457 goto fail;
458
459 switch (tag) {
460 case FSI_RESP_ACK:
461 if (size && data) {
462 uint64_t val = response.msg;
463 /* clear crc & mask */
464 val >>= 4;
465 val &= (1ull << (size * 8)) - 1;
466
467 for (i = 0; i < size; i++) {
468 data_byte[size-i-1] = val;
469 val >>= 8;
470 }
471 }
472 break;
473 case FSI_RESP_BUSY:
474 /*
475 * Its necessary to clock slave before issuing
476 * d-poll, not indicated in the hardware protocol
477 * spec. < 20 clocks causes slave to hang, 21 ok.
478 */
479 if (busy_count++ < FSI_MASTER_MAX_BUSY) {
480 build_dpoll_command(&cmd, slave);
481 local_irq_save(flags);
482 clock_zeros(master, FSI_MASTER_DPOLL_CLOCKS);
483 serial_out(master, &cmd);
484 echo_delay(master);
485 local_irq_restore(flags);
486 goto retry;
487 }
488 dev_warn(master->dev,
489 "ERR slave is stuck in busy state, issuing TERM\n");
490 local_irq_save(flags);
491 clock_zeros(master, FSI_MASTER_DPOLL_CLOCKS);
492 local_irq_restore(flags);
493 issue_term(master, slave);
494 rc = -EIO;
495 break;
496
497 case FSI_RESP_ERRA:
498 dev_dbg(master->dev, "ERRA received: 0x%x\n", (int)response.msg);
499 rc = -EIO;
500 break;
501 case FSI_RESP_ERRC:
502 dev_dbg(master->dev, "ERRC received: 0x%x\n", (int)response.msg);
503 trace_fsi_master_gpio_crc_cmd_error(master);
504 rc = -EAGAIN;
505 break;
506 }
507
508 if (busy_count > 0)
509 trace_fsi_master_gpio_poll_response_busy(master, busy_count);
510 fail:
511 /*
512 * tSendDelay clocks, avoids signal reflections when switching
513 * from receive of response back to send of data.
514 */
515 local_irq_save(flags);
516 clock_zeros(master, master->t_send_delay);
517 local_irq_restore(flags);
518
519 return rc;
520 }
521
send_request(struct fsi_master_gpio * master,struct fsi_gpio_msg * cmd)522 static int send_request(struct fsi_master_gpio *master,
523 struct fsi_gpio_msg *cmd)
524 {
525 unsigned long flags;
526
527 if (master->external_mode)
528 return -EBUSY;
529
530 local_irq_save(flags);
531 serial_out(master, cmd);
532 echo_delay(master);
533 local_irq_restore(flags);
534
535 return 0;
536 }
537
fsi_master_gpio_xfer(struct fsi_master_gpio * master,uint8_t slave,struct fsi_gpio_msg * cmd,size_t resp_len,void * resp)538 static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave,
539 struct fsi_gpio_msg *cmd, size_t resp_len, void *resp)
540 {
541 int rc = -EAGAIN, retries = 0;
542
543 while ((retries++) < FSI_CRC_ERR_RETRIES) {
544 rc = send_request(master, cmd);
545 if (rc)
546 break;
547 rc = poll_for_response(master, slave, resp_len, resp);
548 if (rc != -EAGAIN)
549 break;
550 rc = -EIO;
551 dev_warn(master->dev, "ECRC retry %d\n", retries);
552
553 /* Pace it a bit before retry */
554 msleep(1);
555 }
556
557 return rc;
558 }
559
fsi_master_gpio_read(struct fsi_master * _master,int link,uint8_t id,uint32_t addr,void * val,size_t size)560 static int fsi_master_gpio_read(struct fsi_master *_master, int link,
561 uint8_t id, uint32_t addr, void *val, size_t size)
562 {
563 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
564 struct fsi_gpio_msg cmd;
565 int rc;
566
567 if (link != 0)
568 return -ENODEV;
569
570 mutex_lock(&master->cmd_lock);
571 build_ar_command(master, &cmd, id, addr, size, NULL);
572 rc = fsi_master_gpio_xfer(master, id, &cmd, size, val);
573 last_address_update(master, id, rc == 0, addr);
574 mutex_unlock(&master->cmd_lock);
575
576 return rc;
577 }
578
fsi_master_gpio_write(struct fsi_master * _master,int link,uint8_t id,uint32_t addr,const void * val,size_t size)579 static int fsi_master_gpio_write(struct fsi_master *_master, int link,
580 uint8_t id, uint32_t addr, const void *val, size_t size)
581 {
582 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
583 struct fsi_gpio_msg cmd;
584 int rc;
585
586 if (link != 0)
587 return -ENODEV;
588
589 mutex_lock(&master->cmd_lock);
590 build_ar_command(master, &cmd, id, addr, size, val);
591 rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
592 last_address_update(master, id, rc == 0, addr);
593 mutex_unlock(&master->cmd_lock);
594
595 return rc;
596 }
597
fsi_master_gpio_term(struct fsi_master * _master,int link,uint8_t id)598 static int fsi_master_gpio_term(struct fsi_master *_master,
599 int link, uint8_t id)
600 {
601 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
602 struct fsi_gpio_msg cmd;
603 int rc;
604
605 if (link != 0)
606 return -ENODEV;
607
608 mutex_lock(&master->cmd_lock);
609 build_term_command(&cmd, id);
610 rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
611 last_address_update(master, id, false, 0);
612 mutex_unlock(&master->cmd_lock);
613
614 return rc;
615 }
616
fsi_master_gpio_break(struct fsi_master * _master,int link)617 static int fsi_master_gpio_break(struct fsi_master *_master, int link)
618 {
619 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
620 unsigned long flags;
621
622 if (link != 0)
623 return -ENODEV;
624
625 trace_fsi_master_gpio_break(master);
626
627 mutex_lock(&master->cmd_lock);
628 if (master->external_mode) {
629 mutex_unlock(&master->cmd_lock);
630 return -EBUSY;
631 }
632
633 local_irq_save(flags);
634
635 set_sda_output(master, 1);
636 sda_out(master, 1);
637 clock_toggle(master, FSI_PRE_BREAK_CLOCKS);
638 sda_out(master, 0);
639 clock_toggle(master, FSI_BREAK_CLOCKS);
640 echo_delay(master);
641 sda_out(master, 1);
642 clock_toggle(master, FSI_POST_BREAK_CLOCKS);
643
644 local_irq_restore(flags);
645
646 last_address_update(master, 0, false, 0);
647 mutex_unlock(&master->cmd_lock);
648
649 /* Wait for logic reset to take effect */
650 udelay(200);
651
652 return 0;
653 }
654
fsi_master_gpio_init(struct fsi_master_gpio * master)655 static void fsi_master_gpio_init(struct fsi_master_gpio *master)
656 {
657 unsigned long flags;
658
659 gpiod_direction_output(master->gpio_mux, 1);
660 gpiod_direction_output(master->gpio_trans, 1);
661 gpiod_direction_output(master->gpio_enable, 1);
662 gpiod_direction_output(master->gpio_clk, 1);
663 gpiod_direction_output(master->gpio_data, 1);
664
665 /* todo: evaluate if clocks can be reduced */
666 local_irq_save(flags);
667 clock_zeros(master, FSI_INIT_CLOCKS);
668 local_irq_restore(flags);
669 }
670
fsi_master_gpio_init_external(struct fsi_master_gpio * master)671 static void fsi_master_gpio_init_external(struct fsi_master_gpio *master)
672 {
673 gpiod_direction_output(master->gpio_mux, 0);
674 gpiod_direction_output(master->gpio_trans, 0);
675 gpiod_direction_output(master->gpio_enable, 1);
676 gpiod_direction_input(master->gpio_clk);
677 gpiod_direction_input(master->gpio_data);
678 }
679
fsi_master_gpio_link_enable(struct fsi_master * _master,int link)680 static int fsi_master_gpio_link_enable(struct fsi_master *_master, int link)
681 {
682 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
683 int rc = -EBUSY;
684
685 if (link != 0)
686 return -ENODEV;
687
688 mutex_lock(&master->cmd_lock);
689 if (!master->external_mode) {
690 gpiod_set_value(master->gpio_enable, 1);
691 rc = 0;
692 }
693 mutex_unlock(&master->cmd_lock);
694
695 return rc;
696 }
697
fsi_master_gpio_link_config(struct fsi_master * _master,int link,u8 t_send_delay,u8 t_echo_delay)698 static int fsi_master_gpio_link_config(struct fsi_master *_master, int link,
699 u8 t_send_delay, u8 t_echo_delay)
700 {
701 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
702
703 if (link != 0)
704 return -ENODEV;
705
706 mutex_lock(&master->cmd_lock);
707 master->t_send_delay = t_send_delay;
708 master->t_echo_delay = t_echo_delay;
709 mutex_unlock(&master->cmd_lock);
710
711 return 0;
712 }
713
external_mode_show(struct device * dev,struct device_attribute * attr,char * buf)714 static ssize_t external_mode_show(struct device *dev,
715 struct device_attribute *attr, char *buf)
716 {
717 struct fsi_master_gpio *master = dev_get_drvdata(dev);
718
719 return snprintf(buf, PAGE_SIZE - 1, "%u\n",
720 master->external_mode ? 1 : 0);
721 }
722
external_mode_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)723 static ssize_t external_mode_store(struct device *dev,
724 struct device_attribute *attr, const char *buf, size_t count)
725 {
726 struct fsi_master_gpio *master = dev_get_drvdata(dev);
727 unsigned long val;
728 bool external_mode;
729 int err;
730
731 err = kstrtoul(buf, 0, &val);
732 if (err)
733 return err;
734
735 external_mode = !!val;
736
737 mutex_lock(&master->cmd_lock);
738
739 if (external_mode == master->external_mode) {
740 mutex_unlock(&master->cmd_lock);
741 return count;
742 }
743
744 master->external_mode = external_mode;
745 if (master->external_mode)
746 fsi_master_gpio_init_external(master);
747 else
748 fsi_master_gpio_init(master);
749
750 mutex_unlock(&master->cmd_lock);
751
752 fsi_master_rescan(&master->master);
753
754 return count;
755 }
756
757 static DEVICE_ATTR(external_mode, 0664,
758 external_mode_show, external_mode_store);
759
fsi_master_gpio_release(struct device * dev)760 static void fsi_master_gpio_release(struct device *dev)
761 {
762 struct fsi_master_gpio *master = to_fsi_master_gpio(dev_to_fsi_master(dev));
763
764 of_node_put(dev_of_node(master->dev));
765
766 kfree(master);
767 }
768
fsi_master_gpio_probe(struct platform_device * pdev)769 static int fsi_master_gpio_probe(struct platform_device *pdev)
770 {
771 struct fsi_master_gpio *master;
772 struct gpio_desc *gpio;
773 int rc;
774
775 master = kzalloc(sizeof(*master), GFP_KERNEL);
776 if (!master)
777 return -ENOMEM;
778
779 master->dev = &pdev->dev;
780 master->master.dev.parent = master->dev;
781 master->master.dev.of_node = of_node_get(dev_of_node(master->dev));
782 master->master.dev.release = fsi_master_gpio_release;
783 master->last_addr = LAST_ADDR_INVALID;
784
785 gpio = devm_gpiod_get(&pdev->dev, "clock", 0);
786 if (IS_ERR(gpio)) {
787 dev_err(&pdev->dev, "failed to get clock gpio\n");
788 rc = PTR_ERR(gpio);
789 goto err_free;
790 }
791 master->gpio_clk = gpio;
792
793 gpio = devm_gpiod_get(&pdev->dev, "data", 0);
794 if (IS_ERR(gpio)) {
795 dev_err(&pdev->dev, "failed to get data gpio\n");
796 rc = PTR_ERR(gpio);
797 goto err_free;
798 }
799 master->gpio_data = gpio;
800
801 /* Optional GPIOs */
802 gpio = devm_gpiod_get_optional(&pdev->dev, "trans", 0);
803 if (IS_ERR(gpio)) {
804 dev_err(&pdev->dev, "failed to get trans gpio\n");
805 rc = PTR_ERR(gpio);
806 goto err_free;
807 }
808 master->gpio_trans = gpio;
809
810 gpio = devm_gpiod_get_optional(&pdev->dev, "enable", 0);
811 if (IS_ERR(gpio)) {
812 dev_err(&pdev->dev, "failed to get enable gpio\n");
813 rc = PTR_ERR(gpio);
814 goto err_free;
815 }
816 master->gpio_enable = gpio;
817
818 gpio = devm_gpiod_get_optional(&pdev->dev, "mux", 0);
819 if (IS_ERR(gpio)) {
820 dev_err(&pdev->dev, "failed to get mux gpio\n");
821 rc = PTR_ERR(gpio);
822 goto err_free;
823 }
824 master->gpio_mux = gpio;
825
826 /*
827 * Check if GPIO block is slow enought that no extra delays
828 * are necessary. This improves performance on ast2500 by
829 * an order of magnitude.
830 */
831 master->no_delays = device_property_present(&pdev->dev, "no-gpio-delays");
832
833 /* Default FSI command delays */
834 master->t_send_delay = FSI_SEND_DELAY_CLOCKS;
835 master->t_echo_delay = FSI_ECHO_DELAY_CLOCKS;
836
837 master->master.n_links = 1;
838 master->master.flags = FSI_MASTER_FLAG_SWCLOCK;
839 master->master.read = fsi_master_gpio_read;
840 master->master.write = fsi_master_gpio_write;
841 master->master.term = fsi_master_gpio_term;
842 master->master.send_break = fsi_master_gpio_break;
843 master->master.link_enable = fsi_master_gpio_link_enable;
844 master->master.link_config = fsi_master_gpio_link_config;
845 platform_set_drvdata(pdev, master);
846 mutex_init(&master->cmd_lock);
847
848 fsi_master_gpio_init(master);
849
850 rc = device_create_file(&pdev->dev, &dev_attr_external_mode);
851 if (rc)
852 goto err_free;
853
854 rc = fsi_master_register(&master->master);
855 if (rc) {
856 device_remove_file(&pdev->dev, &dev_attr_external_mode);
857 put_device(&master->master.dev);
858 return rc;
859 }
860 return 0;
861 err_free:
862 kfree(master);
863 return rc;
864 }
865
866
867
fsi_master_gpio_remove(struct platform_device * pdev)868 static int fsi_master_gpio_remove(struct platform_device *pdev)
869 {
870 struct fsi_master_gpio *master = platform_get_drvdata(pdev);
871
872 device_remove_file(&pdev->dev, &dev_attr_external_mode);
873
874 fsi_master_unregister(&master->master);
875
876 return 0;
877 }
878
879 static const struct of_device_id fsi_master_gpio_match[] = {
880 { .compatible = "fsi-master-gpio" },
881 { },
882 };
883
884 static struct platform_driver fsi_master_gpio_driver = {
885 .driver = {
886 .name = "fsi-master-gpio",
887 .of_match_table = fsi_master_gpio_match,
888 },
889 .probe = fsi_master_gpio_probe,
890 .remove = fsi_master_gpio_remove,
891 };
892
893 module_platform_driver(fsi_master_gpio_driver);
894 MODULE_LICENSE("GPL");
895