1 /*
2  *  74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
3  *
4  *  Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
5  *  Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
6  *
7  *  This program is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License version 2 as
9  *  published by the Free Software Foundation.
10  */
11 
12 #include <linux/init.h>
13 #include <linux/mutex.h>
14 #include <linux/spi/spi.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/slab.h>
18 #include <linux/module.h>
19 
20 #define GEN_74X164_NUMBER_GPIOS	8
21 
22 struct gen_74x164_chip {
23 	struct gpio_chip	gpio_chip;
24 	struct mutex		lock;
25 	struct gpio_desc	*gpiod_oe;
26 	u32			registers;
27 	/*
28 	 * Since the registers are chained, every byte sent will make
29 	 * the previous byte shift to the next register in the
30 	 * chain. Thus, the first byte sent will end up in the last
31 	 * register at the end of the transfer. So, to have a logical
32 	 * numbering, store the bytes in reverse order.
33 	 */
34 	u8			buffer[];
35 };
36 
__gen_74x164_write_config(struct gen_74x164_chip * chip)37 static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
38 {
39 	return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer,
40 			 chip->registers);
41 }
42 
gen_74x164_get_value(struct gpio_chip * gc,unsigned offset)43 static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
44 {
45 	struct gen_74x164_chip *chip = gpiochip_get_data(gc);
46 	u8 bank = chip->registers - 1 - offset / 8;
47 	u8 pin = offset % 8;
48 	int ret;
49 
50 	mutex_lock(&chip->lock);
51 	ret = (chip->buffer[bank] >> pin) & 0x1;
52 	mutex_unlock(&chip->lock);
53 
54 	return ret;
55 }
56 
gen_74x164_set_value(struct gpio_chip * gc,unsigned offset,int val)57 static void gen_74x164_set_value(struct gpio_chip *gc,
58 		unsigned offset, int val)
59 {
60 	struct gen_74x164_chip *chip = gpiochip_get_data(gc);
61 	u8 bank = chip->registers - 1 - offset / 8;
62 	u8 pin = offset % 8;
63 
64 	mutex_lock(&chip->lock);
65 	if (val)
66 		chip->buffer[bank] |= (1 << pin);
67 	else
68 		chip->buffer[bank] &= ~(1 << pin);
69 
70 	__gen_74x164_write_config(chip);
71 	mutex_unlock(&chip->lock);
72 }
73 
gen_74x164_set_multiple(struct gpio_chip * gc,unsigned long * mask,unsigned long * bits)74 static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
75 				    unsigned long *bits)
76 {
77 	struct gen_74x164_chip *chip = gpiochip_get_data(gc);
78 	unsigned int i, idx, shift;
79 	u8 bank, bankmask;
80 
81 	mutex_lock(&chip->lock);
82 	for (i = 0, bank = chip->registers - 1; i < chip->registers;
83 	     i++, bank--) {
84 		idx = i / sizeof(*mask);
85 		shift = i % sizeof(*mask) * BITS_PER_BYTE;
86 		bankmask = mask[idx] >> shift;
87 		if (!bankmask)
88 			continue;
89 
90 		chip->buffer[bank] &= ~bankmask;
91 		chip->buffer[bank] |= bankmask & (bits[idx] >> shift);
92 	}
93 	__gen_74x164_write_config(chip);
94 	mutex_unlock(&chip->lock);
95 }
96 
gen_74x164_direction_output(struct gpio_chip * gc,unsigned offset,int val)97 static int gen_74x164_direction_output(struct gpio_chip *gc,
98 		unsigned offset, int val)
99 {
100 	gen_74x164_set_value(gc, offset, val);
101 	return 0;
102 }
103 
gen_74x164_probe(struct spi_device * spi)104 static int gen_74x164_probe(struct spi_device *spi)
105 {
106 	struct gen_74x164_chip *chip;
107 	u32 nregs;
108 	int ret;
109 
110 	/*
111 	 * bits_per_word cannot be configured in platform data
112 	 */
113 	spi->bits_per_word = 8;
114 
115 	ret = spi_setup(spi);
116 	if (ret < 0)
117 		return ret;
118 
119 	if (of_property_read_u32(spi->dev.of_node, "registers-number",
120 				 &nregs)) {
121 		dev_err(&spi->dev,
122 			"Missing registers-number property in the DT.\n");
123 		return -EINVAL;
124 	}
125 
126 	chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL);
127 	if (!chip)
128 		return -ENOMEM;
129 
130 	chip->gpiod_oe = devm_gpiod_get_optional(&spi->dev, "enable",
131 						 GPIOD_OUT_LOW);
132 	if (IS_ERR(chip->gpiod_oe))
133 		return PTR_ERR(chip->gpiod_oe);
134 
135 	gpiod_set_value_cansleep(chip->gpiod_oe, 1);
136 
137 	spi_set_drvdata(spi, chip);
138 
139 	chip->gpio_chip.label = spi->modalias;
140 	chip->gpio_chip.direction_output = gen_74x164_direction_output;
141 	chip->gpio_chip.get = gen_74x164_get_value;
142 	chip->gpio_chip.set = gen_74x164_set_value;
143 	chip->gpio_chip.set_multiple = gen_74x164_set_multiple;
144 	chip->gpio_chip.base = -1;
145 
146 	chip->registers = nregs;
147 	chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
148 
149 	chip->gpio_chip.can_sleep = true;
150 	chip->gpio_chip.parent = &spi->dev;
151 	chip->gpio_chip.owner = THIS_MODULE;
152 
153 	mutex_init(&chip->lock);
154 
155 	ret = __gen_74x164_write_config(chip);
156 	if (ret) {
157 		dev_err(&spi->dev, "Failed writing: %d\n", ret);
158 		goto exit_destroy;
159 	}
160 
161 	ret = gpiochip_add_data(&chip->gpio_chip, chip);
162 	if (!ret)
163 		return 0;
164 
165 exit_destroy:
166 	mutex_destroy(&chip->lock);
167 
168 	return ret;
169 }
170 
gen_74x164_remove(struct spi_device * spi)171 static int gen_74x164_remove(struct spi_device *spi)
172 {
173 	struct gen_74x164_chip *chip = spi_get_drvdata(spi);
174 
175 	gpiod_set_value_cansleep(chip->gpiod_oe, 0);
176 	gpiochip_remove(&chip->gpio_chip);
177 	mutex_destroy(&chip->lock);
178 
179 	return 0;
180 }
181 
182 static const struct of_device_id gen_74x164_dt_ids[] = {
183 	{ .compatible = "fairchild,74hc595" },
184 	{ .compatible = "nxp,74lvc594" },
185 	{},
186 };
187 MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
188 
189 static struct spi_driver gen_74x164_driver = {
190 	.driver = {
191 		.name		= "74x164",
192 		.of_match_table	= gen_74x164_dt_ids,
193 	},
194 	.probe		= gen_74x164_probe,
195 	.remove		= gen_74x164_remove,
196 };
197 module_spi_driver(gen_74x164_driver);
198 
199 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
200 MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
201 MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
202 MODULE_LICENSE("GPL v2");
203