1 /*
2  * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
3  *
4  * Copyright (C) 2007 David Brownell
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19  */
20 
21 #include <linux/gpio/driver.h>
22 #include <linux/i2c.h>
23 #include <linux/platform_data/pcf857x.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/irqdomain.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/of.h>
30 #include <linux/of_device.h>
31 #include <linux/slab.h>
32 #include <linux/spinlock.h>
33 
34 
35 static const struct i2c_device_id pcf857x_id[] = {
36 	{ "pcf8574", 8 },
37 	{ "pcf8574a", 8 },
38 	{ "pca8574", 8 },
39 	{ "pca9670", 8 },
40 	{ "pca9672", 8 },
41 	{ "pca9674", 8 },
42 	{ "pcf8575", 16 },
43 	{ "pca8575", 16 },
44 	{ "pca9671", 16 },
45 	{ "pca9673", 16 },
46 	{ "pca9675", 16 },
47 	{ "max7328", 8 },
48 	{ "max7329", 8 },
49 	{ }
50 };
51 MODULE_DEVICE_TABLE(i2c, pcf857x_id);
52 
53 #ifdef CONFIG_OF
54 static const struct of_device_id pcf857x_of_table[] = {
55 	{ .compatible = "nxp,pcf8574" },
56 	{ .compatible = "nxp,pcf8574a" },
57 	{ .compatible = "nxp,pca8574" },
58 	{ .compatible = "nxp,pca9670" },
59 	{ .compatible = "nxp,pca9672" },
60 	{ .compatible = "nxp,pca9674" },
61 	{ .compatible = "nxp,pcf8575" },
62 	{ .compatible = "nxp,pca8575" },
63 	{ .compatible = "nxp,pca9671" },
64 	{ .compatible = "nxp,pca9673" },
65 	{ .compatible = "nxp,pca9675" },
66 	{ .compatible = "maxim,max7328" },
67 	{ .compatible = "maxim,max7329" },
68 	{ }
69 };
70 MODULE_DEVICE_TABLE(of, pcf857x_of_table);
71 #endif
72 
73 /*
74  * The pcf857x, pca857x, and pca967x chips only expose one read and one
75  * write register.  Writing a "one" bit (to match the reset state) lets
76  * that pin be used as an input; it's not an open-drain model, but acts
77  * a bit like one.  This is described as "quasi-bidirectional"; read the
78  * chip documentation for details.
79  *
80  * Many other I2C GPIO expander chips (like the pca953x models) have
81  * more complex register models and more conventional circuitry using
82  * push/pull drivers.  They often use the same 0x20..0x27 addresses as
83  * pcf857x parts, making the "legacy" I2C driver model problematic.
84  */
85 struct pcf857x {
86 	struct gpio_chip	chip;
87 	struct irq_chip		irqchip;
88 	struct i2c_client	*client;
89 	struct mutex		lock;		/* protect 'out' */
90 	unsigned		out;		/* software latch */
91 	unsigned		status;		/* current status */
92 	unsigned int		irq_parent;
93 	unsigned		irq_enabled;	/* enabled irqs */
94 
95 	int (*write)(struct i2c_client *client, unsigned data);
96 	int (*read)(struct i2c_client *client);
97 };
98 
99 /*-------------------------------------------------------------------------*/
100 
101 /* Talk to 8-bit I/O expander */
102 
i2c_write_le8(struct i2c_client * client,unsigned data)103 static int i2c_write_le8(struct i2c_client *client, unsigned data)
104 {
105 	return i2c_smbus_write_byte(client, data);
106 }
107 
i2c_read_le8(struct i2c_client * client)108 static int i2c_read_le8(struct i2c_client *client)
109 {
110 	return (int)i2c_smbus_read_byte(client);
111 }
112 
113 /* Talk to 16-bit I/O expander */
114 
i2c_write_le16(struct i2c_client * client,unsigned word)115 static int i2c_write_le16(struct i2c_client *client, unsigned word)
116 {
117 	u8 buf[2] = { word & 0xff, word >> 8, };
118 	int status;
119 
120 	status = i2c_master_send(client, buf, 2);
121 	return (status < 0) ? status : 0;
122 }
123 
i2c_read_le16(struct i2c_client * client)124 static int i2c_read_le16(struct i2c_client *client)
125 {
126 	u8 buf[2];
127 	int status;
128 
129 	status = i2c_master_recv(client, buf, 2);
130 	if (status < 0)
131 		return status;
132 	return (buf[1] << 8) | buf[0];
133 }
134 
135 /*-------------------------------------------------------------------------*/
136 
pcf857x_input(struct gpio_chip * chip,unsigned offset)137 static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
138 {
139 	struct pcf857x	*gpio = gpiochip_get_data(chip);
140 	int		status;
141 
142 	mutex_lock(&gpio->lock);
143 	gpio->out |= (1 << offset);
144 	status = gpio->write(gpio->client, gpio->out);
145 	mutex_unlock(&gpio->lock);
146 
147 	return status;
148 }
149 
pcf857x_get(struct gpio_chip * chip,unsigned offset)150 static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
151 {
152 	struct pcf857x	*gpio = gpiochip_get_data(chip);
153 	int		value;
154 
155 	value = gpio->read(gpio->client);
156 	return (value < 0) ? value : !!(value & (1 << offset));
157 }
158 
pcf857x_output(struct gpio_chip * chip,unsigned offset,int value)159 static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
160 {
161 	struct pcf857x	*gpio = gpiochip_get_data(chip);
162 	unsigned	bit = 1 << offset;
163 	int		status;
164 
165 	mutex_lock(&gpio->lock);
166 	if (value)
167 		gpio->out |= bit;
168 	else
169 		gpio->out &= ~bit;
170 	status = gpio->write(gpio->client, gpio->out);
171 	mutex_unlock(&gpio->lock);
172 
173 	return status;
174 }
175 
pcf857x_set(struct gpio_chip * chip,unsigned offset,int value)176 static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
177 {
178 	pcf857x_output(chip, offset, value);
179 }
180 
181 /*-------------------------------------------------------------------------*/
182 
pcf857x_irq(int irq,void * data)183 static irqreturn_t pcf857x_irq(int irq, void *data)
184 {
185 	struct pcf857x  *gpio = data;
186 	unsigned long change, i, status;
187 
188 	status = gpio->read(gpio->client);
189 
190 	/*
191 	 * call the interrupt handler iff gpio is used as
192 	 * interrupt source, just to avoid bad irqs
193 	 */
194 	mutex_lock(&gpio->lock);
195 	change = (gpio->status ^ status) & gpio->irq_enabled;
196 	gpio->status = status;
197 	mutex_unlock(&gpio->lock);
198 
199 	for_each_set_bit(i, &change, gpio->chip.ngpio)
200 		handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));
201 
202 	return IRQ_HANDLED;
203 }
204 
205 /*
206  * NOP functions
207  */
noop(struct irq_data * data)208 static void noop(struct irq_data *data) { }
209 
pcf857x_irq_set_wake(struct irq_data * data,unsigned int on)210 static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
211 {
212 	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
213 
214 	int error = 0;
215 
216 	if (gpio->irq_parent) {
217 		error = irq_set_irq_wake(gpio->irq_parent, on);
218 		if (error) {
219 			dev_dbg(&gpio->client->dev,
220 				"irq %u doesn't support irq_set_wake\n",
221 				gpio->irq_parent);
222 			gpio->irq_parent = 0;
223 		}
224 	}
225 	return error;
226 }
227 
pcf857x_irq_enable(struct irq_data * data)228 static void pcf857x_irq_enable(struct irq_data *data)
229 {
230 	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
231 
232 	gpio->irq_enabled |= (1 << data->hwirq);
233 }
234 
pcf857x_irq_disable(struct irq_data * data)235 static void pcf857x_irq_disable(struct irq_data *data)
236 {
237 	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
238 
239 	gpio->irq_enabled &= ~(1 << data->hwirq);
240 }
241 
pcf857x_irq_bus_lock(struct irq_data * data)242 static void pcf857x_irq_bus_lock(struct irq_data *data)
243 {
244 	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
245 
246 	mutex_lock(&gpio->lock);
247 }
248 
pcf857x_irq_bus_sync_unlock(struct irq_data * data)249 static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
250 {
251 	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
252 
253 	mutex_unlock(&gpio->lock);
254 }
255 
256 /*-------------------------------------------------------------------------*/
257 
pcf857x_probe(struct i2c_client * client,const struct i2c_device_id * id)258 static int pcf857x_probe(struct i2c_client *client,
259 			 const struct i2c_device_id *id)
260 {
261 	struct pcf857x_platform_data	*pdata = dev_get_platdata(&client->dev);
262 	struct device_node		*np = client->dev.of_node;
263 	struct pcf857x			*gpio;
264 	unsigned int			n_latch = 0;
265 	int				status;
266 
267 	if (IS_ENABLED(CONFIG_OF) && np)
268 		of_property_read_u32(np, "lines-initial-states", &n_latch);
269 	else if (pdata)
270 		n_latch = pdata->n_latch;
271 	else
272 		dev_dbg(&client->dev, "no platform data\n");
273 
274 	/* Allocate, initialize, and register this gpio_chip. */
275 	gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
276 	if (!gpio)
277 		return -ENOMEM;
278 
279 	mutex_init(&gpio->lock);
280 
281 	gpio->chip.base			= pdata ? pdata->gpio_base : -1;
282 	gpio->chip.can_sleep		= true;
283 	gpio->chip.parent		= &client->dev;
284 	gpio->chip.owner		= THIS_MODULE;
285 	gpio->chip.get			= pcf857x_get;
286 	gpio->chip.set			= pcf857x_set;
287 	gpio->chip.direction_input	= pcf857x_input;
288 	gpio->chip.direction_output	= pcf857x_output;
289 	gpio->chip.ngpio		= id->driver_data;
290 
291 	/* NOTE:  the OnSemi jlc1562b is also largely compatible with
292 	 * these parts, notably for output.  It has a low-resolution
293 	 * DAC instead of pin change IRQs; and its inputs can be the
294 	 * result of comparators.
295 	 */
296 
297 	/* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
298 	 * 9670, 9672, 9764, and 9764a use quite a variety.
299 	 *
300 	 * NOTE: we don't distinguish here between *4 and *4a parts.
301 	 */
302 	if (gpio->chip.ngpio == 8) {
303 		gpio->write	= i2c_write_le8;
304 		gpio->read	= i2c_read_le8;
305 
306 		if (!i2c_check_functionality(client->adapter,
307 				I2C_FUNC_SMBUS_BYTE))
308 			status = -EIO;
309 
310 		/* fail if there's no chip present */
311 		else
312 			status = i2c_smbus_read_byte(client);
313 
314 	/* '75/'75c addresses are 0x20..0x27, just like the '74;
315 	 * the '75c doesn't have a current source pulling high.
316 	 * 9671, 9673, and 9765 use quite a variety of addresses.
317 	 *
318 	 * NOTE: we don't distinguish here between '75 and '75c parts.
319 	 */
320 	} else if (gpio->chip.ngpio == 16) {
321 		gpio->write	= i2c_write_le16;
322 		gpio->read	= i2c_read_le16;
323 
324 		if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
325 			status = -EIO;
326 
327 		/* fail if there's no chip present */
328 		else
329 			status = i2c_read_le16(client);
330 
331 	} else {
332 		dev_dbg(&client->dev, "unsupported number of gpios\n");
333 		status = -EINVAL;
334 	}
335 
336 	if (status < 0)
337 		goto fail;
338 
339 	gpio->chip.label = client->name;
340 
341 	gpio->client = client;
342 	i2c_set_clientdata(client, gpio);
343 
344 	/* NOTE:  these chips have strange "quasi-bidirectional" I/O pins.
345 	 * We can't actually know whether a pin is configured (a) as output
346 	 * and driving the signal low, or (b) as input and reporting a low
347 	 * value ... without knowing the last value written since the chip
348 	 * came out of reset (if any).  We can't read the latched output.
349 	 *
350 	 * In short, the only reliable solution for setting up pin direction
351 	 * is to do it explicitly.  The setup() method can do that, but it
352 	 * may cause transient glitching since it can't know the last value
353 	 * written (some pins may need to be driven low).
354 	 *
355 	 * Using n_latch avoids that trouble.  When left initialized to zero,
356 	 * our software copy of the "latch" then matches the chip's all-ones
357 	 * reset state.  Otherwise it flags pins to be driven low.
358 	 */
359 	gpio->out = ~n_latch;
360 	gpio->status = gpio->read(gpio->client);
361 
362 	status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
363 	if (status < 0)
364 		goto fail;
365 
366 	/* Enable irqchip if we have an interrupt */
367 	if (client->irq) {
368 		gpio->irqchip.name = "pcf857x",
369 		gpio->irqchip.irq_enable = pcf857x_irq_enable,
370 		gpio->irqchip.irq_disable = pcf857x_irq_disable,
371 		gpio->irqchip.irq_ack = noop,
372 		gpio->irqchip.irq_mask = noop,
373 		gpio->irqchip.irq_unmask = noop,
374 		gpio->irqchip.irq_set_wake = pcf857x_irq_set_wake,
375 		gpio->irqchip.irq_bus_lock = pcf857x_irq_bus_lock,
376 		gpio->irqchip.irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock,
377 		status = gpiochip_irqchip_add_nested(&gpio->chip,
378 						     &gpio->irqchip,
379 						     0, handle_level_irq,
380 						     IRQ_TYPE_NONE);
381 		if (status) {
382 			dev_err(&client->dev, "cannot add irqchip\n");
383 			goto fail;
384 		}
385 
386 		status = devm_request_threaded_irq(&client->dev, client->irq,
387 					NULL, pcf857x_irq, IRQF_ONESHOT |
388 					IRQF_TRIGGER_FALLING | IRQF_SHARED,
389 					dev_name(&client->dev), gpio);
390 		if (status)
391 			goto fail;
392 
393 		gpiochip_set_nested_irqchip(&gpio->chip, &gpio->irqchip,
394 					    client->irq);
395 		gpio->irq_parent = client->irq;
396 	}
397 
398 	/* Let platform code set up the GPIOs and their users.
399 	 * Now is the first time anyone could use them.
400 	 */
401 	if (pdata && pdata->setup) {
402 		status = pdata->setup(client,
403 				gpio->chip.base, gpio->chip.ngpio,
404 				pdata->context);
405 		if (status < 0)
406 			dev_warn(&client->dev, "setup --> %d\n", status);
407 	}
408 
409 	dev_info(&client->dev, "probed\n");
410 
411 	return 0;
412 
413 fail:
414 	dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
415 		client->name);
416 
417 	return status;
418 }
419 
pcf857x_remove(struct i2c_client * client)420 static int pcf857x_remove(struct i2c_client *client)
421 {
422 	struct pcf857x_platform_data	*pdata = dev_get_platdata(&client->dev);
423 	struct pcf857x			*gpio = i2c_get_clientdata(client);
424 	int				status = 0;
425 
426 	if (pdata && pdata->teardown) {
427 		status = pdata->teardown(client,
428 				gpio->chip.base, gpio->chip.ngpio,
429 				pdata->context);
430 		if (status < 0) {
431 			dev_err(&client->dev, "%s --> %d\n",
432 					"teardown", status);
433 			return status;
434 		}
435 	}
436 
437 	return status;
438 }
439 
pcf857x_shutdown(struct i2c_client * client)440 static void pcf857x_shutdown(struct i2c_client *client)
441 {
442 	struct pcf857x *gpio = i2c_get_clientdata(client);
443 
444 	/* Drive all the I/O lines high */
445 	gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1);
446 }
447 
448 static struct i2c_driver pcf857x_driver = {
449 	.driver = {
450 		.name	= "pcf857x",
451 		.of_match_table = of_match_ptr(pcf857x_of_table),
452 	},
453 	.probe	= pcf857x_probe,
454 	.remove	= pcf857x_remove,
455 	.shutdown = pcf857x_shutdown,
456 	.id_table = pcf857x_id,
457 };
458 
pcf857x_init(void)459 static int __init pcf857x_init(void)
460 {
461 	return i2c_add_driver(&pcf857x_driver);
462 }
463 /* register after i2c postcore initcall and before
464  * subsys initcalls that may rely on these GPIOs
465  */
466 subsys_initcall(pcf857x_init);
467 
pcf857x_exit(void)468 static void __exit pcf857x_exit(void)
469 {
470 	i2c_del_driver(&pcf857x_driver);
471 }
472 module_exit(pcf857x_exit);
473 
474 MODULE_LICENSE("GPL");
475 MODULE_AUTHOR("David Brownell");
476