1 /*
2  * STMicroelectronics uvis25 sensor driver
3  *
4  * Copyright 2017 STMicroelectronics Inc.
5  *
6  * Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
7  *
8  * Licensed under the GPL-2.
9  */
10 
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/device.h>
14 #include <linux/iio/sysfs.h>
15 #include <linux/delay.h>
16 #include <linux/pm.h>
17 #include <linux/interrupt.h>
18 #include <linux/irqreturn.h>
19 #include <linux/iio/trigger.h>
20 #include <linux/iio/trigger_consumer.h>
21 #include <linux/iio/triggered_buffer.h>
22 #include <linux/iio/buffer.h>
23 #include <linux/regmap.h>
24 
25 #include "st_uvis25.h"
26 
27 #define ST_UVIS25_REG_WHOAMI_ADDR	0x0f
28 #define ST_UVIS25_REG_WHOAMI_VAL	0xca
29 #define ST_UVIS25_REG_CTRL1_ADDR	0x20
30 #define ST_UVIS25_REG_ODR_MASK		BIT(0)
31 #define ST_UVIS25_REG_BDU_MASK		BIT(1)
32 #define ST_UVIS25_REG_CTRL2_ADDR	0x21
33 #define ST_UVIS25_REG_BOOT_MASK		BIT(7)
34 #define ST_UVIS25_REG_CTRL3_ADDR	0x22
35 #define ST_UVIS25_REG_HL_MASK		BIT(7)
36 #define ST_UVIS25_REG_STATUS_ADDR	0x27
37 #define ST_UVIS25_REG_UV_DA_MASK	BIT(0)
38 #define ST_UVIS25_REG_OUT_ADDR		0x28
39 
40 static const struct iio_chan_spec st_uvis25_channels[] = {
41 	{
42 		.type = IIO_UVINDEX,
43 		.address = ST_UVIS25_REG_OUT_ADDR,
44 		.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
45 		.scan_index = 0,
46 		.scan_type = {
47 			.sign = 'u',
48 			.realbits = 8,
49 			.storagebits = 8,
50 		},
51 	},
52 	IIO_CHAN_SOFT_TIMESTAMP(1),
53 };
54 
st_uvis25_check_whoami(struct st_uvis25_hw * hw)55 static int st_uvis25_check_whoami(struct st_uvis25_hw *hw)
56 {
57 	int err, data;
58 
59 	err = regmap_read(hw->regmap, ST_UVIS25_REG_WHOAMI_ADDR, &data);
60 	if (err < 0) {
61 		dev_err(regmap_get_device(hw->regmap),
62 			"failed to read whoami register\n");
63 		return err;
64 	}
65 
66 	if (data != ST_UVIS25_REG_WHOAMI_VAL) {
67 		dev_err(regmap_get_device(hw->regmap),
68 			"wrong whoami {%02x vs %02x}\n",
69 			data, ST_UVIS25_REG_WHOAMI_VAL);
70 		return -ENODEV;
71 	}
72 
73 	return 0;
74 }
75 
st_uvis25_set_enable(struct st_uvis25_hw * hw,bool enable)76 static int st_uvis25_set_enable(struct st_uvis25_hw *hw, bool enable)
77 {
78 	int err;
79 
80 	err = regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR,
81 				 ST_UVIS25_REG_ODR_MASK, enable);
82 	if (err < 0)
83 		return err;
84 
85 	hw->enabled = enable;
86 
87 	return 0;
88 }
89 
st_uvis25_read_oneshot(struct st_uvis25_hw * hw,u8 addr,int * val)90 static int st_uvis25_read_oneshot(struct st_uvis25_hw *hw, u8 addr, int *val)
91 {
92 	int err;
93 
94 	err = st_uvis25_set_enable(hw, true);
95 	if (err < 0)
96 		return err;
97 
98 	msleep(1500);
99 
100 	/*
101 	 * in order to avoid possible race conditions with interrupt
102 	 * generation, disable the sensor first and then poll output
103 	 * register. That sequence guarantees the interrupt will be reset
104 	 * when irq line is unmasked
105 	 */
106 	err = st_uvis25_set_enable(hw, false);
107 	if (err < 0)
108 		return err;
109 
110 	err = regmap_read(hw->regmap, addr, val);
111 
112 	return err < 0 ? err : IIO_VAL_INT;
113 }
114 
st_uvis25_read_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * ch,int * val,int * val2,long mask)115 static int st_uvis25_read_raw(struct iio_dev *iio_dev,
116 			      struct iio_chan_spec const *ch,
117 			      int *val, int *val2, long mask)
118 {
119 	int ret;
120 
121 	ret = iio_device_claim_direct_mode(iio_dev);
122 	if (ret)
123 		return ret;
124 
125 	switch (mask) {
126 	case IIO_CHAN_INFO_PROCESSED: {
127 		struct st_uvis25_hw *hw = iio_priv(iio_dev);
128 
129 		/*
130 		 * mask irq line during oneshot read since the sensor
131 		 * does not export the capability to disable data-ready line
132 		 * in the register map and it is enabled by default.
133 		 * If the line is unmasked during read_raw() it will be set
134 		 * active and never reset since the trigger is disabled
135 		 */
136 		if (hw->irq > 0)
137 			disable_irq(hw->irq);
138 		ret = st_uvis25_read_oneshot(hw, ch->address, val);
139 		if (hw->irq > 0)
140 			enable_irq(hw->irq);
141 		break;
142 	}
143 	default:
144 		ret = -EINVAL;
145 		break;
146 	}
147 
148 	iio_device_release_direct_mode(iio_dev);
149 
150 	return ret;
151 }
152 
st_uvis25_trigger_handler_thread(int irq,void * private)153 static irqreturn_t st_uvis25_trigger_handler_thread(int irq, void *private)
154 {
155 	struct st_uvis25_hw *hw = private;
156 	int err, status;
157 
158 	err = regmap_read(hw->regmap, ST_UVIS25_REG_STATUS_ADDR, &status);
159 	if (err < 0)
160 		return IRQ_HANDLED;
161 
162 	if (!(status & ST_UVIS25_REG_UV_DA_MASK))
163 		return IRQ_NONE;
164 
165 	iio_trigger_poll_chained(hw->trig);
166 
167 	return IRQ_HANDLED;
168 }
169 
st_uvis25_allocate_trigger(struct iio_dev * iio_dev)170 static int st_uvis25_allocate_trigger(struct iio_dev *iio_dev)
171 {
172 	struct st_uvis25_hw *hw = iio_priv(iio_dev);
173 	struct device *dev = regmap_get_device(hw->regmap);
174 	bool irq_active_low = false;
175 	unsigned long irq_type;
176 	int err;
177 
178 	irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq));
179 
180 	switch (irq_type) {
181 	case IRQF_TRIGGER_HIGH:
182 	case IRQF_TRIGGER_RISING:
183 		break;
184 	case IRQF_TRIGGER_LOW:
185 	case IRQF_TRIGGER_FALLING:
186 		irq_active_low = true;
187 		break;
188 	default:
189 		dev_info(dev, "mode %lx unsupported\n", irq_type);
190 		return -EINVAL;
191 	}
192 
193 	err = regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL3_ADDR,
194 				 ST_UVIS25_REG_HL_MASK, irq_active_low);
195 	if (err < 0)
196 		return err;
197 
198 	err = devm_request_threaded_irq(dev, hw->irq, NULL,
199 					st_uvis25_trigger_handler_thread,
200 					irq_type | IRQF_ONESHOT,
201 					iio_dev->name, hw);
202 	if (err) {
203 		dev_err(dev, "failed to request trigger irq %d\n",
204 			hw->irq);
205 		return err;
206 	}
207 
208 	hw->trig = devm_iio_trigger_alloc(dev, "%s-trigger",
209 					  iio_dev->name);
210 	if (!hw->trig)
211 		return -ENOMEM;
212 
213 	iio_trigger_set_drvdata(hw->trig, iio_dev);
214 	hw->trig->dev.parent = dev;
215 
216 	return devm_iio_trigger_register(dev, hw->trig);
217 }
218 
st_uvis25_buffer_preenable(struct iio_dev * iio_dev)219 static int st_uvis25_buffer_preenable(struct iio_dev *iio_dev)
220 {
221 	return st_uvis25_set_enable(iio_priv(iio_dev), true);
222 }
223 
st_uvis25_buffer_postdisable(struct iio_dev * iio_dev)224 static int st_uvis25_buffer_postdisable(struct iio_dev *iio_dev)
225 {
226 	return st_uvis25_set_enable(iio_priv(iio_dev), false);
227 }
228 
229 static const struct iio_buffer_setup_ops st_uvis25_buffer_ops = {
230 	.preenable = st_uvis25_buffer_preenable,
231 	.postenable = iio_triggered_buffer_postenable,
232 	.predisable = iio_triggered_buffer_predisable,
233 	.postdisable = st_uvis25_buffer_postdisable,
234 };
235 
st_uvis25_buffer_handler_thread(int irq,void * p)236 static irqreturn_t st_uvis25_buffer_handler_thread(int irq, void *p)
237 {
238 	struct iio_poll_func *pf = p;
239 	struct iio_dev *iio_dev = pf->indio_dev;
240 	struct st_uvis25_hw *hw = iio_priv(iio_dev);
241 	unsigned int val;
242 	int err;
243 
244 	err = regmap_read(hw->regmap, ST_UVIS25_REG_OUT_ADDR, &val);
245 	if (err < 0)
246 		goto out;
247 
248 	hw->scan.chan = val;
249 
250 	iio_push_to_buffers_with_timestamp(iio_dev, &hw->scan,
251 					   iio_get_time_ns(iio_dev));
252 
253 out:
254 	iio_trigger_notify_done(hw->trig);
255 
256 	return IRQ_HANDLED;
257 }
258 
st_uvis25_allocate_buffer(struct iio_dev * iio_dev)259 static int st_uvis25_allocate_buffer(struct iio_dev *iio_dev)
260 {
261 	struct st_uvis25_hw *hw = iio_priv(iio_dev);
262 
263 	return devm_iio_triggered_buffer_setup(regmap_get_device(hw->regmap),
264 					       iio_dev, NULL,
265 					       st_uvis25_buffer_handler_thread,
266 					       &st_uvis25_buffer_ops);
267 }
268 
269 static const struct iio_info st_uvis25_info = {
270 	.read_raw = st_uvis25_read_raw,
271 };
272 
st_uvis25_init_sensor(struct st_uvis25_hw * hw)273 static int st_uvis25_init_sensor(struct st_uvis25_hw *hw)
274 {
275 	int err;
276 
277 	err = regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL2_ADDR,
278 				 ST_UVIS25_REG_BOOT_MASK, 1);
279 	if (err < 0)
280 		return err;
281 
282 	msleep(2000);
283 
284 	return regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR,
285 				  ST_UVIS25_REG_BDU_MASK, 1);
286 }
287 
st_uvis25_probe(struct device * dev,int irq,struct regmap * regmap)288 int st_uvis25_probe(struct device *dev, int irq, struct regmap *regmap)
289 {
290 	struct st_uvis25_hw *hw;
291 	struct iio_dev *iio_dev;
292 	int err;
293 
294 	iio_dev = devm_iio_device_alloc(dev, sizeof(*hw));
295 	if (!iio_dev)
296 		return -ENOMEM;
297 
298 	dev_set_drvdata(dev, (void *)iio_dev);
299 
300 	hw = iio_priv(iio_dev);
301 	hw->irq = irq;
302 	hw->regmap = regmap;
303 
304 	err = st_uvis25_check_whoami(hw);
305 	if (err < 0)
306 		return err;
307 
308 	iio_dev->modes = INDIO_DIRECT_MODE;
309 	iio_dev->dev.parent = dev;
310 	iio_dev->channels = st_uvis25_channels;
311 	iio_dev->num_channels = ARRAY_SIZE(st_uvis25_channels);
312 	iio_dev->name = ST_UVIS25_DEV_NAME;
313 	iio_dev->info = &st_uvis25_info;
314 
315 	err = st_uvis25_init_sensor(hw);
316 	if (err < 0)
317 		return err;
318 
319 	if (hw->irq > 0) {
320 		err = st_uvis25_allocate_buffer(iio_dev);
321 		if (err < 0)
322 			return err;
323 
324 		err = st_uvis25_allocate_trigger(iio_dev);
325 		if (err)
326 			return err;
327 	}
328 
329 	return devm_iio_device_register(dev, iio_dev);
330 }
331 EXPORT_SYMBOL(st_uvis25_probe);
332 
st_uvis25_suspend(struct device * dev)333 static int __maybe_unused st_uvis25_suspend(struct device *dev)
334 {
335 	struct iio_dev *iio_dev = dev_get_drvdata(dev);
336 	struct st_uvis25_hw *hw = iio_priv(iio_dev);
337 
338 	return regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR,
339 				  ST_UVIS25_REG_ODR_MASK, 0);
340 }
341 
st_uvis25_resume(struct device * dev)342 static int __maybe_unused st_uvis25_resume(struct device *dev)
343 {
344 	struct iio_dev *iio_dev = dev_get_drvdata(dev);
345 	struct st_uvis25_hw *hw = iio_priv(iio_dev);
346 
347 	if (hw->enabled)
348 		return regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR,
349 					  ST_UVIS25_REG_ODR_MASK, 1);
350 
351 	return 0;
352 }
353 
354 const struct dev_pm_ops st_uvis25_pm_ops = {
355 	SET_SYSTEM_SLEEP_PM_OPS(st_uvis25_suspend, st_uvis25_resume)
356 };
357 EXPORT_SYMBOL(st_uvis25_pm_ops);
358 
359 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");
360 MODULE_DESCRIPTION("STMicroelectronics uvis25 sensor driver");
361 MODULE_LICENSE("GPL v2");
362