1 /*
2  * Driver for 93xx46 EEPROMs
3  *
4  * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/mutex.h>
17 #include <linux/of.h>
18 #include <linux/of_device.h>
19 #include <linux/of_gpio.h>
20 #include <linux/slab.h>
21 #include <linux/spi/spi.h>
22 #include <linux/nvmem-provider.h>
23 #include <linux/eeprom_93xx46.h>
24 
25 #define OP_START	0x4
26 #define OP_WRITE	(OP_START | 0x1)
27 #define OP_READ		(OP_START | 0x2)
28 #define ADDR_EWDS	0x00
29 #define ADDR_ERAL	0x20
30 #define ADDR_EWEN	0x30
31 
32 struct eeprom_93xx46_devtype_data {
33 	unsigned int quirks;
34 };
35 
36 static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
37 	.quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
38 		  EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
39 };
40 
41 static const struct eeprom_93xx46_devtype_data microchip_93lc46b_data = {
42 	.quirks = EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE,
43 };
44 
45 struct eeprom_93xx46_dev {
46 	struct spi_device *spi;
47 	struct eeprom_93xx46_platform_data *pdata;
48 	struct mutex lock;
49 	struct nvmem_config nvmem_config;
50 	struct nvmem_device *nvmem;
51 	int addrlen;
52 	int size;
53 };
54 
has_quirk_single_word_read(struct eeprom_93xx46_dev * edev)55 static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
56 {
57 	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
58 }
59 
has_quirk_instruction_length(struct eeprom_93xx46_dev * edev)60 static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
61 {
62 	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
63 }
64 
has_quirk_extra_read_cycle(struct eeprom_93xx46_dev * edev)65 static inline bool has_quirk_extra_read_cycle(struct eeprom_93xx46_dev *edev)
66 {
67 	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE;
68 }
69 
eeprom_93xx46_read(void * priv,unsigned int off,void * val,size_t count)70 static int eeprom_93xx46_read(void *priv, unsigned int off,
71 			      void *val, size_t count)
72 {
73 	struct eeprom_93xx46_dev *edev = priv;
74 	char *buf = val;
75 	int err = 0;
76 
77 	if (unlikely(off >= edev->size))
78 		return 0;
79 	if ((off + count) > edev->size)
80 		count = edev->size - off;
81 	if (unlikely(!count))
82 		return count;
83 
84 	mutex_lock(&edev->lock);
85 
86 	if (edev->pdata->prepare)
87 		edev->pdata->prepare(edev);
88 
89 	while (count) {
90 		struct spi_message m;
91 		struct spi_transfer t[2] = { { 0 } };
92 		u16 cmd_addr = OP_READ << edev->addrlen;
93 		size_t nbytes = count;
94 		int bits;
95 
96 		if (edev->addrlen == 7) {
97 			cmd_addr |= off & 0x7f;
98 			bits = 10;
99 			if (has_quirk_single_word_read(edev))
100 				nbytes = 1;
101 		} else {
102 			cmd_addr |= (off >> 1) & 0x3f;
103 			bits = 9;
104 			if (has_quirk_single_word_read(edev))
105 				nbytes = 2;
106 		}
107 
108 		dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
109 			cmd_addr, edev->spi->max_speed_hz);
110 
111 		if (has_quirk_extra_read_cycle(edev)) {
112 			cmd_addr <<= 1;
113 			bits += 1;
114 		}
115 
116 		spi_message_init(&m);
117 
118 		t[0].tx_buf = (char *)&cmd_addr;
119 		t[0].len = 2;
120 		t[0].bits_per_word = bits;
121 		spi_message_add_tail(&t[0], &m);
122 
123 		t[1].rx_buf = buf;
124 		t[1].len = count;
125 		t[1].bits_per_word = 8;
126 		spi_message_add_tail(&t[1], &m);
127 
128 		err = spi_sync(edev->spi, &m);
129 		/* have to wait at least Tcsl ns */
130 		ndelay(250);
131 
132 		if (err) {
133 			dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
134 				nbytes, (int)off, err);
135 			break;
136 		}
137 
138 		buf += nbytes;
139 		off += nbytes;
140 		count -= nbytes;
141 	}
142 
143 	if (edev->pdata->finish)
144 		edev->pdata->finish(edev);
145 
146 	mutex_unlock(&edev->lock);
147 
148 	return err;
149 }
150 
eeprom_93xx46_ew(struct eeprom_93xx46_dev * edev,int is_on)151 static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
152 {
153 	struct spi_message m;
154 	struct spi_transfer t;
155 	int bits, ret;
156 	u16 cmd_addr;
157 
158 	cmd_addr = OP_START << edev->addrlen;
159 	if (edev->addrlen == 7) {
160 		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
161 		bits = 10;
162 	} else {
163 		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
164 		bits = 9;
165 	}
166 
167 	if (has_quirk_instruction_length(edev)) {
168 		cmd_addr <<= 2;
169 		bits += 2;
170 	}
171 
172 	dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
173 			is_on ? "en" : "ds", cmd_addr, bits);
174 
175 	spi_message_init(&m);
176 	memset(&t, 0, sizeof(t));
177 
178 	t.tx_buf = &cmd_addr;
179 	t.len = 2;
180 	t.bits_per_word = bits;
181 	spi_message_add_tail(&t, &m);
182 
183 	mutex_lock(&edev->lock);
184 
185 	if (edev->pdata->prepare)
186 		edev->pdata->prepare(edev);
187 
188 	ret = spi_sync(edev->spi, &m);
189 	/* have to wait at least Tcsl ns */
190 	ndelay(250);
191 	if (ret)
192 		dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
193 			is_on ? "en" : "dis", ret);
194 
195 	if (edev->pdata->finish)
196 		edev->pdata->finish(edev);
197 
198 	mutex_unlock(&edev->lock);
199 	return ret;
200 }
201 
202 static ssize_t
eeprom_93xx46_write_word(struct eeprom_93xx46_dev * edev,const char * buf,unsigned off)203 eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
204 			 const char *buf, unsigned off)
205 {
206 	struct spi_message m;
207 	struct spi_transfer t[2];
208 	int bits, data_len, ret;
209 	u16 cmd_addr;
210 
211 	cmd_addr = OP_WRITE << edev->addrlen;
212 
213 	if (edev->addrlen == 7) {
214 		cmd_addr |= off & 0x7f;
215 		bits = 10;
216 		data_len = 1;
217 	} else {
218 		cmd_addr |= (off >> 1) & 0x3f;
219 		bits = 9;
220 		data_len = 2;
221 	}
222 
223 	dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
224 
225 	spi_message_init(&m);
226 	memset(t, 0, sizeof(t));
227 
228 	t[0].tx_buf = (char *)&cmd_addr;
229 	t[0].len = 2;
230 	t[0].bits_per_word = bits;
231 	spi_message_add_tail(&t[0], &m);
232 
233 	t[1].tx_buf = buf;
234 	t[1].len = data_len;
235 	t[1].bits_per_word = 8;
236 	spi_message_add_tail(&t[1], &m);
237 
238 	ret = spi_sync(edev->spi, &m);
239 	/* have to wait program cycle time Twc ms */
240 	mdelay(6);
241 	return ret;
242 }
243 
eeprom_93xx46_write(void * priv,unsigned int off,void * val,size_t count)244 static int eeprom_93xx46_write(void *priv, unsigned int off,
245 				   void *val, size_t count)
246 {
247 	struct eeprom_93xx46_dev *edev = priv;
248 	char *buf = val;
249 	int i, ret, step = 1;
250 
251 	if (unlikely(off >= edev->size))
252 		return -EFBIG;
253 	if ((off + count) > edev->size)
254 		count = edev->size - off;
255 	if (unlikely(!count))
256 		return count;
257 
258 	/* only write even number of bytes on 16-bit devices */
259 	if (edev->addrlen == 6) {
260 		step = 2;
261 		count &= ~1;
262 	}
263 
264 	/* erase/write enable */
265 	ret = eeprom_93xx46_ew(edev, 1);
266 	if (ret)
267 		return ret;
268 
269 	mutex_lock(&edev->lock);
270 
271 	if (edev->pdata->prepare)
272 		edev->pdata->prepare(edev);
273 
274 	for (i = 0; i < count; i += step) {
275 		ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
276 		if (ret) {
277 			dev_err(&edev->spi->dev, "write failed at %d: %d\n",
278 				(int)off + i, ret);
279 			break;
280 		}
281 	}
282 
283 	if (edev->pdata->finish)
284 		edev->pdata->finish(edev);
285 
286 	mutex_unlock(&edev->lock);
287 
288 	/* erase/write disable */
289 	eeprom_93xx46_ew(edev, 0);
290 	return ret;
291 }
292 
eeprom_93xx46_eral(struct eeprom_93xx46_dev * edev)293 static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
294 {
295 	struct eeprom_93xx46_platform_data *pd = edev->pdata;
296 	struct spi_message m;
297 	struct spi_transfer t;
298 	int bits, ret;
299 	u16 cmd_addr;
300 
301 	cmd_addr = OP_START << edev->addrlen;
302 	if (edev->addrlen == 7) {
303 		cmd_addr |= ADDR_ERAL << 1;
304 		bits = 10;
305 	} else {
306 		cmd_addr |= ADDR_ERAL;
307 		bits = 9;
308 	}
309 
310 	if (has_quirk_instruction_length(edev)) {
311 		cmd_addr <<= 2;
312 		bits += 2;
313 	}
314 
315 	dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
316 
317 	spi_message_init(&m);
318 	memset(&t, 0, sizeof(t));
319 
320 	t.tx_buf = &cmd_addr;
321 	t.len = 2;
322 	t.bits_per_word = bits;
323 	spi_message_add_tail(&t, &m);
324 
325 	mutex_lock(&edev->lock);
326 
327 	if (edev->pdata->prepare)
328 		edev->pdata->prepare(edev);
329 
330 	ret = spi_sync(edev->spi, &m);
331 	if (ret)
332 		dev_err(&edev->spi->dev, "erase error %d\n", ret);
333 	/* have to wait erase cycle time Tec ms */
334 	mdelay(6);
335 
336 	if (pd->finish)
337 		pd->finish(edev);
338 
339 	mutex_unlock(&edev->lock);
340 	return ret;
341 }
342 
eeprom_93xx46_store_erase(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)343 static ssize_t eeprom_93xx46_store_erase(struct device *dev,
344 					 struct device_attribute *attr,
345 					 const char *buf, size_t count)
346 {
347 	struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
348 	int erase = 0, ret;
349 
350 	sscanf(buf, "%d", &erase);
351 	if (erase) {
352 		ret = eeprom_93xx46_ew(edev, 1);
353 		if (ret)
354 			return ret;
355 		ret = eeprom_93xx46_eral(edev);
356 		if (ret)
357 			return ret;
358 		ret = eeprom_93xx46_ew(edev, 0);
359 		if (ret)
360 			return ret;
361 	}
362 	return count;
363 }
364 static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
365 
select_assert(void * context)366 static void select_assert(void *context)
367 {
368 	struct eeprom_93xx46_dev *edev = context;
369 
370 	gpiod_set_value_cansleep(edev->pdata->select, 1);
371 }
372 
select_deassert(void * context)373 static void select_deassert(void *context)
374 {
375 	struct eeprom_93xx46_dev *edev = context;
376 
377 	gpiod_set_value_cansleep(edev->pdata->select, 0);
378 }
379 
380 static const struct of_device_id eeprom_93xx46_of_table[] = {
381 	{ .compatible = "eeprom-93xx46", },
382 	{ .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
383 	{ .compatible = "microchip,93lc46b", .data = &microchip_93lc46b_data, },
384 	{}
385 };
386 MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
387 
eeprom_93xx46_probe_dt(struct spi_device * spi)388 static int eeprom_93xx46_probe_dt(struct spi_device *spi)
389 {
390 	const struct of_device_id *of_id =
391 		of_match_device(eeprom_93xx46_of_table, &spi->dev);
392 	struct device_node *np = spi->dev.of_node;
393 	struct eeprom_93xx46_platform_data *pd;
394 	u32 tmp;
395 	int ret;
396 
397 	pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
398 	if (!pd)
399 		return -ENOMEM;
400 
401 	ret = of_property_read_u32(np, "data-size", &tmp);
402 	if (ret < 0) {
403 		dev_err(&spi->dev, "data-size property not found\n");
404 		return ret;
405 	}
406 
407 	if (tmp == 8) {
408 		pd->flags |= EE_ADDR8;
409 	} else if (tmp == 16) {
410 		pd->flags |= EE_ADDR16;
411 	} else {
412 		dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
413 		return -EINVAL;
414 	}
415 
416 	if (of_property_read_bool(np, "read-only"))
417 		pd->flags |= EE_READONLY;
418 
419 	pd->select = devm_gpiod_get_optional(&spi->dev, "select",
420 					     GPIOD_OUT_LOW);
421 	if (IS_ERR(pd->select))
422 		return PTR_ERR(pd->select);
423 
424 	pd->prepare = select_assert;
425 	pd->finish = select_deassert;
426 	gpiod_direction_output(pd->select, 0);
427 
428 	if (of_id->data) {
429 		const struct eeprom_93xx46_devtype_data *data = of_id->data;
430 
431 		pd->quirks = data->quirks;
432 	}
433 
434 	spi->dev.platform_data = pd;
435 
436 	return 0;
437 }
438 
eeprom_93xx46_probe(struct spi_device * spi)439 static int eeprom_93xx46_probe(struct spi_device *spi)
440 {
441 	struct eeprom_93xx46_platform_data *pd;
442 	struct eeprom_93xx46_dev *edev;
443 	int err;
444 
445 	if (spi->dev.of_node) {
446 		err = eeprom_93xx46_probe_dt(spi);
447 		if (err < 0)
448 			return err;
449 	}
450 
451 	pd = spi->dev.platform_data;
452 	if (!pd) {
453 		dev_err(&spi->dev, "missing platform data\n");
454 		return -ENODEV;
455 	}
456 
457 	edev = kzalloc(sizeof(*edev), GFP_KERNEL);
458 	if (!edev)
459 		return -ENOMEM;
460 
461 	if (pd->flags & EE_ADDR8)
462 		edev->addrlen = 7;
463 	else if (pd->flags & EE_ADDR16)
464 		edev->addrlen = 6;
465 	else {
466 		dev_err(&spi->dev, "unspecified address type\n");
467 		err = -EINVAL;
468 		goto fail;
469 	}
470 
471 	mutex_init(&edev->lock);
472 
473 	edev->spi = spi;
474 	edev->pdata = pd;
475 
476 	edev->size = 128;
477 	edev->nvmem_config.name = dev_name(&spi->dev);
478 	edev->nvmem_config.dev = &spi->dev;
479 	edev->nvmem_config.read_only = pd->flags & EE_READONLY;
480 	edev->nvmem_config.root_only = true;
481 	edev->nvmem_config.owner = THIS_MODULE;
482 	edev->nvmem_config.compat = true;
483 	edev->nvmem_config.base_dev = &spi->dev;
484 	edev->nvmem_config.reg_read = eeprom_93xx46_read;
485 	edev->nvmem_config.reg_write = eeprom_93xx46_write;
486 	edev->nvmem_config.priv = edev;
487 	edev->nvmem_config.stride = 4;
488 	edev->nvmem_config.word_size = 1;
489 	edev->nvmem_config.size = edev->size;
490 
491 	edev->nvmem = nvmem_register(&edev->nvmem_config);
492 	if (IS_ERR(edev->nvmem)) {
493 		err = PTR_ERR(edev->nvmem);
494 		goto fail;
495 	}
496 
497 	dev_info(&spi->dev, "%d-bit eeprom %s\n",
498 		(pd->flags & EE_ADDR8) ? 8 : 16,
499 		(pd->flags & EE_READONLY) ? "(readonly)" : "");
500 
501 	if (!(pd->flags & EE_READONLY)) {
502 		if (device_create_file(&spi->dev, &dev_attr_erase))
503 			dev_err(&spi->dev, "can't create erase interface\n");
504 	}
505 
506 	spi_set_drvdata(spi, edev);
507 	return 0;
508 fail:
509 	kfree(edev);
510 	return err;
511 }
512 
eeprom_93xx46_remove(struct spi_device * spi)513 static int eeprom_93xx46_remove(struct spi_device *spi)
514 {
515 	struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
516 
517 	nvmem_unregister(edev->nvmem);
518 
519 	if (!(edev->pdata->flags & EE_READONLY))
520 		device_remove_file(&spi->dev, &dev_attr_erase);
521 
522 	kfree(edev);
523 	return 0;
524 }
525 
526 static struct spi_driver eeprom_93xx46_driver = {
527 	.driver = {
528 		.name	= "93xx46",
529 		.of_match_table = of_match_ptr(eeprom_93xx46_of_table),
530 	},
531 	.probe		= eeprom_93xx46_probe,
532 	.remove		= eeprom_93xx46_remove,
533 };
534 
535 module_spi_driver(eeprom_93xx46_driver);
536 
537 MODULE_LICENSE("GPL");
538 MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
539 MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
540 MODULE_ALIAS("spi:93xx46");
541 MODULE_ALIAS("spi:eeprom-93xx46");
542