1 /*
2 * Interrupt management for most GSC and related devices.
3 *
4 * (c) Copyright 1999 Alex deVries for The Puffin Group
5 * (c) Copyright 1999 Grant Grundler for Hewlett-Packard
6 * (c) Copyright 1999 Matthew Wilcox
7 * (c) Copyright 2000 Helge Deller
8 * (c) Copyright 2001 Matthew Wilcox for Hewlett-Packard
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16 #include <linux/bitops.h>
17 #include <linux/errno.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/types.h>
23
24 #include <asm/hardware.h>
25 #include <asm/io.h>
26
27 #include "gsc.h"
28
29 #undef DEBUG
30
31 #ifdef DEBUG
32 #define DEBPRINTK printk
33 #else
34 #define DEBPRINTK(x,...)
35 #endif
36
gsc_alloc_irq(struct gsc_irq * i)37 int gsc_alloc_irq(struct gsc_irq *i)
38 {
39 int irq = txn_alloc_irq(GSC_EIM_WIDTH);
40 if (irq < 0) {
41 printk("cannot get irq\n");
42 return irq;
43 }
44
45 i->txn_addr = txn_alloc_addr(irq);
46 i->txn_data = txn_alloc_data(irq);
47 i->irq = irq;
48
49 return irq;
50 }
51
gsc_claim_irq(struct gsc_irq * i,int irq)52 int gsc_claim_irq(struct gsc_irq *i, int irq)
53 {
54 int c = irq;
55
56 irq += CPU_IRQ_BASE; /* virtualize the IRQ first */
57
58 irq = txn_claim_irq(irq);
59 if (irq < 0) {
60 printk("cannot claim irq %d\n", c);
61 return irq;
62 }
63
64 i->txn_addr = txn_alloc_addr(irq);
65 i->txn_data = txn_alloc_data(irq);
66 i->irq = irq;
67
68 return irq;
69 }
70
71 EXPORT_SYMBOL(gsc_alloc_irq);
72 EXPORT_SYMBOL(gsc_claim_irq);
73
74 /* Common interrupt demultiplexer used by Asp, Lasi & Wax. */
gsc_asic_intr(int gsc_asic_irq,void * dev)75 irqreturn_t gsc_asic_intr(int gsc_asic_irq, void *dev)
76 {
77 unsigned long irr;
78 struct gsc_asic *gsc_asic = dev;
79
80 irr = gsc_readl(gsc_asic->hpa + OFFSET_IRR);
81 if (irr == 0)
82 return IRQ_NONE;
83
84 DEBPRINTK("%s intr, mask=0x%x\n", gsc_asic->name, irr);
85
86 do {
87 int local_irq = __ffs(irr);
88 unsigned int irq = gsc_asic->global_irq[local_irq];
89 generic_handle_irq(irq);
90 irr &= ~(1 << local_irq);
91 } while (irr);
92
93 return IRQ_HANDLED;
94 }
95
gsc_find_local_irq(unsigned int irq,int * global_irqs,int limit)96 int gsc_find_local_irq(unsigned int irq, int *global_irqs, int limit)
97 {
98 int local_irq;
99
100 for (local_irq = 0; local_irq < limit; local_irq++) {
101 if (global_irqs[local_irq] == irq)
102 return local_irq;
103 }
104
105 return NO_IRQ;
106 }
107
gsc_asic_mask_irq(struct irq_data * d)108 static void gsc_asic_mask_irq(struct irq_data *d)
109 {
110 struct gsc_asic *irq_dev = irq_data_get_irq_chip_data(d);
111 int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32);
112 u32 imr;
113
114 DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq,
115 irq_dev->name, imr);
116
117 /* Disable the IRQ line by clearing the bit in the IMR */
118 imr = gsc_readl(irq_dev->hpa + OFFSET_IMR);
119 imr &= ~(1 << local_irq);
120 gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);
121 }
122
gsc_asic_unmask_irq(struct irq_data * d)123 static void gsc_asic_unmask_irq(struct irq_data *d)
124 {
125 struct gsc_asic *irq_dev = irq_data_get_irq_chip_data(d);
126 int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32);
127 u32 imr;
128
129 DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq,
130 irq_dev->name, imr);
131
132 /* Enable the IRQ line by setting the bit in the IMR */
133 imr = gsc_readl(irq_dev->hpa + OFFSET_IMR);
134 imr |= 1 << local_irq;
135 gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);
136 /*
137 * FIXME: read IPR to make sure the IRQ isn't already pending.
138 * If so, we need to read IRR and manually call do_irq().
139 */
140 }
141
142 #ifdef CONFIG_SMP
gsc_set_affinity_irq(struct irq_data * d,const struct cpumask * dest,bool force)143 static int gsc_set_affinity_irq(struct irq_data *d, const struct cpumask *dest,
144 bool force)
145 {
146 struct gsc_asic *gsc_dev = irq_data_get_irq_chip_data(d);
147 struct cpumask tmask;
148 int cpu_irq;
149
150 if (!cpumask_and(&tmask, dest, cpu_online_mask))
151 return -EINVAL;
152
153 cpu_irq = cpu_check_affinity(d, &tmask);
154 if (cpu_irq < 0)
155 return cpu_irq;
156
157 gsc_dev->gsc_irq.txn_addr = txn_affinity_addr(d->irq, cpu_irq);
158 gsc_dev->eim = ((u32) gsc_dev->gsc_irq.txn_addr) | gsc_dev->gsc_irq.txn_data;
159
160 /* switch IRQ's for devices below LASI/WAX to other CPU */
161 gsc_writel(gsc_dev->eim, gsc_dev->hpa + OFFSET_IAR);
162
163 irq_data_update_effective_affinity(d, &tmask);
164
165 return IRQ_SET_MASK_OK;
166 }
167 #endif
168
169
170 static struct irq_chip gsc_asic_interrupt_type = {
171 .name = "GSC-ASIC",
172 .irq_unmask = gsc_asic_unmask_irq,
173 .irq_mask = gsc_asic_mask_irq,
174 #ifdef CONFIG_SMP
175 .irq_set_affinity = gsc_set_affinity_irq,
176 #endif
177 };
178
gsc_assign_irq(struct irq_chip * type,void * data)179 int gsc_assign_irq(struct irq_chip *type, void *data)
180 {
181 static int irq = GSC_IRQ_BASE;
182
183 if (irq > GSC_IRQ_MAX)
184 return NO_IRQ;
185
186 irq_set_chip_and_handler(irq, type, handle_simple_irq);
187 irq_set_chip_data(irq, data);
188
189 return irq++;
190 }
191
gsc_asic_assign_irq(struct gsc_asic * asic,int local_irq,int * irqp)192 void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp)
193 {
194 int irq = asic->global_irq[local_irq];
195
196 if (irq <= 0) {
197 irq = gsc_assign_irq(&gsc_asic_interrupt_type, asic);
198 if (irq == NO_IRQ)
199 return;
200
201 asic->global_irq[local_irq] = irq;
202 }
203 *irqp = irq;
204 }
205
206 struct gsc_fixup_struct {
207 void (*choose_irq)(struct parisc_device *, void *);
208 void *ctrl;
209 };
210
gsc_fixup_irqs_callback(struct device * dev,void * data)211 static int gsc_fixup_irqs_callback(struct device *dev, void *data)
212 {
213 struct parisc_device *padev = to_parisc_device(dev);
214 struct gsc_fixup_struct *gf = data;
215
216 /* work-around for 715/64 and others which have parent
217 at path [5] and children at path [5/0/x] */
218 if (padev->id.hw_type == HPHW_FAULTY)
219 gsc_fixup_irqs(padev, gf->ctrl, gf->choose_irq);
220 gf->choose_irq(padev, gf->ctrl);
221
222 return 0;
223 }
224
gsc_fixup_irqs(struct parisc_device * parent,void * ctrl,void (* choose_irq)(struct parisc_device *,void *))225 void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl,
226 void (*choose_irq)(struct parisc_device *, void *))
227 {
228 struct gsc_fixup_struct data = {
229 .choose_irq = choose_irq,
230 .ctrl = ctrl,
231 };
232
233 device_for_each_child(&parent->dev, &data, gsc_fixup_irqs_callback);
234 }
235
gsc_common_setup(struct parisc_device * parent,struct gsc_asic * gsc_asic)236 int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic)
237 {
238 struct resource *res;
239 int i;
240
241 gsc_asic->gsc = parent;
242
243 /* Initialise local irq -> global irq mapping */
244 for (i = 0; i < 32; i++) {
245 gsc_asic->global_irq[i] = NO_IRQ;
246 }
247
248 /* allocate resource region */
249 res = request_mem_region(gsc_asic->hpa, 0x100000, gsc_asic->name);
250 if (res) {
251 res->flags = IORESOURCE_MEM; /* do not mark it busy ! */
252 }
253
254 #if 0
255 printk(KERN_WARNING "%s IRQ %d EIM 0x%x", gsc_asic->name,
256 parent->irq, gsc_asic->eim);
257 if (gsc_readl(gsc_asic->hpa + OFFSET_IMR))
258 printk(" IMR is non-zero! (0x%x)",
259 gsc_readl(gsc_asic->hpa + OFFSET_IMR));
260 printk("\n");
261 #endif
262
263 return 0;
264 }
265
266 extern struct parisc_driver lasi_driver;
267 extern struct parisc_driver asp_driver;
268 extern struct parisc_driver wax_driver;
269
gsc_init(void)270 void __init gsc_init(void)
271 {
272 #ifdef CONFIG_GSC_LASI
273 register_parisc_driver(&lasi_driver);
274 register_parisc_driver(&asp_driver);
275 #endif
276 #ifdef CONFIG_GSC_WAX
277 register_parisc_driver(&wax_driver);
278 #endif
279 }
280