1 /* National Semiconductor NS87560UBD Super I/O controller used in
2 * HP [BCJ]x000 workstations.
3 *
4 * This chip is a horrid piece of engineering, and National
5 * denies any knowledge of its existence. Thus no datasheet is
6 * available off www.national.com.
7 *
8 * (C) Copyright 2000 Linuxcare, Inc.
9 * (C) Copyright 2000 Linuxcare Canada, Inc.
10 * (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
11 * (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
12 * (C) Copyright 2001 John Marvin <jsm fc hp com>
13 * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
14 * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
15 * (C) Copyright 2006 Helge Deller <deller@gmx.de>
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * The initial version of this is by Martin Peterson. Alex deVries
23 * has spent a bit of time trying to coax it into working.
24 *
25 * Major changes to get basic interrupt infrastructure working to
26 * hopefully be able to support all SuperIO devices. Currently
27 * works with serial. -- John Marvin <jsm@fc.hp.com>
28 *
29 * Converted superio_init() to be a PCI_FIXUP_FINAL callee.
30 * -- Kyle McMartin <kyle@parisc-linux.org>
31 */
32
33
34 /* NOTES:
35 *
36 * Function 0 is an IDE controller. It is identical to a PC87415 IDE
37 * controller (and identifies itself as such).
38 *
39 * Function 1 is a "Legacy I/O" controller. Under this function is a
40 * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
41 * all the functionality in hardware, but the following is available:
42 *
43 * Two 16550A compatible serial controllers
44 * An IEEE 1284 compatible parallel port
45 * A floppy disk controller
46 *
47 * Function 2 is a USB controller.
48 *
49 * We must be incredibly careful during initialization. Since all
50 * interrupts are routed through function 1 (which is not allowed by
51 * the PCI spec), we need to program the PICs on the legacy I/O port
52 * *before* we attempt to set up IDE and USB. @#$!&
53 *
54 * According to HP, devices are only enabled by firmware if they have
55 * a physical device connected.
56 *
57 * Configuration register bits:
58 * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
59 * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
60 *
61 */
62
63 #include <linux/errno.h>
64 #include <linux/init.h>
65 #include <linux/module.h>
66 #include <linux/types.h>
67 #include <linux/interrupt.h>
68 #include <linux/ioport.h>
69 #include <linux/serial.h>
70 #include <linux/pci.h>
71 #include <linux/parport.h>
72 #include <linux/parport_pc.h>
73 #include <linux/termios.h>
74 #include <linux/tty.h>
75 #include <linux/serial_core.h>
76 #include <linux/serial_8250.h>
77 #include <linux/delay.h>
78
79 #include <asm/io.h>
80 #include <asm/hardware.h>
81 #include <asm/superio.h>
82
83 static struct superio_device sio_dev;
84
85
86 #undef DEBUG_SUPERIO_INIT
87
88 #ifdef DEBUG_SUPERIO_INIT
89 #define DBG_INIT(x...) printk(x)
90 #else
91 #define DBG_INIT(x...)
92 #endif
93
94 #define SUPERIO "SuperIO"
95 #define PFX SUPERIO ": "
96
97 static irqreturn_t
superio_interrupt(int parent_irq,void * devp)98 superio_interrupt(int parent_irq, void *devp)
99 {
100 u8 results;
101 u8 local_irq;
102
103 /* Poll the 8259 to see if there's an interrupt. */
104 outb (OCW3_POLL,IC_PIC1+0);
105
106 results = inb(IC_PIC1+0);
107
108 /*
109 * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
110 * Bits 6-3: zero
111 * Bits 2-0: highest priority, active requesting interrupt ID (0-7)
112 */
113 if ((results & 0x80) == 0) {
114 /* I suspect "spurious" interrupts are from unmasking an IRQ.
115 * We don't know if an interrupt was/is pending and thus
116 * just call the handler for that IRQ as if it were pending.
117 */
118 return IRQ_NONE;
119 }
120
121 /* Check to see which device is interrupting */
122 local_irq = results & 0x0f;
123
124 if (local_irq == 2 || local_irq > 7) {
125 printk(KERN_ERR PFX "slave interrupted!\n");
126 return IRQ_HANDLED;
127 }
128
129 if (local_irq == 7) {
130
131 /* Could be spurious. Check in service bits */
132
133 outb(OCW3_ISR,IC_PIC1+0);
134 results = inb(IC_PIC1+0);
135 if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
136 printk(KERN_WARNING PFX "spurious interrupt!\n");
137 return IRQ_HANDLED;
138 }
139 }
140
141 /* Call the appropriate device's interrupt */
142 generic_handle_irq(local_irq);
143
144 /* set EOI - forces a new interrupt if a lower priority device
145 * still needs service.
146 */
147 outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
148 return IRQ_HANDLED;
149 }
150
151 /* Initialize Super I/O device */
152 static void
superio_init(struct pci_dev * pcidev)153 superio_init(struct pci_dev *pcidev)
154 {
155 struct superio_device *sio = &sio_dev;
156 struct pci_dev *pdev = sio->lio_pdev;
157 u16 word;
158 int ret;
159
160 if (sio->suckyio_irq_enabled)
161 return;
162
163 BUG_ON(!pdev);
164 BUG_ON(!sio->usb_pdev);
165
166 /* use the IRQ iosapic found for USB INT D... */
167 pdev->irq = sio->usb_pdev->irq;
168
169 /* ...then properly fixup the USB to point at suckyio PIC */
170 sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
171
172 printk(KERN_INFO PFX "Found NS87560 Legacy I/O device at %s (IRQ %i)\n",
173 pci_name(pdev), pdev->irq);
174
175 pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
176 sio->sp1_base &= ~1;
177 printk(KERN_INFO PFX "Serial port 1 at 0x%x\n", sio->sp1_base);
178
179 pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
180 sio->sp2_base &= ~1;
181 printk(KERN_INFO PFX "Serial port 2 at 0x%x\n", sio->sp2_base);
182
183 pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
184 sio->pp_base &= ~1;
185 printk(KERN_INFO PFX "Parallel port at 0x%x\n", sio->pp_base);
186
187 pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
188 sio->fdc_base &= ~1;
189 printk(KERN_INFO PFX "Floppy controller at 0x%x\n", sio->fdc_base);
190 pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
191 sio->acpi_base &= ~1;
192 printk(KERN_INFO PFX "ACPI at 0x%x\n", sio->acpi_base);
193
194 request_region (IC_PIC1, 0x1f, "pic1");
195 request_region (IC_PIC2, 0x1f, "pic2");
196 request_region (sio->acpi_base, 0x1f, "acpi");
197
198 /* Enable the legacy I/O function */
199 pci_read_config_word (pdev, PCI_COMMAND, &word);
200 word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
201 pci_write_config_word (pdev, PCI_COMMAND, word);
202
203 pci_set_master (pdev);
204 ret = pci_enable_device(pdev);
205 BUG_ON(ret < 0); /* not too much we can do about this... */
206
207 /*
208 * Next project is programming the onboard interrupt controllers.
209 * PDC hasn't done this for us, since it's using polled I/O.
210 *
211 * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
212 * space access. PCI is by nature a 32-bit bus and config
213 * space can be sensitive to that.
214 */
215
216 /* 0x64 - 0x67 :
217 DMA Rtg 2
218 DMA Rtg 3
219 DMA Chan Ctl
220 TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
221 */
222 pci_write_config_dword (pdev, 0x64, 0x82000000U);
223
224 /* 0x68 - 0x6b :
225 TRIGGER_2 == 0x00 all edge triggered (not used)
226 CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
227 CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
228 CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
229 */
230 pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U);
231
232 /* 0x6c - 0x6f :
233 CFG_IR_INTAB == 0x00
234 CFG_IR_INTCD == 0x10 USB = IRQ1
235 CFG_IR_PS2 == 0x00
236 CFG_IR_FXBUS == 0x00
237 */
238 pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
239
240 /* 0x70 - 0x73 :
241 CFG_IR_USB == 0x00 not used. USB is connected to INTD.
242 CFG_IR_ACPI == 0x00 not used.
243 DMA Priority == 0x4c88 Power on default value. NFC.
244 */
245 pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
246
247 /* PIC1 Initialization Command Word register programming */
248 outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */
249 outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */
250 outb (0x04,IC_PIC1+1); /* ICW3: Cascade */
251 outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */
252
253 /* PIC1 Program Operational Control Words */
254 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
255 outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */
256
257 /* PIC2 Initialization Command Word register programming */
258 outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */
259 outb (0x00,IC_PIC2+1); /* ICW2: N/A */
260 outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */
261 outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */
262
263 /* Program Operational Control Words */
264 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
265 outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select | ESMM | SMM */
266
267 /* Write master mask reg */
268 outb (0xff,IC_PIC1+1);
269
270 /* Setup USB power regulation */
271 outb(1, sio->acpi_base + USB_REG_CR);
272 if (inb(sio->acpi_base + USB_REG_CR) & 1)
273 printk(KERN_INFO PFX "USB regulator enabled\n");
274 else
275 printk(KERN_ERR PFX "USB regulator not initialized!\n");
276
277 if (request_irq(pdev->irq, superio_interrupt, 0,
278 SUPERIO, (void *)sio)) {
279
280 printk(KERN_ERR PFX "could not get irq\n");
281 BUG();
282 return;
283 }
284
285 sio->suckyio_irq_enabled = 1;
286 }
287 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
288
superio_mask_irq(struct irq_data * d)289 static void superio_mask_irq(struct irq_data *d)
290 {
291 unsigned int irq = d->irq;
292 u8 r8;
293
294 if ((irq < 1) || (irq == 2) || (irq > 7)) {
295 printk(KERN_ERR PFX "Illegal irq number.\n");
296 BUG();
297 return;
298 }
299
300 /* Mask interrupt */
301
302 r8 = inb(IC_PIC1+1);
303 r8 |= (1 << irq);
304 outb (r8,IC_PIC1+1);
305 }
306
superio_unmask_irq(struct irq_data * d)307 static void superio_unmask_irq(struct irq_data *d)
308 {
309 unsigned int irq = d->irq;
310 u8 r8;
311
312 if ((irq < 1) || (irq == 2) || (irq > 7)) {
313 printk(KERN_ERR PFX "Illegal irq number (%d).\n", irq);
314 BUG();
315 return;
316 }
317
318 /* Unmask interrupt */
319 r8 = inb(IC_PIC1+1);
320 r8 &= ~(1 << irq);
321 outb (r8,IC_PIC1+1);
322 }
323
324 static struct irq_chip superio_interrupt_type = {
325 .name = SUPERIO,
326 .irq_unmask = superio_unmask_irq,
327 .irq_mask = superio_mask_irq,
328 };
329
330 #ifdef DEBUG_SUPERIO_INIT
331 static unsigned short expected_device[3] = {
332 PCI_DEVICE_ID_NS_87415,
333 PCI_DEVICE_ID_NS_87560_LIO,
334 PCI_DEVICE_ID_NS_87560_USB
335 };
336 #endif
337
superio_fixup_irq(struct pci_dev * pcidev)338 int superio_fixup_irq(struct pci_dev *pcidev)
339 {
340 int local_irq, i;
341
342 #ifdef DEBUG_SUPERIO_INIT
343 int fn;
344 fn = PCI_FUNC(pcidev->devfn);
345
346 /* Verify the function number matches the expected device id. */
347 if (expected_device[fn] != pcidev->device) {
348 BUG();
349 return -1;
350 }
351 printk(KERN_DEBUG "superio_fixup_irq(%s) ven 0x%x dev 0x%x from %ps\n",
352 pci_name(pcidev),
353 pcidev->vendor, pcidev->device,
354 __builtin_return_address(0));
355 #endif
356
357 for (i = 0; i < 16; i++) {
358 irq_set_chip_and_handler(i, &superio_interrupt_type,
359 handle_simple_irq);
360 }
361
362 /*
363 * We don't allocate a SuperIO irq for the legacy IO function,
364 * since it is a "bridge". Instead, we will allocate irq's for
365 * each legacy device as they are initialized.
366 */
367
368 switch(pcidev->device) {
369 case PCI_DEVICE_ID_NS_87415: /* Function 0 */
370 local_irq = IDE_IRQ;
371 break;
372 case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */
373 sio_dev.lio_pdev = pcidev; /* save for superio_init() */
374 return -1;
375 case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */
376 sio_dev.usb_pdev = pcidev; /* save for superio_init() */
377 local_irq = USB_IRQ;
378 break;
379 default:
380 local_irq = -1;
381 BUG();
382 break;
383 }
384
385 return local_irq;
386 }
387
superio_serial_init(void)388 static void __init superio_serial_init(void)
389 {
390 #ifdef CONFIG_SERIAL_8250
391 int retval;
392 struct uart_port serial_port;
393
394 memset(&serial_port, 0, sizeof(serial_port));
395 serial_port.iotype = UPIO_PORT;
396 serial_port.type = PORT_16550A;
397 serial_port.uartclk = 115200*16;
398 serial_port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE |
399 UPF_BOOT_AUTOCONF;
400
401 /* serial port #1 */
402 serial_port.iobase = sio_dev.sp1_base;
403 serial_port.irq = SP1_IRQ;
404 serial_port.line = 0;
405 retval = early_serial_setup(&serial_port);
406 if (retval < 0) {
407 printk(KERN_WARNING PFX "Register Serial #0 failed.\n");
408 return;
409 }
410
411 /* serial port #2 */
412 serial_port.iobase = sio_dev.sp2_base;
413 serial_port.irq = SP2_IRQ;
414 serial_port.line = 1;
415 retval = early_serial_setup(&serial_port);
416 if (retval < 0)
417 printk(KERN_WARNING PFX "Register Serial #1 failed.\n");
418 #endif /* CONFIG_SERIAL_8250 */
419 }
420
421
superio_parport_init(void)422 static void __init superio_parport_init(void)
423 {
424 #ifdef CONFIG_PARPORT_PC
425 if (!parport_pc_probe_port(sio_dev.pp_base,
426 0 /*base_hi*/,
427 PAR_IRQ,
428 PARPORT_DMA_NONE /* dma */,
429 NULL /*struct pci_dev* */,
430 0 /* shared irq flags */))
431
432 printk(KERN_WARNING PFX "Probing parallel port failed.\n");
433 #endif /* CONFIG_PARPORT_PC */
434 }
435
436
superio_fixup_pci(struct pci_dev * pdev)437 static void superio_fixup_pci(struct pci_dev *pdev)
438 {
439 u8 prog;
440
441 pdev->class |= 0x5;
442 pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
443
444 pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
445 printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
446 }
447 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
448
449
450 static int __init
superio_probe(struct pci_dev * dev,const struct pci_device_id * id)451 superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
452 {
453 struct superio_device *sio = &sio_dev;
454
455 /*
456 ** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
457 ** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
458 ** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
459 */
460 DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
461 pci_name(dev),
462 dev->vendor, dev->device,
463 dev->subsystem_vendor, dev->subsystem_device,
464 dev->class);
465
466 BUG_ON(!sio->suckyio_irq_enabled); /* Enabled by PCI_FIXUP_FINAL */
467
468 if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */
469 superio_parport_init();
470 superio_serial_init();
471 /* REVISIT XXX : superio_fdc_init() ? */
472 return 0;
473 } else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */
474 DBG_INIT("superio_probe: ignoring IDE 87415\n");
475 } else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
476 DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
477 } else {
478 DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
479 }
480
481 /* Let appropriate other driver claim this device. */
482 return -ENODEV;
483 }
484
485 static const struct pci_device_id superio_tbl[] __initconst = {
486 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
487 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
488 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
489 { 0, }
490 };
491
492 static struct pci_driver superio_driver __refdata = {
493 .name = SUPERIO,
494 .id_table = superio_tbl,
495 .probe = superio_probe,
496 };
497
498 module_pci_driver(superio_driver);
499