1 /*
2  * PTP 1588 clock using the IXP46X
3  *
4  * Copyright (C) 2010 OMICRON electronics GmbH
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License
17  *  along with this program; if not, write to the Free Software
18  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19  */
20 #include <linux/device.h>
21 #include <linux/err.h>
22 #include <linux/gpio.h>
23 #include <linux/init.h>
24 #include <linux/interrupt.h>
25 #include <linux/io.h>
26 #include <linux/irq.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 
30 #include <linux/ptp_clock_kernel.h>
31 #include <mach/ixp46x_ts.h>
32 
33 #define DRIVER		"ptp_ixp46x"
34 #define N_EXT_TS	2
35 #define MASTER_GPIO	8
36 #define MASTER_IRQ	25
37 #define SLAVE_GPIO	7
38 #define SLAVE_IRQ	24
39 
40 struct ixp_clock {
41 	struct ixp46x_ts_regs *regs;
42 	struct ptp_clock *ptp_clock;
43 	struct ptp_clock_info caps;
44 	int exts0_enabled;
45 	int exts1_enabled;
46 };
47 
48 DEFINE_SPINLOCK(register_lock);
49 
50 /*
51  * Register access functions
52  */
53 
ixp_systime_read(struct ixp46x_ts_regs * regs)54 static u64 ixp_systime_read(struct ixp46x_ts_regs *regs)
55 {
56 	u64 ns;
57 	u32 lo, hi;
58 
59 	lo = __raw_readl(&regs->systime_lo);
60 	hi = __raw_readl(&regs->systime_hi);
61 
62 	ns = ((u64) hi) << 32;
63 	ns |= lo;
64 	ns <<= TICKS_NS_SHIFT;
65 
66 	return ns;
67 }
68 
ixp_systime_write(struct ixp46x_ts_regs * regs,u64 ns)69 static void ixp_systime_write(struct ixp46x_ts_regs *regs, u64 ns)
70 {
71 	u32 hi, lo;
72 
73 	ns >>= TICKS_NS_SHIFT;
74 	hi = ns >> 32;
75 	lo = ns & 0xffffffff;
76 
77 	__raw_writel(lo, &regs->systime_lo);
78 	__raw_writel(hi, &regs->systime_hi);
79 }
80 
81 /*
82  * Interrupt service routine
83  */
84 
isr(int irq,void * priv)85 static irqreturn_t isr(int irq, void *priv)
86 {
87 	struct ixp_clock *ixp_clock = priv;
88 	struct ixp46x_ts_regs *regs = ixp_clock->regs;
89 	struct ptp_clock_event event;
90 	u32 ack = 0, lo, hi, val;
91 
92 	val = __raw_readl(&regs->event);
93 
94 	if (val & TSER_SNS) {
95 		ack |= TSER_SNS;
96 		if (ixp_clock->exts0_enabled) {
97 			hi = __raw_readl(&regs->asms_hi);
98 			lo = __raw_readl(&regs->asms_lo);
99 			event.type = PTP_CLOCK_EXTTS;
100 			event.index = 0;
101 			event.timestamp = ((u64) hi) << 32;
102 			event.timestamp |= lo;
103 			event.timestamp <<= TICKS_NS_SHIFT;
104 			ptp_clock_event(ixp_clock->ptp_clock, &event);
105 		}
106 	}
107 
108 	if (val & TSER_SNM) {
109 		ack |= TSER_SNM;
110 		if (ixp_clock->exts1_enabled) {
111 			hi = __raw_readl(&regs->amms_hi);
112 			lo = __raw_readl(&regs->amms_lo);
113 			event.type = PTP_CLOCK_EXTTS;
114 			event.index = 1;
115 			event.timestamp = ((u64) hi) << 32;
116 			event.timestamp |= lo;
117 			event.timestamp <<= TICKS_NS_SHIFT;
118 			ptp_clock_event(ixp_clock->ptp_clock, &event);
119 		}
120 	}
121 
122 	if (val & TTIPEND)
123 		ack |= TTIPEND; /* this bit seems to be always set */
124 
125 	if (ack) {
126 		__raw_writel(ack, &regs->event);
127 		return IRQ_HANDLED;
128 	} else
129 		return IRQ_NONE;
130 }
131 
132 /*
133  * PTP clock operations
134  */
135 
ptp_ixp_adjfreq(struct ptp_clock_info * ptp,s32 ppb)136 static int ptp_ixp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
137 {
138 	u64 adj;
139 	u32 diff, addend;
140 	int neg_adj = 0;
141 	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
142 	struct ixp46x_ts_regs *regs = ixp_clock->regs;
143 
144 	if (ppb < 0) {
145 		neg_adj = 1;
146 		ppb = -ppb;
147 	}
148 	addend = DEFAULT_ADDEND;
149 	adj = addend;
150 	adj *= ppb;
151 	diff = div_u64(adj, 1000000000ULL);
152 
153 	addend = neg_adj ? addend - diff : addend + diff;
154 
155 	__raw_writel(addend, &regs->addend);
156 
157 	return 0;
158 }
159 
ptp_ixp_adjtime(struct ptp_clock_info * ptp,s64 delta)160 static int ptp_ixp_adjtime(struct ptp_clock_info *ptp, s64 delta)
161 {
162 	s64 now;
163 	unsigned long flags;
164 	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
165 	struct ixp46x_ts_regs *regs = ixp_clock->regs;
166 
167 	spin_lock_irqsave(&register_lock, flags);
168 
169 	now = ixp_systime_read(regs);
170 	now += delta;
171 	ixp_systime_write(regs, now);
172 
173 	spin_unlock_irqrestore(&register_lock, flags);
174 
175 	return 0;
176 }
177 
ptp_ixp_gettime(struct ptp_clock_info * ptp,struct timespec64 * ts)178 static int ptp_ixp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
179 {
180 	u64 ns;
181 	unsigned long flags;
182 	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
183 	struct ixp46x_ts_regs *regs = ixp_clock->regs;
184 
185 	spin_lock_irqsave(&register_lock, flags);
186 
187 	ns = ixp_systime_read(regs);
188 
189 	spin_unlock_irqrestore(&register_lock, flags);
190 
191 	*ts = ns_to_timespec64(ns);
192 	return 0;
193 }
194 
ptp_ixp_settime(struct ptp_clock_info * ptp,const struct timespec64 * ts)195 static int ptp_ixp_settime(struct ptp_clock_info *ptp,
196 			   const struct timespec64 *ts)
197 {
198 	u64 ns;
199 	unsigned long flags;
200 	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
201 	struct ixp46x_ts_regs *regs = ixp_clock->regs;
202 
203 	ns = timespec64_to_ns(ts);
204 
205 	spin_lock_irqsave(&register_lock, flags);
206 
207 	ixp_systime_write(regs, ns);
208 
209 	spin_unlock_irqrestore(&register_lock, flags);
210 
211 	return 0;
212 }
213 
ptp_ixp_enable(struct ptp_clock_info * ptp,struct ptp_clock_request * rq,int on)214 static int ptp_ixp_enable(struct ptp_clock_info *ptp,
215 			  struct ptp_clock_request *rq, int on)
216 {
217 	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
218 
219 	switch (rq->type) {
220 	case PTP_CLK_REQ_EXTTS:
221 		switch (rq->extts.index) {
222 		case 0:
223 			ixp_clock->exts0_enabled = on ? 1 : 0;
224 			break;
225 		case 1:
226 			ixp_clock->exts1_enabled = on ? 1 : 0;
227 			break;
228 		default:
229 			return -EINVAL;
230 		}
231 		return 0;
232 	default:
233 		break;
234 	}
235 
236 	return -EOPNOTSUPP;
237 }
238 
239 static const struct ptp_clock_info ptp_ixp_caps = {
240 	.owner		= THIS_MODULE,
241 	.name		= "IXP46X timer",
242 	.max_adj	= 66666655,
243 	.n_ext_ts	= N_EXT_TS,
244 	.n_pins		= 0,
245 	.pps		= 0,
246 	.adjfreq	= ptp_ixp_adjfreq,
247 	.adjtime	= ptp_ixp_adjtime,
248 	.gettime64	= ptp_ixp_gettime,
249 	.settime64	= ptp_ixp_settime,
250 	.enable		= ptp_ixp_enable,
251 };
252 
253 /* module operations */
254 
255 static struct ixp_clock ixp_clock;
256 
setup_interrupt(int gpio)257 static int setup_interrupt(int gpio)
258 {
259 	int irq;
260 	int err;
261 
262 	err = gpio_request(gpio, "ixp4-ptp");
263 	if (err)
264 		return err;
265 
266 	err = gpio_direction_input(gpio);
267 	if (err)
268 		return err;
269 
270 	irq = gpio_to_irq(gpio);
271 	if (irq < 0)
272 		return irq;
273 
274 	err = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
275 	if (err) {
276 		pr_err("cannot set trigger type for irq %d\n", irq);
277 		return err;
278 	}
279 
280 	err = request_irq(irq, isr, 0, DRIVER, &ixp_clock);
281 	if (err) {
282 		pr_err("request_irq failed for irq %d\n", irq);
283 		return err;
284 	}
285 
286 	return irq;
287 }
288 
ptp_ixp_exit(void)289 static void __exit ptp_ixp_exit(void)
290 {
291 	free_irq(MASTER_IRQ, &ixp_clock);
292 	free_irq(SLAVE_IRQ, &ixp_clock);
293 	ixp46x_phc_index = -1;
294 	ptp_clock_unregister(ixp_clock.ptp_clock);
295 }
296 
ptp_ixp_init(void)297 static int __init ptp_ixp_init(void)
298 {
299 	if (!cpu_is_ixp46x())
300 		return -ENODEV;
301 
302 	ixp_clock.regs =
303 		(struct ixp46x_ts_regs __iomem *) IXP4XX_TIMESYNC_BASE_VIRT;
304 
305 	ixp_clock.caps = ptp_ixp_caps;
306 
307 	ixp_clock.ptp_clock = ptp_clock_register(&ixp_clock.caps, NULL);
308 
309 	if (IS_ERR(ixp_clock.ptp_clock))
310 		return PTR_ERR(ixp_clock.ptp_clock);
311 
312 	ixp46x_phc_index = ptp_clock_index(ixp_clock.ptp_clock);
313 
314 	__raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend);
315 	__raw_writel(1, &ixp_clock.regs->trgt_lo);
316 	__raw_writel(0, &ixp_clock.regs->trgt_hi);
317 	__raw_writel(TTIPEND, &ixp_clock.regs->event);
318 
319 	if (MASTER_IRQ != setup_interrupt(MASTER_GPIO)) {
320 		pr_err("failed to setup gpio %d as irq\n", MASTER_GPIO);
321 		goto no_master;
322 	}
323 	if (SLAVE_IRQ != setup_interrupt(SLAVE_GPIO)) {
324 		pr_err("failed to setup gpio %d as irq\n", SLAVE_GPIO);
325 		goto no_slave;
326 	}
327 
328 	return 0;
329 no_slave:
330 	free_irq(MASTER_IRQ, &ixp_clock);
331 no_master:
332 	ptp_clock_unregister(ixp_clock.ptp_clock);
333 	return -ENODEV;
334 }
335 
336 module_init(ptp_ixp_init);
337 module_exit(ptp_ixp_exit);
338 
339 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
340 MODULE_DESCRIPTION("PTP clock using the IXP46X timer");
341 MODULE_LICENSE("GPL");
342