1 /*
2 * Copyright (C) 2016 Broadcom
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/err.h>
17 #include <linux/io.h>
18 #include <linux/math64.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/platform_device.h>
22 #include <linux/pwm.h>
23
24 #define IPROC_PWM_CTRL_OFFSET 0x00
25 #define IPROC_PWM_CTRL_TYPE_SHIFT(ch) (15 + (ch))
26 #define IPROC_PWM_CTRL_POLARITY_SHIFT(ch) (8 + (ch))
27 #define IPROC_PWM_CTRL_EN_SHIFT(ch) (ch)
28
29 #define IPROC_PWM_PERIOD_OFFSET(ch) (0x04 + ((ch) << 3))
30 #define IPROC_PWM_PERIOD_MIN 0x02
31 #define IPROC_PWM_PERIOD_MAX 0xffff
32
33 #define IPROC_PWM_DUTY_CYCLE_OFFSET(ch) (0x08 + ((ch) << 3))
34 #define IPROC_PWM_DUTY_CYCLE_MIN 0x00
35 #define IPROC_PWM_DUTY_CYCLE_MAX 0xffff
36
37 #define IPROC_PWM_PRESCALE_OFFSET 0x24
38 #define IPROC_PWM_PRESCALE_BITS 0x06
39 #define IPROC_PWM_PRESCALE_SHIFT(ch) ((3 - (ch)) * \
40 IPROC_PWM_PRESCALE_BITS)
41 #define IPROC_PWM_PRESCALE_MASK(ch) (IPROC_PWM_PRESCALE_MAX << \
42 IPROC_PWM_PRESCALE_SHIFT(ch))
43 #define IPROC_PWM_PRESCALE_MIN 0x00
44 #define IPROC_PWM_PRESCALE_MAX 0x3f
45
46 struct iproc_pwmc {
47 struct pwm_chip chip;
48 void __iomem *base;
49 struct clk *clk;
50 };
51
to_iproc_pwmc(struct pwm_chip * chip)52 static inline struct iproc_pwmc *to_iproc_pwmc(struct pwm_chip *chip)
53 {
54 return container_of(chip, struct iproc_pwmc, chip);
55 }
56
iproc_pwmc_enable(struct iproc_pwmc * ip,unsigned int channel)57 static void iproc_pwmc_enable(struct iproc_pwmc *ip, unsigned int channel)
58 {
59 u32 value;
60
61 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
62 value |= 1 << IPROC_PWM_CTRL_EN_SHIFT(channel);
63 writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
64
65 /* must be a 400 ns delay between clearing and setting enable bit */
66 ndelay(400);
67 }
68
iproc_pwmc_disable(struct iproc_pwmc * ip,unsigned int channel)69 static void iproc_pwmc_disable(struct iproc_pwmc *ip, unsigned int channel)
70 {
71 u32 value;
72
73 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
74 value &= ~(1 << IPROC_PWM_CTRL_EN_SHIFT(channel));
75 writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
76
77 /* must be a 400 ns delay between clearing and setting enable bit */
78 ndelay(400);
79 }
80
iproc_pwmc_get_state(struct pwm_chip * chip,struct pwm_device * pwm,struct pwm_state * state)81 static void iproc_pwmc_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
82 struct pwm_state *state)
83 {
84 struct iproc_pwmc *ip = to_iproc_pwmc(chip);
85 u64 tmp, multi, rate;
86 u32 value, prescale;
87
88 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
89
90 if (value & BIT(IPROC_PWM_CTRL_EN_SHIFT(pwm->hwpwm)))
91 state->enabled = true;
92 else
93 state->enabled = false;
94
95 if (value & BIT(IPROC_PWM_CTRL_POLARITY_SHIFT(pwm->hwpwm)))
96 state->polarity = PWM_POLARITY_NORMAL;
97 else
98 state->polarity = PWM_POLARITY_INVERSED;
99
100 rate = clk_get_rate(ip->clk);
101 if (rate == 0) {
102 state->period = 0;
103 state->duty_cycle = 0;
104 return;
105 }
106
107 value = readl(ip->base + IPROC_PWM_PRESCALE_OFFSET);
108 prescale = value >> IPROC_PWM_PRESCALE_SHIFT(pwm->hwpwm);
109 prescale &= IPROC_PWM_PRESCALE_MAX;
110
111 multi = NSEC_PER_SEC * (prescale + 1);
112
113 value = readl(ip->base + IPROC_PWM_PERIOD_OFFSET(pwm->hwpwm));
114 tmp = (value & IPROC_PWM_PERIOD_MAX) * multi;
115 state->period = div64_u64(tmp, rate);
116
117 value = readl(ip->base + IPROC_PWM_DUTY_CYCLE_OFFSET(pwm->hwpwm));
118 tmp = (value & IPROC_PWM_PERIOD_MAX) * multi;
119 state->duty_cycle = div64_u64(tmp, rate);
120 }
121
iproc_pwmc_apply(struct pwm_chip * chip,struct pwm_device * pwm,struct pwm_state * state)122 static int iproc_pwmc_apply(struct pwm_chip *chip, struct pwm_device *pwm,
123 struct pwm_state *state)
124 {
125 unsigned long prescale = IPROC_PWM_PRESCALE_MIN;
126 struct iproc_pwmc *ip = to_iproc_pwmc(chip);
127 u32 value, period, duty;
128 u64 rate;
129
130 rate = clk_get_rate(ip->clk);
131
132 /*
133 * Find period count, duty count and prescale to suit duty_cycle and
134 * period. This is done according to formulas described below:
135 *
136 * period_ns = 10^9 * (PRESCALE + 1) * PC / PWM_CLK_RATE
137 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
138 *
139 * PC = (PWM_CLK_RATE * period_ns) / (10^9 * (PRESCALE + 1))
140 * DC = (PWM_CLK_RATE * duty_ns) / (10^9 * (PRESCALE + 1))
141 */
142 while (1) {
143 u64 value, div;
144
145 div = NSEC_PER_SEC * (prescale + 1);
146 value = rate * state->period;
147 period = div64_u64(value, div);
148 value = rate * state->duty_cycle;
149 duty = div64_u64(value, div);
150
151 if (period < IPROC_PWM_PERIOD_MIN ||
152 duty < IPROC_PWM_DUTY_CYCLE_MIN)
153 return -EINVAL;
154
155 if (period <= IPROC_PWM_PERIOD_MAX &&
156 duty <= IPROC_PWM_DUTY_CYCLE_MAX)
157 break;
158
159 /* Otherwise, increase prescale and recalculate counts */
160 if (++prescale > IPROC_PWM_PRESCALE_MAX)
161 return -EINVAL;
162 }
163
164 iproc_pwmc_disable(ip, pwm->hwpwm);
165
166 /* Set prescale */
167 value = readl(ip->base + IPROC_PWM_PRESCALE_OFFSET);
168 value &= ~IPROC_PWM_PRESCALE_MASK(pwm->hwpwm);
169 value |= prescale << IPROC_PWM_PRESCALE_SHIFT(pwm->hwpwm);
170 writel(value, ip->base + IPROC_PWM_PRESCALE_OFFSET);
171
172 /* set period and duty cycle */
173 writel(period, ip->base + IPROC_PWM_PERIOD_OFFSET(pwm->hwpwm));
174 writel(duty, ip->base + IPROC_PWM_DUTY_CYCLE_OFFSET(pwm->hwpwm));
175
176 /* set polarity */
177 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
178
179 if (state->polarity == PWM_POLARITY_NORMAL)
180 value |= 1 << IPROC_PWM_CTRL_POLARITY_SHIFT(pwm->hwpwm);
181 else
182 value &= ~(1 << IPROC_PWM_CTRL_POLARITY_SHIFT(pwm->hwpwm));
183
184 writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
185
186 if (state->enabled)
187 iproc_pwmc_enable(ip, pwm->hwpwm);
188
189 return 0;
190 }
191
192 static const struct pwm_ops iproc_pwm_ops = {
193 .apply = iproc_pwmc_apply,
194 .get_state = iproc_pwmc_get_state,
195 .owner = THIS_MODULE,
196 };
197
iproc_pwmc_probe(struct platform_device * pdev)198 static int iproc_pwmc_probe(struct platform_device *pdev)
199 {
200 struct iproc_pwmc *ip;
201 struct resource *res;
202 unsigned int i;
203 u32 value;
204 int ret;
205
206 ip = devm_kzalloc(&pdev->dev, sizeof(*ip), GFP_KERNEL);
207 if (!ip)
208 return -ENOMEM;
209
210 platform_set_drvdata(pdev, ip);
211
212 ip->chip.dev = &pdev->dev;
213 ip->chip.ops = &iproc_pwm_ops;
214 ip->chip.base = -1;
215 ip->chip.npwm = 4;
216 ip->chip.of_xlate = of_pwm_xlate_with_flags;
217 ip->chip.of_pwm_n_cells = 3;
218
219 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
220 ip->base = devm_ioremap_resource(&pdev->dev, res);
221 if (IS_ERR(ip->base))
222 return PTR_ERR(ip->base);
223
224 ip->clk = devm_clk_get(&pdev->dev, NULL);
225 if (IS_ERR(ip->clk)) {
226 dev_err(&pdev->dev, "failed to get clock: %ld\n",
227 PTR_ERR(ip->clk));
228 return PTR_ERR(ip->clk);
229 }
230
231 ret = clk_prepare_enable(ip->clk);
232 if (ret < 0) {
233 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
234 return ret;
235 }
236
237 /* Set full drive and normal polarity for all channels */
238 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
239
240 for (i = 0; i < ip->chip.npwm; i++) {
241 value &= ~(1 << IPROC_PWM_CTRL_TYPE_SHIFT(i));
242 value |= 1 << IPROC_PWM_CTRL_POLARITY_SHIFT(i);
243 }
244
245 writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
246
247 ret = pwmchip_add(&ip->chip);
248 if (ret < 0) {
249 dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret);
250 clk_disable_unprepare(ip->clk);
251 }
252
253 return ret;
254 }
255
iproc_pwmc_remove(struct platform_device * pdev)256 static int iproc_pwmc_remove(struct platform_device *pdev)
257 {
258 struct iproc_pwmc *ip = platform_get_drvdata(pdev);
259
260 clk_disable_unprepare(ip->clk);
261
262 return pwmchip_remove(&ip->chip);
263 }
264
265 static const struct of_device_id bcm_iproc_pwmc_dt[] = {
266 { .compatible = "brcm,iproc-pwm" },
267 { },
268 };
269 MODULE_DEVICE_TABLE(of, bcm_iproc_pwmc_dt);
270
271 static struct platform_driver iproc_pwmc_driver = {
272 .driver = {
273 .name = "bcm-iproc-pwm",
274 .of_match_table = bcm_iproc_pwmc_dt,
275 },
276 .probe = iproc_pwmc_probe,
277 .remove = iproc_pwmc_remove,
278 };
279 module_platform_driver(iproc_pwmc_driver);
280
281 MODULE_AUTHOR("Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>");
282 MODULE_DESCRIPTION("Broadcom iProc PWM driver");
283 MODULE_LICENSE("GPL v2");
284