1 /*
2  * PWM device driver for ST SoCs
3  *
4  * Copyright (C) 2013-2016 STMicroelectronics (R&D) Limited
5  *
6  * Author: Ajit Pal Singh <ajitpal.singh@st.com>
7  *         Lee Jones <lee.jones@linaro.org>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  */
14 
15 #include <linux/clk.h>
16 #include <linux/interrupt.h>
17 #include <linux/math64.h>
18 #include <linux/mfd/syscon.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/platform_device.h>
22 #include <linux/pwm.h>
23 #include <linux/regmap.h>
24 #include <linux/sched.h>
25 #include <linux/slab.h>
26 #include <linux/time.h>
27 #include <linux/wait.h>
28 
29 #define PWM_OUT_VAL(x)	(0x00 + (4 * (x))) /* Device's Duty Cycle register */
30 #define PWM_CPT_VAL(x)	(0x10 + (4 * (x))) /* Capture value */
31 #define PWM_CPT_EDGE(x) (0x30 + (4 * (x))) /* Edge to capture on */
32 
33 #define STI_PWM_CTRL		0x50	/* Control/Config register */
34 #define STI_INT_EN		0x54	/* Interrupt Enable/Disable register */
35 #define STI_INT_STA		0x58	/* Interrupt Status register */
36 #define PWM_INT_ACK		0x5c
37 #define PWM_PRESCALE_LOW_MASK	0x0f
38 #define PWM_PRESCALE_HIGH_MASK	0xf0
39 #define PWM_CPT_EDGE_MASK	0x03
40 #define PWM_INT_ACK_MASK	0x1ff
41 
42 #define STI_MAX_CPT_DEVS	4
43 #define CPT_DC_MAX		0xff
44 
45 /* Regfield IDs */
46 enum {
47 	/* Bits in PWM_CTRL*/
48 	PWMCLK_PRESCALE_LOW,
49 	PWMCLK_PRESCALE_HIGH,
50 	CPTCLK_PRESCALE,
51 
52 	PWM_OUT_EN,
53 	PWM_CPT_EN,
54 
55 	PWM_CPT_INT_EN,
56 	PWM_CPT_INT_STAT,
57 
58 	/* Keep last */
59 	MAX_REGFIELDS
60 };
61 
62 /*
63  * Each capture input can be programmed to detect rising-edge, falling-edge,
64  * either edge or neither egde.
65  */
66 enum sti_cpt_edge {
67 	CPT_EDGE_DISABLED,
68 	CPT_EDGE_RISING,
69 	CPT_EDGE_FALLING,
70 	CPT_EDGE_BOTH,
71 };
72 
73 struct sti_cpt_ddata {
74 	u32 snapshot[3];
75 	unsigned int index;
76 	struct mutex lock;
77 	wait_queue_head_t wait;
78 };
79 
80 struct sti_pwm_compat_data {
81 	const struct reg_field *reg_fields;
82 	unsigned int pwm_num_devs;
83 	unsigned int cpt_num_devs;
84 	unsigned int max_pwm_cnt;
85 	unsigned int max_prescale;
86 };
87 
88 struct sti_pwm_chip {
89 	struct device *dev;
90 	struct clk *pwm_clk;
91 	struct clk *cpt_clk;
92 	struct regmap *regmap;
93 	struct sti_pwm_compat_data *cdata;
94 	struct regmap_field *prescale_low;
95 	struct regmap_field *prescale_high;
96 	struct regmap_field *pwm_out_en;
97 	struct regmap_field *pwm_cpt_en;
98 	struct regmap_field *pwm_cpt_int_en;
99 	struct regmap_field *pwm_cpt_int_stat;
100 	struct pwm_chip chip;
101 	struct pwm_device *cur;
102 	unsigned long configured;
103 	unsigned int en_count;
104 	struct mutex sti_pwm_lock; /* To sync between enable/disable calls */
105 	void __iomem *mmio;
106 };
107 
108 static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = {
109 	[PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWM_CTRL, 0, 3),
110 	[PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWM_CTRL, 11, 14),
111 	[CPTCLK_PRESCALE] = REG_FIELD(STI_PWM_CTRL, 4, 8),
112 	[PWM_OUT_EN] = REG_FIELD(STI_PWM_CTRL, 9, 9),
113 	[PWM_CPT_EN] = REG_FIELD(STI_PWM_CTRL, 10, 10),
114 	[PWM_CPT_INT_EN] = REG_FIELD(STI_INT_EN, 1, 4),
115 	[PWM_CPT_INT_STAT] = REG_FIELD(STI_INT_STA, 1, 4),
116 };
117 
to_sti_pwmchip(struct pwm_chip * chip)118 static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip)
119 {
120 	return container_of(chip, struct sti_pwm_chip, chip);
121 }
122 
123 /*
124  * Calculate the prescaler value corresponding to the period.
125  */
sti_pwm_get_prescale(struct sti_pwm_chip * pc,unsigned long period,unsigned int * prescale)126 static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
127 				unsigned int *prescale)
128 {
129 	struct sti_pwm_compat_data *cdata = pc->cdata;
130 	unsigned long clk_rate;
131 	unsigned long value;
132 	unsigned int ps;
133 
134 	clk_rate = clk_get_rate(pc->pwm_clk);
135 	if (!clk_rate) {
136 		dev_err(pc->dev, "failed to get clock rate\n");
137 		return -EINVAL;
138 	}
139 
140 	/*
141 	 * prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_cnt + 1)) - 1
142 	 */
143 	value = NSEC_PER_SEC / clk_rate;
144 	value *= cdata->max_pwm_cnt + 1;
145 
146 	if (period % value)
147 		return -EINVAL;
148 
149 	ps  = period / value - 1;
150 	if (ps > cdata->max_prescale)
151 		return -EINVAL;
152 
153 	*prescale = ps;
154 
155 	return 0;
156 }
157 
158 /*
159  * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles. The
160  * only way to change the period (apart from changing the PWM input clock) is
161  * to change the PWM clock prescaler.
162  *
163  * The prescaler is of 8 bits, so 256 prescaler values and hence 256 possible
164  * period values are supported (for a particular clock rate). The requested
165  * period will be applied only if it matches one of these 256 values.
166  */
sti_pwm_config(struct pwm_chip * chip,struct pwm_device * pwm,int duty_ns,int period_ns)167 static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
168 			  int duty_ns, int period_ns)
169 {
170 	struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
171 	struct sti_pwm_compat_data *cdata = pc->cdata;
172 	unsigned int ncfg, value, prescale = 0;
173 	struct pwm_device *cur = pc->cur;
174 	struct device *dev = pc->dev;
175 	bool period_same = false;
176 	int ret;
177 
178 	ncfg = hweight_long(pc->configured);
179 	if (ncfg)
180 		period_same = (period_ns == pwm_get_period(cur));
181 
182 	/*
183 	 * Allow configuration changes if one of the following conditions
184 	 * satisfy.
185 	 * 1. No devices have been configured.
186 	 * 2. Only one device has been configured and the new request is for
187 	 *    the same device.
188 	 * 3. Only one device has been configured and the new request is for
189 	 *    a new device and period of the new device is same as the current
190 	 *    configured period.
191 	 * 4. More than one devices are configured and period of the new
192 	 *    requestis the same as the current period.
193 	 */
194 	if (!ncfg ||
195 	    ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) ||
196 	    ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) ||
197 	    ((ncfg > 1) && period_same)) {
198 		/* Enable clock before writing to PWM registers. */
199 		ret = clk_enable(pc->pwm_clk);
200 		if (ret)
201 			return ret;
202 
203 		ret = clk_enable(pc->cpt_clk);
204 		if (ret)
205 			return ret;
206 
207 		if (!period_same) {
208 			ret = sti_pwm_get_prescale(pc, period_ns, &prescale);
209 			if (ret)
210 				goto clk_dis;
211 
212 			value = prescale & PWM_PRESCALE_LOW_MASK;
213 
214 			ret = regmap_field_write(pc->prescale_low, value);
215 			if (ret)
216 				goto clk_dis;
217 
218 			value = (prescale & PWM_PRESCALE_HIGH_MASK) >> 4;
219 
220 			ret = regmap_field_write(pc->prescale_high, value);
221 			if (ret)
222 				goto clk_dis;
223 		}
224 
225 		/*
226 		 * When PWMVal == 0, PWM pulse = 1 local clock cycle.
227 		 * When PWMVal == max_pwm_count,
228 		 * PWM pulse = (max_pwm_count + 1) local cycles,
229 		 * that is continuous pulse: signal never goes low.
230 		 */
231 		value = cdata->max_pwm_cnt * duty_ns / period_ns;
232 
233 		ret = regmap_write(pc->regmap, PWM_OUT_VAL(pwm->hwpwm), value);
234 		if (ret)
235 			goto clk_dis;
236 
237 		ret = regmap_field_write(pc->pwm_cpt_int_en, 0);
238 
239 		set_bit(pwm->hwpwm, &pc->configured);
240 		pc->cur = pwm;
241 
242 		dev_dbg(dev, "prescale:%u, period:%i, duty:%i, value:%u\n",
243 			prescale, period_ns, duty_ns, value);
244 	} else {
245 		return -EINVAL;
246 	}
247 
248 clk_dis:
249 	clk_disable(pc->pwm_clk);
250 	clk_disable(pc->cpt_clk);
251 	return ret;
252 }
253 
sti_pwm_enable(struct pwm_chip * chip,struct pwm_device * pwm)254 static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
255 {
256 	struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
257 	struct device *dev = pc->dev;
258 	int ret = 0;
259 
260 	/*
261 	 * Since we have a common enable for all PWM devices, do not enable if
262 	 * already enabled.
263 	 */
264 	mutex_lock(&pc->sti_pwm_lock);
265 
266 	if (!pc->en_count) {
267 		ret = clk_enable(pc->pwm_clk);
268 		if (ret)
269 			goto out;
270 
271 		ret = clk_enable(pc->cpt_clk);
272 		if (ret)
273 			goto out;
274 
275 		ret = regmap_field_write(pc->pwm_out_en, 1);
276 		if (ret) {
277 			dev_err(dev, "failed to enable PWM device %u: %d\n",
278 				pwm->hwpwm, ret);
279 			goto out;
280 		}
281 	}
282 
283 	pc->en_count++;
284 
285 out:
286 	mutex_unlock(&pc->sti_pwm_lock);
287 	return ret;
288 }
289 
sti_pwm_disable(struct pwm_chip * chip,struct pwm_device * pwm)290 static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
291 {
292 	struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
293 
294 	mutex_lock(&pc->sti_pwm_lock);
295 
296 	if (--pc->en_count) {
297 		mutex_unlock(&pc->sti_pwm_lock);
298 		return;
299 	}
300 
301 	regmap_field_write(pc->pwm_out_en, 0);
302 
303 	clk_disable(pc->pwm_clk);
304 	clk_disable(pc->cpt_clk);
305 
306 	mutex_unlock(&pc->sti_pwm_lock);
307 }
308 
sti_pwm_free(struct pwm_chip * chip,struct pwm_device * pwm)309 static void sti_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
310 {
311 	struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
312 
313 	clear_bit(pwm->hwpwm, &pc->configured);
314 }
315 
sti_pwm_capture(struct pwm_chip * chip,struct pwm_device * pwm,struct pwm_capture * result,unsigned long timeout)316 static int sti_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
317 			   struct pwm_capture *result, unsigned long timeout)
318 {
319 	struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
320 	struct sti_pwm_compat_data *cdata = pc->cdata;
321 	struct sti_cpt_ddata *ddata = pwm_get_chip_data(pwm);
322 	struct device *dev = pc->dev;
323 	unsigned int effective_ticks;
324 	unsigned long long high, low;
325 	int ret;
326 
327 	if (pwm->hwpwm >= cdata->cpt_num_devs) {
328 		dev_err(dev, "device %u is not valid\n", pwm->hwpwm);
329 		return -EINVAL;
330 	}
331 
332 	mutex_lock(&ddata->lock);
333 	ddata->index = 0;
334 
335 	/* Prepare capture measurement */
336 	regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_RISING);
337 	regmap_field_write(pc->pwm_cpt_int_en, BIT(pwm->hwpwm));
338 
339 	/* Enable capture */
340 	ret = regmap_field_write(pc->pwm_cpt_en, 1);
341 	if (ret) {
342 		dev_err(dev, "failed to enable PWM capture %u: %d\n",
343 			pwm->hwpwm, ret);
344 		goto out;
345 	}
346 
347 	ret = wait_event_interruptible_timeout(ddata->wait, ddata->index > 1,
348 					       msecs_to_jiffies(timeout));
349 
350 	regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_DISABLED);
351 
352 	if (ret == -ERESTARTSYS)
353 		goto out;
354 
355 	switch (ddata->index) {
356 	case 0:
357 	case 1:
358 		/*
359 		 * Getting here could mean:
360 		 *  - input signal is constant of less than 1 Hz
361 		 *  - there is no input signal at all
362 		 *
363 		 * In such case the frequency is rounded down to 0
364 		 */
365 		result->period = 0;
366 		result->duty_cycle = 0;
367 
368 		break;
369 
370 	case 2:
371 		/* We have everying we need */
372 		high = ddata->snapshot[1] - ddata->snapshot[0];
373 		low = ddata->snapshot[2] - ddata->snapshot[1];
374 
375 		effective_ticks = clk_get_rate(pc->cpt_clk);
376 
377 		result->period = (high + low) * NSEC_PER_SEC;
378 		result->period /= effective_ticks;
379 
380 		result->duty_cycle = high * NSEC_PER_SEC;
381 		result->duty_cycle /= effective_ticks;
382 
383 		break;
384 
385 	default:
386 		dev_err(dev, "internal error\n");
387 		break;
388 	}
389 
390 out:
391 	/* Disable capture */
392 	regmap_field_write(pc->pwm_cpt_en, 0);
393 
394 	mutex_unlock(&ddata->lock);
395 	return ret;
396 }
397 
398 static const struct pwm_ops sti_pwm_ops = {
399 	.capture = sti_pwm_capture,
400 	.config = sti_pwm_config,
401 	.enable = sti_pwm_enable,
402 	.disable = sti_pwm_disable,
403 	.free = sti_pwm_free,
404 	.owner = THIS_MODULE,
405 };
406 
sti_pwm_interrupt(int irq,void * data)407 static irqreturn_t sti_pwm_interrupt(int irq, void *data)
408 {
409 	struct sti_pwm_chip *pc = data;
410 	struct device *dev = pc->dev;
411 	struct sti_cpt_ddata *ddata;
412 	int devicenum;
413 	unsigned int cpt_int_stat;
414 	unsigned int reg;
415 	int ret = IRQ_NONE;
416 
417 	ret = regmap_field_read(pc->pwm_cpt_int_stat, &cpt_int_stat);
418 	if (ret)
419 		return ret;
420 
421 	while (cpt_int_stat) {
422 		devicenum = ffs(cpt_int_stat) - 1;
423 
424 		ddata = pwm_get_chip_data(&pc->chip.pwms[devicenum]);
425 
426 		/*
427 		 * Capture input:
428 		 *    _______                   _______
429 		 *   |       |                 |       |
430 		 * __|       |_________________|       |________
431 		 *   ^0      ^1                ^2
432 		 *
433 		 * Capture start by the first available rising edge. When a
434 		 * capture event occurs, capture value (CPT_VALx) is stored,
435 		 * index incremented, capture edge changed.
436 		 *
437 		 * After the capture, if the index > 1, we have collected the
438 		 * necessary data so we signal the thread waiting for it and
439 		 * disable the capture by setting capture edge to none
440 		 */
441 
442 		regmap_read(pc->regmap,
443 			    PWM_CPT_VAL(devicenum),
444 			    &ddata->snapshot[ddata->index]);
445 
446 		switch (ddata->index) {
447 		case 0:
448 		case 1:
449 			regmap_read(pc->regmap, PWM_CPT_EDGE(devicenum), &reg);
450 			reg ^= PWM_CPT_EDGE_MASK;
451 			regmap_write(pc->regmap, PWM_CPT_EDGE(devicenum), reg);
452 
453 			ddata->index++;
454 			break;
455 
456 		case 2:
457 			regmap_write(pc->regmap,
458 				     PWM_CPT_EDGE(devicenum),
459 				     CPT_EDGE_DISABLED);
460 			wake_up(&ddata->wait);
461 			break;
462 
463 		default:
464 			dev_err(dev, "Internal error\n");
465 		}
466 
467 		cpt_int_stat &= ~BIT_MASK(devicenum);
468 
469 		ret = IRQ_HANDLED;
470 	}
471 
472 	/* Just ACK everything */
473 	regmap_write(pc->regmap, PWM_INT_ACK, PWM_INT_ACK_MASK);
474 
475 	return ret;
476 }
477 
sti_pwm_probe_dt(struct sti_pwm_chip * pc)478 static int sti_pwm_probe_dt(struct sti_pwm_chip *pc)
479 {
480 	struct device *dev = pc->dev;
481 	const struct reg_field *reg_fields;
482 	struct device_node *np = dev->of_node;
483 	struct sti_pwm_compat_data *cdata = pc->cdata;
484 	u32 num_devs;
485 	int ret;
486 
487 	ret = of_property_read_u32(np, "st,pwm-num-chan", &num_devs);
488 	if (!ret)
489 		cdata->pwm_num_devs = num_devs;
490 
491 	ret = of_property_read_u32(np, "st,capture-num-chan", &num_devs);
492 	if (!ret)
493 		cdata->cpt_num_devs = num_devs;
494 
495 	if (!cdata->pwm_num_devs && !cdata->cpt_num_devs) {
496 		dev_err(dev, "No channels configured\n");
497 		return -EINVAL;
498 	}
499 
500 	reg_fields = cdata->reg_fields;
501 
502 	pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap,
503 					reg_fields[PWMCLK_PRESCALE_LOW]);
504 	if (IS_ERR(pc->prescale_low))
505 		return PTR_ERR(pc->prescale_low);
506 
507 	pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap,
508 					reg_fields[PWMCLK_PRESCALE_HIGH]);
509 	if (IS_ERR(pc->prescale_high))
510 		return PTR_ERR(pc->prescale_high);
511 
512 
513 	pc->pwm_out_en = devm_regmap_field_alloc(dev, pc->regmap,
514 						 reg_fields[PWM_OUT_EN]);
515 	if (IS_ERR(pc->pwm_out_en))
516 		return PTR_ERR(pc->pwm_out_en);
517 
518 	pc->pwm_cpt_en = devm_regmap_field_alloc(dev, pc->regmap,
519 						 reg_fields[PWM_CPT_EN]);
520 	if (IS_ERR(pc->pwm_cpt_en))
521 		return PTR_ERR(pc->pwm_cpt_en);
522 
523 	pc->pwm_cpt_int_en = devm_regmap_field_alloc(dev, pc->regmap,
524 						reg_fields[PWM_CPT_INT_EN]);
525 	if (IS_ERR(pc->pwm_cpt_int_en))
526 		return PTR_ERR(pc->pwm_cpt_int_en);
527 
528 	pc->pwm_cpt_int_stat = devm_regmap_field_alloc(dev, pc->regmap,
529 						reg_fields[PWM_CPT_INT_STAT]);
530 	if (PTR_ERR_OR_ZERO(pc->pwm_cpt_int_stat))
531 		return PTR_ERR(pc->pwm_cpt_int_stat);
532 
533 	return 0;
534 }
535 
536 static const struct regmap_config sti_pwm_regmap_config = {
537 	.reg_bits = 32,
538 	.val_bits = 32,
539 	.reg_stride = 4,
540 };
541 
sti_pwm_probe(struct platform_device * pdev)542 static int sti_pwm_probe(struct platform_device *pdev)
543 {
544 	struct device *dev = &pdev->dev;
545 	struct sti_pwm_compat_data *cdata;
546 	struct sti_pwm_chip *pc;
547 	struct resource *res;
548 	unsigned int i;
549 	int irq, ret;
550 
551 	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
552 	if (!pc)
553 		return -ENOMEM;
554 
555 	cdata = devm_kzalloc(dev, sizeof(*cdata), GFP_KERNEL);
556 	if (!cdata)
557 		return -ENOMEM;
558 
559 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
560 
561 	pc->mmio = devm_ioremap_resource(dev, res);
562 	if (IS_ERR(pc->mmio))
563 		return PTR_ERR(pc->mmio);
564 
565 	pc->regmap = devm_regmap_init_mmio(dev, pc->mmio,
566 					   &sti_pwm_regmap_config);
567 	if (IS_ERR(pc->regmap))
568 		return PTR_ERR(pc->regmap);
569 
570 	irq = platform_get_irq(pdev, 0);
571 	if (irq < 0) {
572 		dev_err(&pdev->dev, "Failed to obtain IRQ\n");
573 		return irq;
574 	}
575 
576 	ret = devm_request_irq(&pdev->dev, irq, sti_pwm_interrupt, 0,
577 			       pdev->name, pc);
578 	if (ret < 0) {
579 		dev_err(&pdev->dev, "Failed to request IRQ\n");
580 		return ret;
581 	}
582 
583 	/*
584 	 * Setup PWM data with default values: some values could be replaced
585 	 * with specific ones provided from Device Tree.
586 	 */
587 	cdata->reg_fields = sti_pwm_regfields;
588 	cdata->max_prescale = 0xff;
589 	cdata->max_pwm_cnt = 255;
590 	cdata->pwm_num_devs = 0;
591 	cdata->cpt_num_devs = 0;
592 
593 	pc->cdata = cdata;
594 	pc->dev = dev;
595 	pc->en_count = 0;
596 	mutex_init(&pc->sti_pwm_lock);
597 
598 	ret = sti_pwm_probe_dt(pc);
599 	if (ret)
600 		return ret;
601 
602 	if (!cdata->pwm_num_devs)
603 		goto skip_pwm;
604 
605 	pc->pwm_clk = of_clk_get_by_name(dev->of_node, "pwm");
606 	if (IS_ERR(pc->pwm_clk)) {
607 		dev_err(dev, "failed to get PWM clock\n");
608 		return PTR_ERR(pc->pwm_clk);
609 	}
610 
611 	ret = clk_prepare(pc->pwm_clk);
612 	if (ret) {
613 		dev_err(dev, "failed to prepare clock\n");
614 		return ret;
615 	}
616 
617 skip_pwm:
618 	if (!cdata->cpt_num_devs)
619 		goto skip_cpt;
620 
621 	pc->cpt_clk = of_clk_get_by_name(dev->of_node, "capture");
622 	if (IS_ERR(pc->cpt_clk)) {
623 		dev_err(dev, "failed to get PWM capture clock\n");
624 		return PTR_ERR(pc->cpt_clk);
625 	}
626 
627 	ret = clk_prepare(pc->cpt_clk);
628 	if (ret) {
629 		dev_err(dev, "failed to prepare clock\n");
630 		return ret;
631 	}
632 
633 skip_cpt:
634 	pc->chip.dev = dev;
635 	pc->chip.ops = &sti_pwm_ops;
636 	pc->chip.base = -1;
637 	pc->chip.npwm = pc->cdata->pwm_num_devs;
638 
639 	ret = pwmchip_add(&pc->chip);
640 	if (ret < 0) {
641 		clk_unprepare(pc->pwm_clk);
642 		clk_unprepare(pc->cpt_clk);
643 		return ret;
644 	}
645 
646 	for (i = 0; i < cdata->cpt_num_devs; i++) {
647 		struct sti_cpt_ddata *ddata;
648 
649 		ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
650 		if (!ddata)
651 			return -ENOMEM;
652 
653 		init_waitqueue_head(&ddata->wait);
654 		mutex_init(&ddata->lock);
655 
656 		pwm_set_chip_data(&pc->chip.pwms[i], ddata);
657 	}
658 
659 	platform_set_drvdata(pdev, pc);
660 
661 	return 0;
662 }
663 
sti_pwm_remove(struct platform_device * pdev)664 static int sti_pwm_remove(struct platform_device *pdev)
665 {
666 	struct sti_pwm_chip *pc = platform_get_drvdata(pdev);
667 	unsigned int i;
668 
669 	for (i = 0; i < pc->cdata->pwm_num_devs; i++)
670 		pwm_disable(&pc->chip.pwms[i]);
671 
672 	clk_unprepare(pc->pwm_clk);
673 	clk_unprepare(pc->cpt_clk);
674 
675 	return pwmchip_remove(&pc->chip);
676 }
677 
678 static const struct of_device_id sti_pwm_of_match[] = {
679 	{ .compatible = "st,sti-pwm", },
680 	{ /* sentinel */ }
681 };
682 MODULE_DEVICE_TABLE(of, sti_pwm_of_match);
683 
684 static struct platform_driver sti_pwm_driver = {
685 	.driver = {
686 		.name = "sti-pwm",
687 		.of_match_table = sti_pwm_of_match,
688 	},
689 	.probe = sti_pwm_probe,
690 	.remove = sti_pwm_remove,
691 };
692 module_platform_driver(sti_pwm_driver);
693 
694 MODULE_AUTHOR("Ajit Pal Singh <ajitpal.singh@st.com>");
695 MODULE_DESCRIPTION("STMicroelectronics ST PWM driver");
696 MODULE_LICENSE("GPL");
697