1 /*
2  * Copyright (c) 2015 MediaTek Inc.
3  * Author: Henry Chen <henryc.chen@mediatek.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14 
15 #ifndef __MT6311_REGULATOR_H__
16 #define __MT6311_REGULATOR_H__
17 
18 #define MT6311_SWCID              0x01
19 
20 #define MT6311_TOP_INT_CON        0x18
21 #define MT6311_TOP_INT_MON        0x19
22 
23 #define MT6311_VDVFS11_CON0       0x87
24 #define MT6311_VDVFS11_CON7       0x88
25 #define MT6311_VDVFS11_CON8       0x89
26 #define MT6311_VDVFS11_CON9       0x8A
27 #define MT6311_VDVFS11_CON10      0x8B
28 #define MT6311_VDVFS11_CON11      0x8C
29 #define MT6311_VDVFS11_CON12      0x8D
30 #define MT6311_VDVFS11_CON13      0x8E
31 #define MT6311_VDVFS11_CON14      0x8F
32 #define MT6311_VDVFS11_CON15      0x90
33 #define MT6311_VDVFS11_CON16      0x91
34 #define MT6311_VDVFS11_CON17      0x92
35 #define MT6311_VDVFS11_CON18      0x93
36 #define MT6311_VDVFS11_CON19      0x94
37 
38 #define MT6311_LDO_CON0           0xCC
39 #define MT6311_LDO_OCFB0          0xCD
40 #define MT6311_LDO_CON2           0xCE
41 #define MT6311_LDO_CON3           0xCF
42 #define MT6311_LDO_CON4           0xD0
43 #define MT6311_FQMTR_CON0         0xD1
44 #define MT6311_FQMTR_CON1         0xD2
45 #define MT6311_FQMTR_CON2         0xD3
46 #define MT6311_FQMTR_CON3         0xD4
47 #define MT6311_FQMTR_CON4         0xD5
48 
49 #define MT6311_PMIC_RG_INT_POL_MASK                      0x1
50 #define MT6311_PMIC_RG_INT_EN_MASK                       0x2
51 #define MT6311_PMIC_RG_BUCK_OC_INT_STATUS_MASK           0x10
52 
53 #define MT6311_PMIC_VDVFS11_EN_CTRL_MASK                 0x1
54 #define MT6311_PMIC_VDVFS11_VOSEL_CTRL_MASK              0x2
55 #define MT6311_PMIC_VDVFS11_EN_SEL_MASK                  0x3
56 #define MT6311_PMIC_VDVFS11_VOSEL_SEL_MASK               0xc
57 #define MT6311_PMIC_VDVFS11_EN_MASK                      0x1
58 #define MT6311_PMIC_VDVFS11_VOSEL_MASK                   0x7F
59 #define MT6311_PMIC_VDVFS11_VOSEL_ON_MASK                0x7F
60 #define MT6311_PMIC_VDVFS11_VOSEL_SLEEP_MASK             0x7F
61 #define MT6311_PMIC_NI_VDVFS11_VOSEL_MASK                0x7F
62 
63 #define MT6311_PMIC_RG_VBIASN_EN_MASK                    0x1
64 
65 #endif
66