1 /*
2  *  Extend a 32-bit counter to 63 bits
3  *
4  *  Author:	Nicolas Pitre
5  *  Created:	December 3, 2006
6  *  Copyright:	MontaVista Software, Inc.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2
10  * as published by the Free Software Foundation.
11  */
12 
13 #ifndef __LINUX_CNT32_TO_63_H__
14 #define __LINUX_CNT32_TO_63_H__
15 
16 #include <linux/compiler.h>
17 #include <linux/types.h>
18 #include <asm/byteorder.h>
19 
20 /* this is used only to give gcc a clue about good code generation */
21 union cnt32_to_63 {
22 	struct {
23 #if defined(__LITTLE_ENDIAN)
24 		u32 lo, hi;
25 #elif defined(__BIG_ENDIAN)
26 		u32 hi, lo;
27 #endif
28 	};
29 	u64 val;
30 };
31 
32 
33 /**
34  * cnt32_to_63 - Expand a 32-bit counter to a 63-bit counter
35  * @cnt_lo: The low part of the counter
36  *
37  * Many hardware clock counters are only 32 bits wide and therefore have
38  * a relatively short period making wrap-arounds rather frequent.  This
39  * is a problem when implementing sched_clock() for example, where a 64-bit
40  * non-wrapping monotonic value is expected to be returned.
41  *
42  * To overcome that limitation, let's extend a 32-bit counter to 63 bits
43  * in a completely lock free fashion. Bits 0 to 31 of the clock are provided
44  * by the hardware while bits 32 to 62 are stored in memory.  The top bit in
45  * memory is used to synchronize with the hardware clock half-period.  When
46  * the top bit of both counters (hardware and in memory) differ then the
47  * memory is updated with a new value, incrementing it when the hardware
48  * counter wraps around.
49  *
50  * Because a word store in memory is atomic then the incremented value will
51  * always be in synch with the top bit indicating to any potential concurrent
52  * reader if the value in memory is up to date or not with regards to the
53  * needed increment.  And any race in updating the value in memory is harmless
54  * as the same value would simply be stored more than once.
55  *
56  * The restrictions for the algorithm to work properly are:
57  *
58  * 1) this code must be called at least once per each half period of the
59  *    32-bit counter;
60  *
61  * 2) this code must not be preempted for a duration longer than the
62  *    32-bit counter half period minus the longest period between two
63  *    calls to this code;
64  *
65  * Those requirements ensure proper update to the state bit in memory.
66  * This is usually not a problem in practice, but if it is then a kernel
67  * timer should be scheduled to manage for this code to be executed often
68  * enough.
69  *
70  * And finally:
71  *
72  * 3) the cnt_lo argument must be seen as a globally incrementing value,
73  *    meaning that it should be a direct reference to the counter data which
74  *    can be evaluated according to a specific ordering within the macro,
75  *    and not the result of a previous evaluation stored in a variable.
76  *
77  * For example, this is wrong:
78  *
79  *	u32 partial = get_hw_count();
80  *	u64 full = cnt32_to_63(partial);
81  *	return full;
82  *
83  * This is fine:
84  *
85  *	u64 full = cnt32_to_63(get_hw_count());
86  *	return full;
87  *
88  * Note that the top bit (bit 63) in the returned value should be considered
89  * as garbage.  It is not cleared here because callers are likely to use a
90  * multiplier on the returned value which can get rid of the top bit
91  * implicitly by making the multiplier even, therefore saving on a runtime
92  * clear-bit instruction. Otherwise caller must remember to clear the top
93  * bit explicitly.
94  */
95 #define cnt32_to_63(cnt_lo) \
96 ({ \
97 	static u32 __m_cnt_hi; \
98 	union cnt32_to_63 __x; \
99 	__x.hi = __m_cnt_hi; \
100  	smp_rmb(); \
101 	__x.lo = (cnt_lo); \
102 	if (unlikely((s32)(__x.hi ^ __x.lo) < 0)) \
103 		__m_cnt_hi = __x.hi = (__x.hi ^ 0x80000000) + (__x.hi >> 31); \
104 	__x.val; \
105 })
106 
107 #endif
108