1 /*
2  * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
3  *
4  *  Freescale DIU Frame Buffer device driver
5  *
6  *  Authors: Hongjun Chen <hong-jun.chen@freescale.com>
7  *           Paul Widmer <paul.widmer@freescale.com>
8  *           Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
9  *           York Sun <yorksun@freescale.com>
10  *
11  *   Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
12  *
13  * This program is free software; you can redistribute  it and/or modify it
14  * under  the terms of  the GNU General  Public License as published by the
15  * Free Software Foundation;  either version 2 of the  License, or (at your
16  * option) any later version.
17  *
18  */
19 
20 #ifndef __FSL_DIU_FB_H__
21 #define __FSL_DIU_FB_H__
22 
23 #include <linux/types.h>
24 
25 struct mfb_chroma_key {
26 	int enable;
27 	__u8  red_max;
28 	__u8  green_max;
29 	__u8  blue_max;
30 	__u8  red_min;
31 	__u8  green_min;
32 	__u8  blue_min;
33 };
34 
35 struct aoi_display_offset {
36 	__s32 x_aoi_d;
37 	__s32 y_aoi_d;
38 };
39 
40 #define MFB_SET_CHROMA_KEY	_IOW('M', 1, struct mfb_chroma_key)
41 #define MFB_SET_BRIGHTNESS	_IOW('M', 3, __u8)
42 #define MFB_SET_ALPHA		_IOW('M', 0, __u8)
43 #define MFB_GET_ALPHA		_IOR('M', 0, __u8)
44 #define MFB_SET_AOID		_IOW('M', 4, struct aoi_display_offset)
45 #define MFB_GET_AOID		_IOR('M', 4, struct aoi_display_offset)
46 #define MFB_SET_PIXFMT		_IOW('M', 8, __u32)
47 #define MFB_GET_PIXFMT		_IOR('M', 8, __u32)
48 
49 /*
50  * The MPC5121 BSP comes with a gamma_set utility that initializes the
51  * gamma table.  Unfortunately, it uses bad values for the IOCTL commands,
52  * but there's nothing we can do about it now.  These ioctls are only
53  * supported on the MPC5121.
54  */
55 #define MFB_SET_GAMMA		_IOW('M', 1, __u8)
56 #define MFB_GET_GAMMA		_IOR('M', 1, __u8)
57 
58 /*
59  * The original definitions of MFB_SET_PIXFMT and MFB_GET_PIXFMT used the
60  * wrong value for 'size' field of the ioctl.  The current macros above use the
61  * right size, but we still need to provide backwards compatibility, at least
62  * for a while.
63 */
64 #define MFB_SET_PIXFMT_OLD	0x80014d08
65 #define MFB_GET_PIXFMT_OLD	0x40014d08
66 
67 #ifdef __KERNEL__
68 
69 /*
70  * These are the fields of area descriptor(in DDR memory) for every plane
71  */
72 struct diu_ad {
73 	/* Word 0(32-bit) in DDR memory */
74 /* 	__u16 comp; */
75 /* 	__u16 pixel_s:2; */
76 /* 	__u16 palette:1; */
77 /* 	__u16 red_c:2; */
78 /* 	__u16 green_c:2; */
79 /* 	__u16 blue_c:2; */
80 /* 	__u16 alpha_c:3; */
81 /* 	__u16 byte_f:1; */
82 /* 	__u16 res0:3; */
83 
84 	__be32 pix_fmt; /* hard coding pixel format */
85 
86 	/* Word 1(32-bit) in DDR memory */
87 	__le32 addr;
88 
89 	/* Word 2(32-bit) in DDR memory */
90 /* 	__u32 delta_xs:11; */
91 /* 	__u32 res1:1; */
92 /* 	__u32 delta_ys:11; */
93 /* 	__u32 res2:1; */
94 /* 	__u32 g_alpha:8; */
95 	__le32 src_size_g_alpha;
96 
97 	/* Word 3(32-bit) in DDR memory */
98 /* 	__u32 delta_xi:11; */
99 /* 	__u32 res3:5; */
100 /* 	__u32 delta_yi:11; */
101 /* 	__u32 res4:3; */
102 /* 	__u32 flip:2; */
103 	__le32 aoi_size;
104 
105 	/* Word 4(32-bit) in DDR memory */
106 	/*__u32 offset_xi:11;
107 	__u32 res5:5;
108 	__u32 offset_yi:11;
109 	__u32 res6:5;
110 	*/
111 	__le32 offset_xyi;
112 
113 	/* Word 5(32-bit) in DDR memory */
114 	/*__u32 offset_xd:11;
115 	__u32 res7:5;
116 	__u32 offset_yd:11;
117 	__u32 res8:5; */
118 	__le32 offset_xyd;
119 
120 
121 	/* Word 6(32-bit) in DDR memory */
122 	__u8 ckmax_r;
123 	__u8 ckmax_g;
124 	__u8 ckmax_b;
125 	__u8 res9;
126 
127 	/* Word 7(32-bit) in DDR memory */
128 	__u8 ckmin_r;
129 	__u8 ckmin_g;
130 	__u8 ckmin_b;
131 	__u8 res10;
132 /* 	__u32 res10:8; */
133 
134 	/* Word 8(32-bit) in DDR memory */
135 	__le32 next_ad;
136 
137 	/* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
138 	__u32 paddr;
139 } __attribute__ ((packed));
140 
141 /* DIU register map */
142 struct diu {
143 	__be32 desc[3];
144 	__be32 gamma;
145 	__be32 palette;
146 	__be32 cursor;
147 	__be32 curs_pos;
148 	__be32 diu_mode;
149 	__be32 bgnd;
150 	__be32 bgnd_wb;
151 	__be32 disp_size;
152 	__be32 wb_size;
153 	__be32 wb_mem_addr;
154 	__be32 hsyn_para;
155 	__be32 vsyn_para;
156 	__be32 syn_pol;
157 	__be32 thresholds;
158 	__be32 int_status;
159 	__be32 int_mask;
160 	__be32 colorbar[8];
161 	__be32 filling;
162 	__be32 plut;
163 } __attribute__ ((packed));
164 
165 /*
166  * Modes of operation of DIU.  The DIU supports five different modes, but
167  * the driver only supports modes 0 and 1.
168  */
169 #define MFB_MODE0	0	/* DIU off */
170 #define MFB_MODE1	1	/* All three planes output to display */
171 
172 #endif /* __KERNEL__ */
173 #endif /* __FSL_DIU_FB_H__ */
174