1 /*
2 * Copyright 2009-2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9 #ifndef __LINUX_MFD_MC13XXX_H
10 #define __LINUX_MFD_MC13XXX_H
11
12 #include <linux/interrupt.h>
13
14 struct mc13xxx;
15
16 void mc13xxx_lock(struct mc13xxx *mc13xxx);
17 void mc13xxx_unlock(struct mc13xxx *mc13xxx);
18
19 int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val);
20 int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val);
21 int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,
22 u32 mask, u32 val);
23
24 int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq,
25 irq_handler_t handler, const char *name, void *dev);
26 int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev);
27
28 int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq,
29 int *enabled, int *pending);
30
31 int mc13xxx_get_flags(struct mc13xxx *mc13xxx);
32
33 int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx,
34 unsigned int mode, unsigned int channel,
35 u8 ato, bool atox, unsigned int *sample);
36
37 /* Deprecated calls */
mc13xxx_irq_ack(struct mc13xxx * mc13xxx,int irq)38 static inline int mc13xxx_irq_ack(struct mc13xxx *mc13xxx, int irq)
39 {
40 return 0;
41 }
42
mc13xxx_irq_request_nounmask(struct mc13xxx * mc13xxx,int irq,irq_handler_t handler,const char * name,void * dev)43 static inline int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq,
44 irq_handler_t handler,
45 const char *name, void *dev)
46 {
47 return mc13xxx_irq_request(mc13xxx, irq, handler, name, dev);
48 }
49
50 int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq);
51 int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq);
52
53 #define MC13783_AUDIO_RX0 36
54 #define MC13783_AUDIO_RX1 37
55 #define MC13783_AUDIO_TX 38
56 #define MC13783_SSI_NETWORK 39
57 #define MC13783_AUDIO_CODEC 40
58 #define MC13783_AUDIO_DAC 41
59
60 #define MC13XXX_IRQ_ADCDONE 0
61 #define MC13XXX_IRQ_ADCBISDONE 1
62 #define MC13XXX_IRQ_TS 2
63 #define MC13XXX_IRQ_CHGDET 6
64 #define MC13XXX_IRQ_CHGREV 8
65 #define MC13XXX_IRQ_CHGSHORT 9
66 #define MC13XXX_IRQ_CCCV 10
67 #define MC13XXX_IRQ_CHGCURR 11
68 #define MC13XXX_IRQ_BPON 12
69 #define MC13XXX_IRQ_LOBATL 13
70 #define MC13XXX_IRQ_LOBATH 14
71 #define MC13XXX_IRQ_1HZ 24
72 #define MC13XXX_IRQ_TODA 25
73 #define MC13XXX_IRQ_SYSRST 30
74 #define MC13XXX_IRQ_RTCRST 31
75 #define MC13XXX_IRQ_PC 32
76 #define MC13XXX_IRQ_WARM 33
77 #define MC13XXX_IRQ_MEMHLD 34
78 #define MC13XXX_IRQ_THWARNL 36
79 #define MC13XXX_IRQ_THWARNH 37
80 #define MC13XXX_IRQ_CLK 38
81
82 struct regulator_init_data;
83
84 struct mc13xxx_regulator_init_data {
85 int id;
86 struct regulator_init_data *init_data;
87 struct device_node *node;
88 };
89
90 struct mc13xxx_regulator_platform_data {
91 int num_regulators;
92 struct mc13xxx_regulator_init_data *regulators;
93 };
94
95 enum {
96 /* MC13783 LED IDs */
97 MC13783_LED_MD,
98 MC13783_LED_AD,
99 MC13783_LED_KP,
100 MC13783_LED_R1,
101 MC13783_LED_G1,
102 MC13783_LED_B1,
103 MC13783_LED_R2,
104 MC13783_LED_G2,
105 MC13783_LED_B2,
106 MC13783_LED_R3,
107 MC13783_LED_G3,
108 MC13783_LED_B3,
109 /* MC13892 LED IDs */
110 MC13892_LED_MD,
111 MC13892_LED_AD,
112 MC13892_LED_KP,
113 MC13892_LED_R,
114 MC13892_LED_G,
115 MC13892_LED_B,
116 /* MC34708 LED IDs */
117 MC34708_LED_R,
118 MC34708_LED_G,
119 };
120
121 struct mc13xxx_led_platform_data {
122 int id;
123 const char *name;
124 const char *default_trigger;
125 };
126
127 #define MAX_LED_CONTROL_REGS 6
128
129 /* MC13783 LED Control 0 */
130 #define MC13783_LED_C0_ENABLE (1 << 0)
131 #define MC13783_LED_C0_TRIODE_MD (1 << 7)
132 #define MC13783_LED_C0_TRIODE_AD (1 << 8)
133 #define MC13783_LED_C0_TRIODE_KP (1 << 9)
134 #define MC13783_LED_C0_BOOST (1 << 10)
135 #define MC13783_LED_C0_ABMODE(x) (((x) & 0x7) << 11)
136 #define MC13783_LED_C0_ABREF(x) (((x) & 0x3) << 14)
137 /* MC13783 LED Control 1 */
138 #define MC13783_LED_C1_TC1HALF (1 << 18)
139 #define MC13783_LED_C1_SLEWLIM (1 << 23)
140 /* MC13783 LED Control 2 */
141 #define MC13783_LED_C2_CURRENT_MD(x) (((x) & 0x7) << 0)
142 #define MC13783_LED_C2_CURRENT_AD(x) (((x) & 0x7) << 3)
143 #define MC13783_LED_C2_CURRENT_KP(x) (((x) & 0x7) << 6)
144 #define MC13783_LED_C2_PERIOD(x) (((x) & 0x3) << 21)
145 #define MC13783_LED_C2_SLEWLIM (1 << 23)
146 /* MC13783 LED Control 3 */
147 #define MC13783_LED_C3_CURRENT_R1(x) (((x) & 0x3) << 0)
148 #define MC13783_LED_C3_CURRENT_G1(x) (((x) & 0x3) << 2)
149 #define MC13783_LED_C3_CURRENT_B1(x) (((x) & 0x3) << 4)
150 #define MC13783_LED_C3_PERIOD(x) (((x) & 0x3) << 21)
151 #define MC13783_LED_C3_TRIODE_TC1 (1 << 23)
152 /* MC13783 LED Control 4 */
153 #define MC13783_LED_C4_CURRENT_R2(x) (((x) & 0x3) << 0)
154 #define MC13783_LED_C4_CURRENT_G2(x) (((x) & 0x3) << 2)
155 #define MC13783_LED_C4_CURRENT_B2(x) (((x) & 0x3) << 4)
156 #define MC13783_LED_C4_PERIOD(x) (((x) & 0x3) << 21)
157 #define MC13783_LED_C4_TRIODE_TC2 (1 << 23)
158 /* MC13783 LED Control 5 */
159 #define MC13783_LED_C5_CURRENT_R3(x) (((x) & 0x3) << 0)
160 #define MC13783_LED_C5_CURRENT_G3(x) (((x) & 0x3) << 2)
161 #define MC13783_LED_C5_CURRENT_B3(x) (((x) & 0x3) << 4)
162 #define MC13783_LED_C5_PERIOD(x) (((x) & 0x3) << 21)
163 #define MC13783_LED_C5_TRIODE_TC3 (1 << 23)
164 /* MC13892 LED Control 0 */
165 #define MC13892_LED_C0_CURRENT_MD(x) (((x) & 0x7) << 9)
166 #define MC13892_LED_C0_CURRENT_AD(x) (((x) & 0x7) << 21)
167 /* MC13892 LED Control 1 */
168 #define MC13892_LED_C1_CURRENT_KP(x) (((x) & 0x7) << 9)
169 /* MC13892 LED Control 2 */
170 #define MC13892_LED_C2_CURRENT_R(x) (((x) & 0x7) << 9)
171 #define MC13892_LED_C2_CURRENT_G(x) (((x) & 0x7) << 21)
172 /* MC13892 LED Control 3 */
173 #define MC13892_LED_C3_CURRENT_B(x) (((x) & 0x7) << 9)
174 /* MC34708 LED Control 0 */
175 #define MC34708_LED_C0_CURRENT_R(x) (((x) & 0x3) << 9)
176 #define MC34708_LED_C0_CURRENT_G(x) (((x) & 0x3) << 21)
177
178 struct mc13xxx_leds_platform_data {
179 struct mc13xxx_led_platform_data *led;
180 int num_leds;
181 u32 led_control[MAX_LED_CONTROL_REGS];
182 };
183
184 #define MC13783_BUTTON_DBNC_0MS 0
185 #define MC13783_BUTTON_DBNC_30MS 1
186 #define MC13783_BUTTON_DBNC_150MS 2
187 #define MC13783_BUTTON_DBNC_750MS 3
188 #define MC13783_BUTTON_ENABLE (1 << 2)
189 #define MC13783_BUTTON_POL_INVERT (1 << 3)
190 #define MC13783_BUTTON_RESET_EN (1 << 4)
191
192 struct mc13xxx_buttons_platform_data {
193 int b1on_flags;
194 unsigned short b1on_key;
195 int b2on_flags;
196 unsigned short b2on_key;
197 int b3on_flags;
198 unsigned short b3on_key;
199 };
200
201 #define MC13783_TS_ATO_FIRST false
202 #define MC13783_TS_ATO_EACH true
203
204 struct mc13xxx_ts_platform_data {
205 /* Delay between Touchscreen polarization and ADC Conversion.
206 * Given in clock ticks of a 32 kHz clock which gives a granularity of
207 * about 30.5ms */
208 u8 ato;
209 /* Use the ATO delay only for the first conversion or for each one */
210 bool atox;
211 };
212
213 enum mc13783_ssi_port {
214 MC13783_SSI1_PORT,
215 MC13783_SSI2_PORT,
216 };
217
218 struct mc13xxx_codec_platform_data {
219 enum mc13783_ssi_port adc_ssi_port;
220 enum mc13783_ssi_port dac_ssi_port;
221 };
222
223 #define MC13XXX_USE_TOUCHSCREEN (1 << 0)
224 #define MC13XXX_USE_CODEC (1 << 1)
225 #define MC13XXX_USE_ADC (1 << 2)
226 #define MC13XXX_USE_RTC (1 << 3)
227
228 struct mc13xxx_platform_data {
229 unsigned int flags;
230
231 struct mc13xxx_regulator_platform_data regulators;
232 struct mc13xxx_leds_platform_data *leds;
233 struct mc13xxx_buttons_platform_data *buttons;
234 struct mc13xxx_ts_platform_data touch;
235 struct mc13xxx_codec_platform_data *codec;
236 };
237
238 #define MC13XXX_ADC_MODE_TS 1
239 #define MC13XXX_ADC_MODE_SINGLE_CHAN 2
240 #define MC13XXX_ADC_MODE_MULT_CHAN 3
241
242 #define MC13XXX_ADC0 43
243 #define MC13XXX_ADC0_LICELLCON (1 << 0)
244 #define MC13XXX_ADC0_CHRGICON (1 << 1)
245 #define MC13XXX_ADC0_BATICON (1 << 2)
246 #define MC13XXX_ADC0_ADIN7SEL_DIE (1 << 4)
247 #define MC13XXX_ADC0_ADIN7SEL_UID (2 << 4)
248 #define MC13XXX_ADC0_ADREFEN (1 << 10)
249 #define MC13XXX_ADC0_TSMOD0 (1 << 12)
250 #define MC13XXX_ADC0_TSMOD1 (1 << 13)
251 #define MC13XXX_ADC0_TSMOD2 (1 << 14)
252 #define MC13XXX_ADC0_CHRGRAWDIV (1 << 15)
253 #define MC13XXX_ADC0_ADINC1 (1 << 16)
254 #define MC13XXX_ADC0_ADINC2 (1 << 17)
255
256 #define MC13XXX_ADC0_TSMOD_MASK (MC13XXX_ADC0_TSMOD0 | \
257 MC13XXX_ADC0_TSMOD1 | \
258 MC13XXX_ADC0_TSMOD2)
259
260 #define MC13XXX_ADC0_CONFIG_MASK (MC13XXX_ADC0_TSMOD_MASK | \
261 MC13XXX_ADC0_LICELLCON | \
262 MC13XXX_ADC0_CHRGICON | \
263 MC13XXX_ADC0_BATICON)
264
265 #endif /* ifndef __LINUX_MFD_MC13XXX_H */
266