1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_SVGA_H
3 #define _LINUX_SVGA_H
4 
5 #include <linux/pci.h>
6 #include <video/vga.h>
7 
8 /* Terminator for register set */
9 
10 #define VGA_REGSET_END_VAL	0xFF
11 #define VGA_REGSET_END		{VGA_REGSET_END_VAL, 0, 0}
12 
13 struct vga_regset {
14 	u8 regnum;
15 	u8 lowbit;
16 	u8 highbit;
17 };
18 
19 /* ------------------------------------------------------------------------- */
20 
21 #define SVGA_FORMAT_END_VAL	0xFFFF
22 #define SVGA_FORMAT_END		{SVGA_FORMAT_END_VAL, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, 0, 0, 0, 0, 0, 0}
23 
24 struct svga_fb_format {
25 	/* var part */
26 	u32 bits_per_pixel;
27 	struct fb_bitfield red;
28 	struct fb_bitfield green;
29 	struct fb_bitfield blue;
30 	struct fb_bitfield transp;
31 	u32 nonstd;
32 	/* fix part */
33 	u32 type;
34 	u32 type_aux;
35 	u32 visual;
36 	u32 xpanstep;
37 	u32 xresstep;
38 };
39 
40 struct svga_timing_regs {
41 	const struct vga_regset *h_total_regs;
42 	const struct vga_regset *h_display_regs;
43 	const struct vga_regset *h_blank_start_regs;
44 	const struct vga_regset *h_blank_end_regs;
45 	const struct vga_regset *h_sync_start_regs;
46 	const struct vga_regset *h_sync_end_regs;
47 
48 	const struct vga_regset *v_total_regs;
49 	const struct vga_regset *v_display_regs;
50 	const struct vga_regset *v_blank_start_regs;
51 	const struct vga_regset *v_blank_end_regs;
52 	const struct vga_regset *v_sync_start_regs;
53 	const struct vga_regset *v_sync_end_regs;
54 };
55 
56 struct svga_pll {
57 	u16 m_min;
58 	u16 m_max;
59 	u16 n_min;
60 	u16 n_max;
61 	u16 r_min;
62 	u16 r_max;  /* r_max < 32 */
63 	u32 f_vco_min;
64 	u32 f_vco_max;
65 	u32 f_base;
66 };
67 
68 
69 /* Write a value to the attribute register */
70 
svga_wattr(void __iomem * regbase,u8 index,u8 data)71 static inline void svga_wattr(void __iomem *regbase, u8 index, u8 data)
72 {
73 	vga_r(regbase, VGA_IS1_RC);
74 	vga_w(regbase, VGA_ATT_IW, index);
75 	vga_w(regbase, VGA_ATT_W, data);
76 }
77 
78 /* Write a value to a sequence register with a mask */
79 
svga_wseq_mask(void __iomem * regbase,u8 index,u8 data,u8 mask)80 static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask)
81 {
82 	vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask));
83 }
84 
85 /* Write a value to a CRT register with a mask */
86 
svga_wcrt_mask(void __iomem * regbase,u8 index,u8 data,u8 mask)87 static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask)
88 {
89 	vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, index) & ~mask));
90 }
91 
svga_primary_device(struct pci_dev * dev)92 static inline int svga_primary_device(struct pci_dev *dev)
93 {
94 	u16 flags;
95 	pci_read_config_word(dev, PCI_COMMAND, &flags);
96 	return (flags & PCI_COMMAND_IO);
97 }
98 
99 
100 void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
101 void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
102 
103 void svga_set_default_gfx_regs(void __iomem *regbase);
104 void svga_set_default_atc_regs(void __iomem *regbase);
105 void svga_set_default_seq_regs(void __iomem *regbase);
106 void svga_set_default_crt_regs(void __iomem *regbase);
107 void svga_set_textmode_vga_regs(void __iomem *regbase);
108 
109 void svga_settile(struct fb_info *info, struct fb_tilemap *map);
110 void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area);
111 void svga_tilefill(struct fb_info *info, struct fb_tilerect *rect);
112 void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit);
113 void svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tilecursor *cursor);
114 int svga_get_tilemax(struct fb_info *info);
115 void svga_get_caps(struct fb_info *info, struct fb_blit_caps *caps,
116 		   struct fb_var_screeninfo *var);
117 
118 int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node);
119 int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node);
120 void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node);
121 
122 int svga_match_format(const struct svga_fb_format *frm, struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix);
123 
124 #endif /* _LINUX_SVGA_H */
125 
126