1 /*
2 * Copyright (C) 2014 NVIDIA Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9 #ifndef __SOC_TEGRA_MC_H__
10 #define __SOC_TEGRA_MC_H__
11
12 #include <linux/reset-controller.h>
13 #include <linux/types.h>
14
15 struct clk;
16 struct device;
17 struct page;
18
19 struct tegra_smmu_enable {
20 unsigned int reg;
21 unsigned int bit;
22 };
23
24 struct tegra_mc_timing {
25 unsigned long rate;
26
27 u32 *emem_data;
28 };
29
30 /* latency allowance */
31 struct tegra_mc_la {
32 unsigned int reg;
33 unsigned int shift;
34 unsigned int mask;
35 unsigned int def;
36 };
37
38 struct tegra_mc_client {
39 unsigned int id;
40 const char *name;
41 unsigned int swgroup;
42
43 unsigned int fifo_size;
44
45 struct tegra_smmu_enable smmu;
46 struct tegra_mc_la la;
47 };
48
49 struct tegra_smmu_swgroup {
50 const char *name;
51 unsigned int swgroup;
52 unsigned int reg;
53 };
54
55 struct tegra_smmu_group_soc {
56 const char *name;
57 const unsigned int *swgroups;
58 unsigned int num_swgroups;
59 };
60
61 struct tegra_smmu_soc {
62 const struct tegra_mc_client *clients;
63 unsigned int num_clients;
64
65 const struct tegra_smmu_swgroup *swgroups;
66 unsigned int num_swgroups;
67
68 const struct tegra_smmu_group_soc *groups;
69 unsigned int num_groups;
70
71 bool supports_round_robin_arbitration;
72 bool supports_request_limit;
73
74 unsigned int num_tlb_lines;
75 unsigned int num_asids;
76 };
77
78 struct tegra_mc;
79 struct tegra_smmu;
80
81 #ifdef CONFIG_TEGRA_IOMMU_SMMU
82 struct tegra_smmu *tegra_smmu_probe(struct device *dev,
83 const struct tegra_smmu_soc *soc,
84 struct tegra_mc *mc);
85 void tegra_smmu_remove(struct tegra_smmu *smmu);
86 #else
87 static inline struct tegra_smmu *
tegra_smmu_probe(struct device * dev,const struct tegra_smmu_soc * soc,struct tegra_mc * mc)88 tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc,
89 struct tegra_mc *mc)
90 {
91 return NULL;
92 }
93
tegra_smmu_remove(struct tegra_smmu * smmu)94 static inline void tegra_smmu_remove(struct tegra_smmu *smmu)
95 {
96 }
97 #endif
98
99 struct tegra_mc_reset {
100 const char *name;
101 unsigned long id;
102 unsigned int control;
103 unsigned int status;
104 unsigned int reset;
105 unsigned int bit;
106 };
107
108 struct tegra_mc_reset_ops {
109 int (*hotreset_assert)(struct tegra_mc *mc,
110 const struct tegra_mc_reset *rst);
111 int (*hotreset_deassert)(struct tegra_mc *mc,
112 const struct tegra_mc_reset *rst);
113 int (*block_dma)(struct tegra_mc *mc,
114 const struct tegra_mc_reset *rst);
115 bool (*dma_idling)(struct tegra_mc *mc,
116 const struct tegra_mc_reset *rst);
117 int (*unblock_dma)(struct tegra_mc *mc,
118 const struct tegra_mc_reset *rst);
119 int (*reset_status)(struct tegra_mc *mc,
120 const struct tegra_mc_reset *rst);
121 };
122
123 struct tegra_mc_soc {
124 const struct tegra_mc_client *clients;
125 unsigned int num_clients;
126
127 const unsigned long *emem_regs;
128 unsigned int num_emem_regs;
129
130 unsigned int num_address_bits;
131 unsigned int atom_size;
132
133 u8 client_id_mask;
134
135 const struct tegra_smmu_soc *smmu;
136
137 u32 intmask;
138
139 const struct tegra_mc_reset_ops *reset_ops;
140 const struct tegra_mc_reset *resets;
141 unsigned int num_resets;
142 };
143
144 struct tegra_mc {
145 struct device *dev;
146 struct tegra_smmu *smmu;
147 void __iomem *regs, *regs2;
148 struct clk *clk;
149 int irq;
150
151 const struct tegra_mc_soc *soc;
152 unsigned long tick;
153
154 struct tegra_mc_timing *timings;
155 unsigned int num_timings;
156
157 struct reset_controller_dev reset;
158
159 spinlock_t lock;
160 };
161
162 void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate);
163 unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc);
164
165 #endif /* __SOC_TEGRA_MC_H__ */
166