1 2 /* 3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 23 24 25 26 27 28 29 30 #ifndef _HE_SIG_A_MU_UL_INFO_H_ 31 #define _HE_SIG_A_MU_UL_INFO_H_ 32 #if !defined(__ASSEMBLER__) 33 #endif 34 35 #define NUM_OF_DWORDS_HE_SIG_A_MU_UL_INFO 2 36 37 38 struct he_sig_a_mu_ul_info { 39 uint32_t format_indication : 1, 40 bss_color_id : 6, 41 spatial_reuse : 16, 42 reserved_0a : 1, 43 transmit_bw : 2, 44 reserved_0b : 6; 45 uint32_t txop_duration : 7, 46 reserved_1a : 9, 47 crc : 4, 48 tail : 6, 49 reserved_1b : 5, 50 rx_integrity_check_passed : 1; 51 }; 52 53 54 55 56 #define HE_SIG_A_MU_UL_INFO_FORMAT_INDICATION_OFFSET 0x00000000 57 #define HE_SIG_A_MU_UL_INFO_FORMAT_INDICATION_LSB 0 58 #define HE_SIG_A_MU_UL_INFO_FORMAT_INDICATION_MSB 0 59 #define HE_SIG_A_MU_UL_INFO_FORMAT_INDICATION_MASK 0x00000001 60 61 62 63 64 #define HE_SIG_A_MU_UL_INFO_BSS_COLOR_ID_OFFSET 0x00000000 65 #define HE_SIG_A_MU_UL_INFO_BSS_COLOR_ID_LSB 1 66 #define HE_SIG_A_MU_UL_INFO_BSS_COLOR_ID_MSB 6 67 #define HE_SIG_A_MU_UL_INFO_BSS_COLOR_ID_MASK 0x0000007e 68 69 70 71 72 #define HE_SIG_A_MU_UL_INFO_SPATIAL_REUSE_OFFSET 0x00000000 73 #define HE_SIG_A_MU_UL_INFO_SPATIAL_REUSE_LSB 7 74 #define HE_SIG_A_MU_UL_INFO_SPATIAL_REUSE_MSB 22 75 #define HE_SIG_A_MU_UL_INFO_SPATIAL_REUSE_MASK 0x007fff80 76 77 78 79 80 #define HE_SIG_A_MU_UL_INFO_RESERVED_0A_OFFSET 0x00000000 81 #define HE_SIG_A_MU_UL_INFO_RESERVED_0A_LSB 23 82 #define HE_SIG_A_MU_UL_INFO_RESERVED_0A_MSB 23 83 #define HE_SIG_A_MU_UL_INFO_RESERVED_0A_MASK 0x00800000 84 85 86 87 88 #define HE_SIG_A_MU_UL_INFO_TRANSMIT_BW_OFFSET 0x00000000 89 #define HE_SIG_A_MU_UL_INFO_TRANSMIT_BW_LSB 24 90 #define HE_SIG_A_MU_UL_INFO_TRANSMIT_BW_MSB 25 91 #define HE_SIG_A_MU_UL_INFO_TRANSMIT_BW_MASK 0x03000000 92 93 94 95 96 #define HE_SIG_A_MU_UL_INFO_RESERVED_0B_OFFSET 0x00000000 97 #define HE_SIG_A_MU_UL_INFO_RESERVED_0B_LSB 26 98 #define HE_SIG_A_MU_UL_INFO_RESERVED_0B_MSB 31 99 #define HE_SIG_A_MU_UL_INFO_RESERVED_0B_MASK 0xfc000000 100 101 102 103 104 #define HE_SIG_A_MU_UL_INFO_TXOP_DURATION_OFFSET 0x00000004 105 #define HE_SIG_A_MU_UL_INFO_TXOP_DURATION_LSB 0 106 #define HE_SIG_A_MU_UL_INFO_TXOP_DURATION_MSB 6 107 #define HE_SIG_A_MU_UL_INFO_TXOP_DURATION_MASK 0x0000007f 108 109 110 111 112 #define HE_SIG_A_MU_UL_INFO_RESERVED_1A_OFFSET 0x00000004 113 #define HE_SIG_A_MU_UL_INFO_RESERVED_1A_LSB 7 114 #define HE_SIG_A_MU_UL_INFO_RESERVED_1A_MSB 15 115 #define HE_SIG_A_MU_UL_INFO_RESERVED_1A_MASK 0x0000ff80 116 117 118 119 120 #define HE_SIG_A_MU_UL_INFO_CRC_OFFSET 0x00000004 121 #define HE_SIG_A_MU_UL_INFO_CRC_LSB 16 122 #define HE_SIG_A_MU_UL_INFO_CRC_MSB 19 123 #define HE_SIG_A_MU_UL_INFO_CRC_MASK 0x000f0000 124 125 126 127 128 #define HE_SIG_A_MU_UL_INFO_TAIL_OFFSET 0x00000004 129 #define HE_SIG_A_MU_UL_INFO_TAIL_LSB 20 130 #define HE_SIG_A_MU_UL_INFO_TAIL_MSB 25 131 #define HE_SIG_A_MU_UL_INFO_TAIL_MASK 0x03f00000 132 133 134 135 136 #define HE_SIG_A_MU_UL_INFO_RESERVED_1B_OFFSET 0x00000004 137 #define HE_SIG_A_MU_UL_INFO_RESERVED_1B_LSB 26 138 #define HE_SIG_A_MU_UL_INFO_RESERVED_1B_MSB 30 139 #define HE_SIG_A_MU_UL_INFO_RESERVED_1B_MASK 0x7c000000 140 141 142 143 144 #define HE_SIG_A_MU_UL_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000004 145 #define HE_SIG_A_MU_UL_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31 146 #define HE_SIG_A_MU_UL_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31 147 #define HE_SIG_A_MU_UL_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000 148 149 150 151 #endif 152