1 2 /* 3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 23 24 25 26 27 28 29 30 #ifndef _HE_SIG_B1_MU_INFO_H_ 31 #define _HE_SIG_B1_MU_INFO_H_ 32 #if !defined(__ASSEMBLER__) 33 #endif 34 35 #define NUM_OF_DWORDS_HE_SIG_B1_MU_INFO 1 36 37 38 struct he_sig_b1_mu_info { 39 uint32_t ru_allocation : 8, 40 reserved_0 : 23, 41 rx_integrity_check_passed : 1; 42 }; 43 44 45 46 47 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_OFFSET 0x00000000 48 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_LSB 0 49 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_MSB 7 50 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_MASK 0x000000ff 51 52 53 54 55 #define HE_SIG_B1_MU_INFO_RESERVED_0_OFFSET 0x00000000 56 #define HE_SIG_B1_MU_INFO_RESERVED_0_LSB 8 57 #define HE_SIG_B1_MU_INFO_RESERVED_0_MSB 30 58 #define HE_SIG_B1_MU_INFO_RESERVED_0_MASK 0x7fffff00 59 60 61 62 63 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000000 64 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31 65 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31 66 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000 67 68 69 70 #endif 71