1 2 /* 3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 23 24 25 26 27 28 29 30 #ifndef _REO_ENTRANCE_RING_H_ 31 #define _REO_ENTRANCE_RING_H_ 32 #if !defined(__ASSEMBLER__) 33 #endif 34 35 #include "rx_mpdu_details.h" 36 #define NUM_OF_DWORDS_REO_ENTRANCE_RING 8 37 38 39 struct reo_entrance_ring { 40 struct rx_mpdu_details reo_level_mpdu_frame_info; 41 uint32_t rx_reo_queue_desc_addr_31_0 : 32; 42 uint32_t rx_reo_queue_desc_addr_39_32 : 8, 43 rounded_mpdu_byte_count : 14, 44 reo_destination_indication : 5, 45 frameless_bar : 1, 46 reserved_5a : 4; 47 uint32_t rxdma_push_reason : 2, 48 rxdma_error_code : 5, 49 mpdu_fragment_number : 4, 50 sw_exception : 1, 51 sw_exception_mpdu_delink : 1, 52 sw_exception_destination_ring_valid : 1, 53 sw_exception_destination_ring : 5, 54 mpdu_sequence_number : 12, 55 reserved_6a : 1; 56 uint32_t phy_ppdu_id : 16, 57 src_link_id : 3, 58 reserved_7a : 1, 59 ring_id : 8, 60 looping_count : 4; 61 }; 62 63 64 65 66 67 68 69 70 71 72 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000 73 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0 74 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31 75 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff 76 77 78 79 80 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004 81 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0 82 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7 83 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff 84 85 86 87 88 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004 89 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8 90 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11 91 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00 92 93 94 95 96 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004 97 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12 98 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31 99 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000 100 101 102 103 104 105 106 107 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008 108 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0 109 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MSB 7 110 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff 111 112 113 114 115 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008 116 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 8 117 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MSB 8 118 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00000100 119 120 121 122 123 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008 124 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 9 125 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MSB 9 126 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00000200 127 128 129 130 131 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008 132 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 10 133 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MSB 10 134 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00000400 135 136 137 138 139 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008 140 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 11 141 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MSB 11 142 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00000800 143 144 145 146 147 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008 148 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 12 149 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MSB 12 150 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x00001000 151 152 153 154 155 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008 156 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 13 157 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MSB 13 158 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x00002000 159 160 161 162 163 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008 164 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 14 165 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MSB 14 166 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x00004000 167 168 169 170 171 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_VDEV_ID_OFFSET 0x00000008 172 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_VDEV_ID_LSB 15 173 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_VDEV_ID_MSB 22 174 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_VDEV_ID_MASK 0x007f8000 175 176 177 178 179 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x00000008 180 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RESERVED_0A_LSB 23 181 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RESERVED_0A_MSB 26 182 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RESERVED_0A_MASK 0x07800000 183 184 185 186 187 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_OFFSET 0x00000008 188 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_LSB 27 189 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MSB 27 190 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MASK 0x08000000 191 192 193 194 195 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_OFFSET 0x00000008 196 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_LSB 28 197 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MSB 31 198 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MASK 0xf0000000 199 200 201 202 203 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c 204 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0 205 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MSB 31 206 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff 207 208 209 210 211 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000010 212 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0 213 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MSB 31 214 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff 215 216 217 218 219 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000014 220 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 221 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MSB 7 222 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff 223 224 225 226 227 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_OFFSET 0x00000014 228 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_LSB 8 229 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MSB 21 230 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MASK 0x003fff00 231 232 233 234 235 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_OFFSET 0x00000014 236 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_LSB 22 237 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MSB 26 238 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MASK 0x07c00000 239 240 241 242 243 #define REO_ENTRANCE_RING_FRAMELESS_BAR_OFFSET 0x00000014 244 #define REO_ENTRANCE_RING_FRAMELESS_BAR_LSB 27 245 #define REO_ENTRANCE_RING_FRAMELESS_BAR_MSB 27 246 #define REO_ENTRANCE_RING_FRAMELESS_BAR_MASK 0x08000000 247 248 249 250 251 #define REO_ENTRANCE_RING_RESERVED_5A_OFFSET 0x00000014 252 #define REO_ENTRANCE_RING_RESERVED_5A_LSB 28 253 #define REO_ENTRANCE_RING_RESERVED_5A_MSB 31 254 #define REO_ENTRANCE_RING_RESERVED_5A_MASK 0xf0000000 255 256 257 258 259 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_OFFSET 0x00000018 260 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_LSB 0 261 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MSB 1 262 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MASK 0x00000003 263 264 265 266 267 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_OFFSET 0x00000018 268 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_LSB 2 269 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MSB 6 270 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MASK 0x0000007c 271 272 273 274 275 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_OFFSET 0x00000018 276 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_LSB 7 277 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MSB 10 278 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MASK 0x00000780 279 280 281 282 283 #define REO_ENTRANCE_RING_SW_EXCEPTION_OFFSET 0x00000018 284 #define REO_ENTRANCE_RING_SW_EXCEPTION_LSB 11 285 #define REO_ENTRANCE_RING_SW_EXCEPTION_MSB 11 286 #define REO_ENTRANCE_RING_SW_EXCEPTION_MASK 0x00000800 287 288 289 290 291 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_OFFSET 0x00000018 292 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_LSB 12 293 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MSB 12 294 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MASK 0x00001000 295 296 297 298 299 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_OFFSET 0x00000018 300 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_LSB 13 301 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MSB 13 302 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MASK 0x00002000 303 304 305 306 307 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_OFFSET 0x00000018 308 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_LSB 14 309 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MSB 18 310 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MASK 0x0007c000 311 312 313 314 315 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_OFFSET 0x00000018 316 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_LSB 19 317 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MSB 30 318 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MASK 0x7ff80000 319 320 321 322 323 #define REO_ENTRANCE_RING_RESERVED_6A_OFFSET 0x00000018 324 #define REO_ENTRANCE_RING_RESERVED_6A_LSB 31 325 #define REO_ENTRANCE_RING_RESERVED_6A_MSB 31 326 #define REO_ENTRANCE_RING_RESERVED_6A_MASK 0x80000000 327 328 329 330 331 #define REO_ENTRANCE_RING_PHY_PPDU_ID_OFFSET 0x0000001c 332 #define REO_ENTRANCE_RING_PHY_PPDU_ID_LSB 0 333 #define REO_ENTRANCE_RING_PHY_PPDU_ID_MSB 15 334 #define REO_ENTRANCE_RING_PHY_PPDU_ID_MASK 0x0000ffff 335 336 337 338 339 #define REO_ENTRANCE_RING_SRC_LINK_ID_OFFSET 0x0000001c 340 #define REO_ENTRANCE_RING_SRC_LINK_ID_LSB 16 341 #define REO_ENTRANCE_RING_SRC_LINK_ID_MSB 18 342 #define REO_ENTRANCE_RING_SRC_LINK_ID_MASK 0x00070000 343 344 345 346 347 #define REO_ENTRANCE_RING_RESERVED_7A_OFFSET 0x0000001c 348 #define REO_ENTRANCE_RING_RESERVED_7A_LSB 19 349 #define REO_ENTRANCE_RING_RESERVED_7A_MSB 19 350 #define REO_ENTRANCE_RING_RESERVED_7A_MASK 0x00080000 351 352 353 354 355 #define REO_ENTRANCE_RING_RING_ID_OFFSET 0x0000001c 356 #define REO_ENTRANCE_RING_RING_ID_LSB 20 357 #define REO_ENTRANCE_RING_RING_ID_MSB 27 358 #define REO_ENTRANCE_RING_RING_ID_MASK 0x0ff00000 359 360 361 362 363 #define REO_ENTRANCE_RING_LOOPING_COUNT_OFFSET 0x0000001c 364 #define REO_ENTRANCE_RING_LOOPING_COUNT_LSB 28 365 #define REO_ENTRANCE_RING_LOOPING_COUNT_MSB 31 366 #define REO_ENTRANCE_RING_LOOPING_COUNT_MASK 0xf0000000 367 368 369 370 #endif 371