1 2 /* 3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 23 24 25 26 27 28 29 30 #ifndef _REO_UPDATE_RX_REO_QUEUE_H_ 31 #define _REO_UPDATE_RX_REO_QUEUE_H_ 32 #if !defined(__ASSEMBLER__) 33 #endif 34 35 #include "uniform_reo_cmd_header.h" 36 #define NUM_OF_DWORDS_REO_UPDATE_RX_REO_QUEUE 10 37 38 #define NUM_OF_QWORDS_REO_UPDATE_RX_REO_QUEUE 5 39 40 41 struct reo_update_rx_reo_queue { 42 struct uniform_reo_cmd_header cmd_header; 43 uint32_t rx_reo_queue_desc_addr_31_0 : 32; 44 uint32_t rx_reo_queue_desc_addr_39_32 : 8, 45 update_receive_queue_number : 1, 46 update_vld : 1, 47 update_associated_link_descriptor_counter : 1, 48 update_disable_duplicate_detection : 1, 49 update_soft_reorder_enable : 1, 50 update_ac : 1, 51 update_bar : 1, 52 update_rty : 1, 53 update_chk_2k_mode : 1, 54 update_oor_mode : 1, 55 update_ba_window_size : 1, 56 update_pn_check_needed : 1, 57 update_pn_shall_be_even : 1, 58 update_pn_shall_be_uneven : 1, 59 update_pn_handling_enable : 1, 60 update_pn_size : 1, 61 update_ignore_ampdu_flag : 1, 62 update_svld : 1, 63 update_ssn : 1, 64 update_seq_2k_error_detected_flag : 1, 65 update_pn_error_detected_flag : 1, 66 update_pn_valid : 1, 67 update_pn : 1, 68 clear_stat_counters : 1; 69 uint32_t receive_queue_number : 16, 70 vld : 1, 71 associated_link_descriptor_counter : 2, 72 disable_duplicate_detection : 1, 73 soft_reorder_enable : 1, 74 ac : 2, 75 bar : 1, 76 rty : 1, 77 chk_2k_mode : 1, 78 oor_mode : 1, 79 pn_check_needed : 1, 80 pn_shall_be_even : 1, 81 pn_shall_be_uneven : 1, 82 pn_handling_enable : 1, 83 ignore_ampdu_flag : 1; 84 uint32_t ba_window_size : 10, 85 pn_size : 2, 86 svld : 1, 87 ssn : 12, 88 seq_2k_error_detected_flag : 1, 89 pn_error_detected_flag : 1, 90 pn_valid : 1, 91 flush_from_cache : 1, 92 reserved_4a : 3; 93 uint32_t pn_31_0 : 32; 94 uint32_t pn_63_32 : 32; 95 uint32_t pn_95_64 : 32; 96 uint32_t pn_127_96 : 32; 97 uint32_t tlv64_padding : 32; 98 }; 99 100 101 102 103 104 105 106 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x0000000000000000 107 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_REO_CMD_NUMBER_LSB 0 108 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_REO_CMD_NUMBER_MSB 15 109 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_REO_CMD_NUMBER_MASK 0x000000000000ffff 110 111 112 113 114 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET 0x0000000000000000 115 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_REO_STATUS_REQUIRED_LSB 16 116 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_REO_STATUS_REQUIRED_MSB 16 117 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_REO_STATUS_REQUIRED_MASK 0x0000000000010000 118 119 120 121 122 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_RESERVED_0A_OFFSET 0x0000000000000000 123 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_RESERVED_0A_LSB 17 124 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_RESERVED_0A_MSB 31 125 #define REO_UPDATE_RX_REO_QUEUE_CMD_HEADER_RESERVED_0A_MASK 0x00000000fffe0000 126 127 128 129 130 #define REO_UPDATE_RX_REO_QUEUE_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x0000000000000000 131 #define REO_UPDATE_RX_REO_QUEUE_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 32 132 #define REO_UPDATE_RX_REO_QUEUE_RX_REO_QUEUE_DESC_ADDR_31_0_MSB 63 133 #define REO_UPDATE_RX_REO_QUEUE_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff00000000 134 135 136 137 138 #define REO_UPDATE_RX_REO_QUEUE_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x0000000000000008 139 #define REO_UPDATE_RX_REO_QUEUE_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 140 #define REO_UPDATE_RX_REO_QUEUE_RX_REO_QUEUE_DESC_ADDR_39_32_MSB 7 141 #define REO_UPDATE_RX_REO_QUEUE_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x00000000000000ff 142 143 144 145 146 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000000000000008 147 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_RECEIVE_QUEUE_NUMBER_LSB 8 148 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_RECEIVE_QUEUE_NUMBER_MSB 8 149 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_RECEIVE_QUEUE_NUMBER_MASK 0x0000000000000100 150 151 152 153 154 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_VLD_OFFSET 0x0000000000000008 155 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_VLD_LSB 9 156 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_VLD_MSB 9 157 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_VLD_MASK 0x0000000000000200 158 159 160 161 162 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x0000000000000008 163 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 10 164 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MSB 10 165 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x0000000000000400 166 167 168 169 170 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_DISABLE_DUPLICATE_DETECTION_OFFSET 0x0000000000000008 171 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_DISABLE_DUPLICATE_DETECTION_LSB 11 172 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_DISABLE_DUPLICATE_DETECTION_MSB 11 173 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_DISABLE_DUPLICATE_DETECTION_MASK 0x0000000000000800 174 175 176 177 178 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SOFT_REORDER_ENABLE_OFFSET 0x0000000000000008 179 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SOFT_REORDER_ENABLE_LSB 12 180 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SOFT_REORDER_ENABLE_MSB 12 181 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SOFT_REORDER_ENABLE_MASK 0x0000000000001000 182 183 184 185 186 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_AC_OFFSET 0x0000000000000008 187 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_AC_LSB 13 188 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_AC_MSB 13 189 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_AC_MASK 0x0000000000002000 190 191 192 193 194 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_BAR_OFFSET 0x0000000000000008 195 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_BAR_LSB 14 196 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_BAR_MSB 14 197 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_BAR_MASK 0x0000000000004000 198 199 200 201 202 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_RTY_OFFSET 0x0000000000000008 203 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_RTY_LSB 15 204 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_RTY_MSB 15 205 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_RTY_MASK 0x0000000000008000 206 207 208 209 210 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_CHK_2K_MODE_OFFSET 0x0000000000000008 211 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_CHK_2K_MODE_LSB 16 212 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_CHK_2K_MODE_MSB 16 213 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_CHK_2K_MODE_MASK 0x0000000000010000 214 215 216 217 218 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_OOR_MODE_OFFSET 0x0000000000000008 219 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_OOR_MODE_LSB 17 220 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_OOR_MODE_MSB 17 221 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_OOR_MODE_MASK 0x0000000000020000 222 223 224 225 226 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_BA_WINDOW_SIZE_OFFSET 0x0000000000000008 227 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_BA_WINDOW_SIZE_LSB 18 228 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_BA_WINDOW_SIZE_MSB 18 229 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_BA_WINDOW_SIZE_MASK 0x0000000000040000 230 231 232 233 234 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_CHECK_NEEDED_OFFSET 0x0000000000000008 235 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_CHECK_NEEDED_LSB 19 236 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_CHECK_NEEDED_MSB 19 237 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_CHECK_NEEDED_MASK 0x0000000000080000 238 239 240 241 242 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SHALL_BE_EVEN_OFFSET 0x0000000000000008 243 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SHALL_BE_EVEN_LSB 20 244 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SHALL_BE_EVEN_MSB 20 245 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SHALL_BE_EVEN_MASK 0x0000000000100000 246 247 248 249 250 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SHALL_BE_UNEVEN_OFFSET 0x0000000000000008 251 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SHALL_BE_UNEVEN_LSB 21 252 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SHALL_BE_UNEVEN_MSB 21 253 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SHALL_BE_UNEVEN_MASK 0x0000000000200000 254 255 256 257 258 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_HANDLING_ENABLE_OFFSET 0x0000000000000008 259 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_HANDLING_ENABLE_LSB 22 260 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_HANDLING_ENABLE_MSB 22 261 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_HANDLING_ENABLE_MASK 0x0000000000400000 262 263 264 265 266 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SIZE_OFFSET 0x0000000000000008 267 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SIZE_LSB 23 268 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SIZE_MSB 23 269 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_SIZE_MASK 0x0000000000800000 270 271 272 273 274 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_IGNORE_AMPDU_FLAG_OFFSET 0x0000000000000008 275 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_IGNORE_AMPDU_FLAG_LSB 24 276 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_IGNORE_AMPDU_FLAG_MSB 24 277 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_IGNORE_AMPDU_FLAG_MASK 0x0000000001000000 278 279 280 281 282 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SVLD_OFFSET 0x0000000000000008 283 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SVLD_LSB 25 284 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SVLD_MSB 25 285 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SVLD_MASK 0x0000000002000000 286 287 288 289 290 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SSN_OFFSET 0x0000000000000008 291 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SSN_LSB 26 292 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SSN_MSB 26 293 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SSN_MASK 0x0000000004000000 294 295 296 297 298 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x0000000000000008 299 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_LSB 27 300 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_MSB 27 301 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x0000000008000000 302 303 304 305 306 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_ERROR_DETECTED_FLAG_OFFSET 0x0000000000000008 307 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_ERROR_DETECTED_FLAG_LSB 28 308 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_ERROR_DETECTED_FLAG_MSB 28 309 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_ERROR_DETECTED_FLAG_MASK 0x0000000010000000 310 311 312 313 314 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_VALID_OFFSET 0x0000000000000008 315 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_VALID_LSB 29 316 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_VALID_MSB 29 317 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_VALID_MASK 0x0000000020000000 318 319 320 321 322 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_OFFSET 0x0000000000000008 323 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_LSB 30 324 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_MSB 30 325 #define REO_UPDATE_RX_REO_QUEUE_UPDATE_PN_MASK 0x0000000040000000 326 327 328 329 330 #define REO_UPDATE_RX_REO_QUEUE_CLEAR_STAT_COUNTERS_OFFSET 0x0000000000000008 331 #define REO_UPDATE_RX_REO_QUEUE_CLEAR_STAT_COUNTERS_LSB 31 332 #define REO_UPDATE_RX_REO_QUEUE_CLEAR_STAT_COUNTERS_MSB 31 333 #define REO_UPDATE_RX_REO_QUEUE_CLEAR_STAT_COUNTERS_MASK 0x0000000080000000 334 335 336 337 338 #define REO_UPDATE_RX_REO_QUEUE_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000000000000008 339 #define REO_UPDATE_RX_REO_QUEUE_RECEIVE_QUEUE_NUMBER_LSB 32 340 #define REO_UPDATE_RX_REO_QUEUE_RECEIVE_QUEUE_NUMBER_MSB 47 341 #define REO_UPDATE_RX_REO_QUEUE_RECEIVE_QUEUE_NUMBER_MASK 0x0000ffff00000000 342 343 344 345 346 #define REO_UPDATE_RX_REO_QUEUE_VLD_OFFSET 0x0000000000000008 347 #define REO_UPDATE_RX_REO_QUEUE_VLD_LSB 48 348 #define REO_UPDATE_RX_REO_QUEUE_VLD_MSB 48 349 #define REO_UPDATE_RX_REO_QUEUE_VLD_MASK 0x0001000000000000 350 351 352 353 354 #define REO_UPDATE_RX_REO_QUEUE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x0000000000000008 355 #define REO_UPDATE_RX_REO_QUEUE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 49 356 #define REO_UPDATE_RX_REO_QUEUE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MSB 50 357 #define REO_UPDATE_RX_REO_QUEUE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x0006000000000000 358 359 360 361 362 #define REO_UPDATE_RX_REO_QUEUE_DISABLE_DUPLICATE_DETECTION_OFFSET 0x0000000000000008 363 #define REO_UPDATE_RX_REO_QUEUE_DISABLE_DUPLICATE_DETECTION_LSB 51 364 #define REO_UPDATE_RX_REO_QUEUE_DISABLE_DUPLICATE_DETECTION_MSB 51 365 #define REO_UPDATE_RX_REO_QUEUE_DISABLE_DUPLICATE_DETECTION_MASK 0x0008000000000000 366 367 368 369 370 #define REO_UPDATE_RX_REO_QUEUE_SOFT_REORDER_ENABLE_OFFSET 0x0000000000000008 371 #define REO_UPDATE_RX_REO_QUEUE_SOFT_REORDER_ENABLE_LSB 52 372 #define REO_UPDATE_RX_REO_QUEUE_SOFT_REORDER_ENABLE_MSB 52 373 #define REO_UPDATE_RX_REO_QUEUE_SOFT_REORDER_ENABLE_MASK 0x0010000000000000 374 375 376 377 378 #define REO_UPDATE_RX_REO_QUEUE_AC_OFFSET 0x0000000000000008 379 #define REO_UPDATE_RX_REO_QUEUE_AC_LSB 53 380 #define REO_UPDATE_RX_REO_QUEUE_AC_MSB 54 381 #define REO_UPDATE_RX_REO_QUEUE_AC_MASK 0x0060000000000000 382 383 384 385 386 #define REO_UPDATE_RX_REO_QUEUE_BAR_OFFSET 0x0000000000000008 387 #define REO_UPDATE_RX_REO_QUEUE_BAR_LSB 55 388 #define REO_UPDATE_RX_REO_QUEUE_BAR_MSB 55 389 #define REO_UPDATE_RX_REO_QUEUE_BAR_MASK 0x0080000000000000 390 391 392 393 394 #define REO_UPDATE_RX_REO_QUEUE_RTY_OFFSET 0x0000000000000008 395 #define REO_UPDATE_RX_REO_QUEUE_RTY_LSB 56 396 #define REO_UPDATE_RX_REO_QUEUE_RTY_MSB 56 397 #define REO_UPDATE_RX_REO_QUEUE_RTY_MASK 0x0100000000000000 398 399 400 401 402 #define REO_UPDATE_RX_REO_QUEUE_CHK_2K_MODE_OFFSET 0x0000000000000008 403 #define REO_UPDATE_RX_REO_QUEUE_CHK_2K_MODE_LSB 57 404 #define REO_UPDATE_RX_REO_QUEUE_CHK_2K_MODE_MSB 57 405 #define REO_UPDATE_RX_REO_QUEUE_CHK_2K_MODE_MASK 0x0200000000000000 406 407 408 409 410 #define REO_UPDATE_RX_REO_QUEUE_OOR_MODE_OFFSET 0x0000000000000008 411 #define REO_UPDATE_RX_REO_QUEUE_OOR_MODE_LSB 58 412 #define REO_UPDATE_RX_REO_QUEUE_OOR_MODE_MSB 58 413 #define REO_UPDATE_RX_REO_QUEUE_OOR_MODE_MASK 0x0400000000000000 414 415 416 417 418 #define REO_UPDATE_RX_REO_QUEUE_PN_CHECK_NEEDED_OFFSET 0x0000000000000008 419 #define REO_UPDATE_RX_REO_QUEUE_PN_CHECK_NEEDED_LSB 59 420 #define REO_UPDATE_RX_REO_QUEUE_PN_CHECK_NEEDED_MSB 59 421 #define REO_UPDATE_RX_REO_QUEUE_PN_CHECK_NEEDED_MASK 0x0800000000000000 422 423 424 425 426 #define REO_UPDATE_RX_REO_QUEUE_PN_SHALL_BE_EVEN_OFFSET 0x0000000000000008 427 #define REO_UPDATE_RX_REO_QUEUE_PN_SHALL_BE_EVEN_LSB 60 428 #define REO_UPDATE_RX_REO_QUEUE_PN_SHALL_BE_EVEN_MSB 60 429 #define REO_UPDATE_RX_REO_QUEUE_PN_SHALL_BE_EVEN_MASK 0x1000000000000000 430 431 432 433 434 #define REO_UPDATE_RX_REO_QUEUE_PN_SHALL_BE_UNEVEN_OFFSET 0x0000000000000008 435 #define REO_UPDATE_RX_REO_QUEUE_PN_SHALL_BE_UNEVEN_LSB 61 436 #define REO_UPDATE_RX_REO_QUEUE_PN_SHALL_BE_UNEVEN_MSB 61 437 #define REO_UPDATE_RX_REO_QUEUE_PN_SHALL_BE_UNEVEN_MASK 0x2000000000000000 438 439 440 441 442 #define REO_UPDATE_RX_REO_QUEUE_PN_HANDLING_ENABLE_OFFSET 0x0000000000000008 443 #define REO_UPDATE_RX_REO_QUEUE_PN_HANDLING_ENABLE_LSB 62 444 #define REO_UPDATE_RX_REO_QUEUE_PN_HANDLING_ENABLE_MSB 62 445 #define REO_UPDATE_RX_REO_QUEUE_PN_HANDLING_ENABLE_MASK 0x4000000000000000 446 447 448 449 450 #define REO_UPDATE_RX_REO_QUEUE_IGNORE_AMPDU_FLAG_OFFSET 0x0000000000000008 451 #define REO_UPDATE_RX_REO_QUEUE_IGNORE_AMPDU_FLAG_LSB 63 452 #define REO_UPDATE_RX_REO_QUEUE_IGNORE_AMPDU_FLAG_MSB 63 453 #define REO_UPDATE_RX_REO_QUEUE_IGNORE_AMPDU_FLAG_MASK 0x8000000000000000 454 455 456 457 458 #define REO_UPDATE_RX_REO_QUEUE_BA_WINDOW_SIZE_OFFSET 0x0000000000000010 459 #define REO_UPDATE_RX_REO_QUEUE_BA_WINDOW_SIZE_LSB 0 460 #define REO_UPDATE_RX_REO_QUEUE_BA_WINDOW_SIZE_MSB 9 461 #define REO_UPDATE_RX_REO_QUEUE_BA_WINDOW_SIZE_MASK 0x00000000000003ff 462 463 464 465 466 #define REO_UPDATE_RX_REO_QUEUE_PN_SIZE_OFFSET 0x0000000000000010 467 #define REO_UPDATE_RX_REO_QUEUE_PN_SIZE_LSB 10 468 #define REO_UPDATE_RX_REO_QUEUE_PN_SIZE_MSB 11 469 #define REO_UPDATE_RX_REO_QUEUE_PN_SIZE_MASK 0x0000000000000c00 470 471 472 473 474 #define REO_UPDATE_RX_REO_QUEUE_SVLD_OFFSET 0x0000000000000010 475 #define REO_UPDATE_RX_REO_QUEUE_SVLD_LSB 12 476 #define REO_UPDATE_RX_REO_QUEUE_SVLD_MSB 12 477 #define REO_UPDATE_RX_REO_QUEUE_SVLD_MASK 0x0000000000001000 478 479 480 481 482 #define REO_UPDATE_RX_REO_QUEUE_SSN_OFFSET 0x0000000000000010 483 #define REO_UPDATE_RX_REO_QUEUE_SSN_LSB 13 484 #define REO_UPDATE_RX_REO_QUEUE_SSN_MSB 24 485 #define REO_UPDATE_RX_REO_QUEUE_SSN_MASK 0x0000000001ffe000 486 487 488 489 490 #define REO_UPDATE_RX_REO_QUEUE_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x0000000000000010 491 #define REO_UPDATE_RX_REO_QUEUE_SEQ_2K_ERROR_DETECTED_FLAG_LSB 25 492 #define REO_UPDATE_RX_REO_QUEUE_SEQ_2K_ERROR_DETECTED_FLAG_MSB 25 493 #define REO_UPDATE_RX_REO_QUEUE_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x0000000002000000 494 495 496 497 498 #define REO_UPDATE_RX_REO_QUEUE_PN_ERROR_DETECTED_FLAG_OFFSET 0x0000000000000010 499 #define REO_UPDATE_RX_REO_QUEUE_PN_ERROR_DETECTED_FLAG_LSB 26 500 #define REO_UPDATE_RX_REO_QUEUE_PN_ERROR_DETECTED_FLAG_MSB 26 501 #define REO_UPDATE_RX_REO_QUEUE_PN_ERROR_DETECTED_FLAG_MASK 0x0000000004000000 502 503 504 505 506 #define REO_UPDATE_RX_REO_QUEUE_PN_VALID_OFFSET 0x0000000000000010 507 #define REO_UPDATE_RX_REO_QUEUE_PN_VALID_LSB 27 508 #define REO_UPDATE_RX_REO_QUEUE_PN_VALID_MSB 27 509 #define REO_UPDATE_RX_REO_QUEUE_PN_VALID_MASK 0x0000000008000000 510 511 512 513 514 #define REO_UPDATE_RX_REO_QUEUE_FLUSH_FROM_CACHE_OFFSET 0x0000000000000010 515 #define REO_UPDATE_RX_REO_QUEUE_FLUSH_FROM_CACHE_LSB 28 516 #define REO_UPDATE_RX_REO_QUEUE_FLUSH_FROM_CACHE_MSB 28 517 #define REO_UPDATE_RX_REO_QUEUE_FLUSH_FROM_CACHE_MASK 0x0000000010000000 518 519 520 521 522 #define REO_UPDATE_RX_REO_QUEUE_RESERVED_4A_OFFSET 0x0000000000000010 523 #define REO_UPDATE_RX_REO_QUEUE_RESERVED_4A_LSB 29 524 #define REO_UPDATE_RX_REO_QUEUE_RESERVED_4A_MSB 31 525 #define REO_UPDATE_RX_REO_QUEUE_RESERVED_4A_MASK 0x00000000e0000000 526 527 528 529 530 #define REO_UPDATE_RX_REO_QUEUE_PN_31_0_OFFSET 0x0000000000000010 531 #define REO_UPDATE_RX_REO_QUEUE_PN_31_0_LSB 32 532 #define REO_UPDATE_RX_REO_QUEUE_PN_31_0_MSB 63 533 #define REO_UPDATE_RX_REO_QUEUE_PN_31_0_MASK 0xffffffff00000000 534 535 536 537 538 #define REO_UPDATE_RX_REO_QUEUE_PN_63_32_OFFSET 0x0000000000000018 539 #define REO_UPDATE_RX_REO_QUEUE_PN_63_32_LSB 0 540 #define REO_UPDATE_RX_REO_QUEUE_PN_63_32_MSB 31 541 #define REO_UPDATE_RX_REO_QUEUE_PN_63_32_MASK 0x00000000ffffffff 542 543 544 545 546 #define REO_UPDATE_RX_REO_QUEUE_PN_95_64_OFFSET 0x0000000000000018 547 #define REO_UPDATE_RX_REO_QUEUE_PN_95_64_LSB 32 548 #define REO_UPDATE_RX_REO_QUEUE_PN_95_64_MSB 63 549 #define REO_UPDATE_RX_REO_QUEUE_PN_95_64_MASK 0xffffffff00000000 550 551 552 553 554 #define REO_UPDATE_RX_REO_QUEUE_PN_127_96_OFFSET 0x0000000000000020 555 #define REO_UPDATE_RX_REO_QUEUE_PN_127_96_LSB 0 556 #define REO_UPDATE_RX_REO_QUEUE_PN_127_96_MSB 31 557 #define REO_UPDATE_RX_REO_QUEUE_PN_127_96_MASK 0x00000000ffffffff 558 559 560 561 562 #define REO_UPDATE_RX_REO_QUEUE_TLV64_PADDING_OFFSET 0x0000000000000020 563 #define REO_UPDATE_RX_REO_QUEUE_TLV64_PADDING_LSB 32 564 #define REO_UPDATE_RX_REO_QUEUE_TLV64_PADDING_MSB 63 565 #define REO_UPDATE_RX_REO_QUEUE_TLV64_PADDING_MASK 0xffffffff00000000 566 567 568 569 #endif 570