1 2 /* 3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 23 24 25 26 27 28 29 30 #ifndef _REO_UPDATE_RX_REO_QUEUE_STATUS_H_ 31 #define _REO_UPDATE_RX_REO_QUEUE_STATUS_H_ 32 #if !defined(__ASSEMBLER__) 33 #endif 34 35 #include "uniform_reo_status_header.h" 36 #define NUM_OF_DWORDS_REO_UPDATE_RX_REO_QUEUE_STATUS 26 37 38 #define NUM_OF_QWORDS_REO_UPDATE_RX_REO_QUEUE_STATUS 13 39 40 41 struct reo_update_rx_reo_queue_status { 42 struct uniform_reo_status_header status_header; 43 uint32_t reserved_2a : 32; 44 uint32_t reserved_3a : 32; 45 uint32_t reserved_4a : 32; 46 uint32_t reserved_5a : 32; 47 uint32_t reserved_6a : 32; 48 uint32_t reserved_7a : 32; 49 uint32_t reserved_8a : 32; 50 uint32_t reserved_9a : 32; 51 uint32_t reserved_10a : 32; 52 uint32_t reserved_11a : 32; 53 uint32_t reserved_12a : 32; 54 uint32_t reserved_13a : 32; 55 uint32_t reserved_14a : 32; 56 uint32_t reserved_15a : 32; 57 uint32_t reserved_16a : 32; 58 uint32_t reserved_17a : 32; 59 uint32_t reserved_18a : 32; 60 uint32_t reserved_19a : 32; 61 uint32_t reserved_20a : 32; 62 uint32_t reserved_21a : 32; 63 uint32_t reserved_22a : 32; 64 uint32_t reserved_23a : 32; 65 uint32_t reserved_24a : 32; 66 uint32_t reserved_25a : 28, 67 looping_count : 4; 68 }; 69 70 71 72 73 74 75 76 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET 0x0000000000000000 77 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_LSB 0 78 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_MSB 15 79 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_MASK 0x000000000000ffff 80 81 82 83 84 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET 0x0000000000000000 85 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_LSB 16 86 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_MSB 25 87 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_MASK 0x0000000003ff0000 88 89 90 91 92 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET 0x0000000000000000 93 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB 26 94 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MSB 27 95 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK 0x000000000c000000 96 97 98 99 100 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_RESERVED_0A_OFFSET 0x0000000000000000 101 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_RESERVED_0A_LSB 28 102 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_RESERVED_0A_MSB 31 103 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_RESERVED_0A_MASK 0x00000000f0000000 104 105 106 107 108 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_TIMESTAMP_OFFSET 0x0000000000000000 109 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_TIMESTAMP_LSB 32 110 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_TIMESTAMP_MSB 63 111 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_TIMESTAMP_MASK 0xffffffff00000000 112 113 114 115 116 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_2A_OFFSET 0x0000000000000008 117 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_2A_LSB 0 118 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_2A_MSB 31 119 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_2A_MASK 0x00000000ffffffff 120 121 122 123 124 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_3A_OFFSET 0x0000000000000008 125 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_3A_LSB 32 126 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_3A_MSB 63 127 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_3A_MASK 0xffffffff00000000 128 129 130 131 132 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_4A_OFFSET 0x0000000000000010 133 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_4A_LSB 0 134 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_4A_MSB 31 135 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_4A_MASK 0x00000000ffffffff 136 137 138 139 140 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_5A_OFFSET 0x0000000000000010 141 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_5A_LSB 32 142 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_5A_MSB 63 143 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_5A_MASK 0xffffffff00000000 144 145 146 147 148 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_6A_OFFSET 0x0000000000000018 149 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_6A_LSB 0 150 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_6A_MSB 31 151 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_6A_MASK 0x00000000ffffffff 152 153 154 155 156 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_7A_OFFSET 0x0000000000000018 157 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_7A_LSB 32 158 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_7A_MSB 63 159 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_7A_MASK 0xffffffff00000000 160 161 162 163 164 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_8A_OFFSET 0x0000000000000020 165 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_8A_LSB 0 166 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_8A_MSB 31 167 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_8A_MASK 0x00000000ffffffff 168 169 170 171 172 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_9A_OFFSET 0x0000000000000020 173 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_9A_LSB 32 174 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_9A_MSB 63 175 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_9A_MASK 0xffffffff00000000 176 177 178 179 180 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_10A_OFFSET 0x0000000000000028 181 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_10A_LSB 0 182 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_10A_MSB 31 183 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_10A_MASK 0x00000000ffffffff 184 185 186 187 188 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_11A_OFFSET 0x0000000000000028 189 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_11A_LSB 32 190 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_11A_MSB 63 191 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_11A_MASK 0xffffffff00000000 192 193 194 195 196 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_12A_OFFSET 0x0000000000000030 197 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_12A_LSB 0 198 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_12A_MSB 31 199 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_12A_MASK 0x00000000ffffffff 200 201 202 203 204 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_13A_OFFSET 0x0000000000000030 205 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_13A_LSB 32 206 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_13A_MSB 63 207 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_13A_MASK 0xffffffff00000000 208 209 210 211 212 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_14A_OFFSET 0x0000000000000038 213 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_14A_LSB 0 214 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_14A_MSB 31 215 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_14A_MASK 0x00000000ffffffff 216 217 218 219 220 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_15A_OFFSET 0x0000000000000038 221 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_15A_LSB 32 222 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_15A_MSB 63 223 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_15A_MASK 0xffffffff00000000 224 225 226 227 228 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_16A_OFFSET 0x0000000000000040 229 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_16A_LSB 0 230 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_16A_MSB 31 231 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_16A_MASK 0x00000000ffffffff 232 233 234 235 236 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_17A_OFFSET 0x0000000000000040 237 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_17A_LSB 32 238 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_17A_MSB 63 239 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_17A_MASK 0xffffffff00000000 240 241 242 243 244 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_18A_OFFSET 0x0000000000000048 245 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_18A_LSB 0 246 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_18A_MSB 31 247 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_18A_MASK 0x00000000ffffffff 248 249 250 251 252 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_19A_OFFSET 0x0000000000000048 253 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_19A_LSB 32 254 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_19A_MSB 63 255 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_19A_MASK 0xffffffff00000000 256 257 258 259 260 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_20A_OFFSET 0x0000000000000050 261 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_20A_LSB 0 262 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_20A_MSB 31 263 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_20A_MASK 0x00000000ffffffff 264 265 266 267 268 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_21A_OFFSET 0x0000000000000050 269 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_21A_LSB 32 270 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_21A_MSB 63 271 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_21A_MASK 0xffffffff00000000 272 273 274 275 276 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_22A_OFFSET 0x0000000000000058 277 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_22A_LSB 0 278 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_22A_MSB 31 279 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_22A_MASK 0x00000000ffffffff 280 281 282 283 284 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_23A_OFFSET 0x0000000000000058 285 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_23A_LSB 32 286 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_23A_MSB 63 287 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_23A_MASK 0xffffffff00000000 288 289 290 291 292 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_24A_OFFSET 0x0000000000000060 293 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_24A_LSB 0 294 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_24A_MSB 31 295 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_24A_MASK 0x00000000ffffffff 296 297 298 299 300 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_25A_OFFSET 0x0000000000000060 301 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_25A_LSB 32 302 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_25A_MSB 59 303 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_25A_MASK 0x0fffffff00000000 304 305 306 307 308 #define REO_UPDATE_RX_REO_QUEUE_STATUS_LOOPING_COUNT_OFFSET 0x0000000000000060 309 #define REO_UPDATE_RX_REO_QUEUE_STATUS_LOOPING_COUNT_LSB 60 310 #define REO_UPDATE_RX_REO_QUEUE_STATUS_LOOPING_COUNT_MSB 63 311 #define REO_UPDATE_RX_REO_QUEUE_STATUS_LOOPING_COUNT_MASK 0xf000000000000000 312 313 314 315 #endif 316