xref: /wlan-driver/fw-api/hw/kiwi/v1/rx_msdu_start.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /*
3  * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 
21 
22 
23 
24 
25 
26 
27 
28 
29 
30 #ifndef _RX_MSDU_START_H_
31 #define _RX_MSDU_START_H_
32 #if !defined(__ASSEMBLER__)
33 #endif
34 
35 #define NUM_OF_DWORDS_RX_MSDU_START 10
36 
37 #define NUM_OF_QWORDS_RX_MSDU_START 5
38 
39 
40 struct rx_msdu_start {
41 	     uint32_t rxpcu_mpdu_filter_in_category                           :  2,
42 		      sw_frame_group_id                                       :  7,
43 		      reserved_0                                              :  7,
44 		      phy_ppdu_id                                             : 16;
45 	     uint32_t msdu_length                                             : 14,
46 		      stbc                                                    :  1,
47 		      ipsec_esp                                               :  1,
48 		      l3_offset                                               :  7,
49 		      ipsec_ah                                                :  1,
50 		      l4_offset                                               :  8;
51 	     uint32_t msdu_number                                             :  8,
52 		      decap_format                                            :  2,
53 		      ipv4_proto                                              :  1,
54 		      ipv6_proto                                              :  1,
55 		      tcp_proto                                               :  1,
56 		      udp_proto                                               :  1,
57 		      ip_frag                                                 :  1,
58 		      tcp_only_ack                                            :  1,
59 		      da_is_bcast_mcast                                       :  1,
60 		      toeplitz_hash_sel                                       :  2,
61 		      ip_fixed_header_valid                                   :  1,
62 		      ip_extn_header_valid                                    :  1,
63 		      tcp_udp_header_valid                                    :  1,
64 		      mesh_control_present                                    :  1,
65 		      ldpc                                                    :  1,
66 		      ip4_protocol_ip6_next_header                            :  8;
67 	     uint32_t toeplitz_hash_2_or_4                                    : 32;
68 	     uint32_t flow_id_toeplitz                                        : 32;
69 	     uint32_t user_rssi                                               :  8,
70 		      pkt_type                                                :  4,
71 		      sgi                                                     :  2,
72 		      rate_mcs                                                :  4,
73 		      receive_bandwidth                                       :  3,
74 		      reception_type                                          :  3,
75 		      mimo_ss_bitmap                                          :  8;
76 	     uint32_t ppdu_start_timestamp_31_0                               : 32;
77 	     uint32_t ppdu_start_timestamp_63_32                              : 32;
78 	     uint32_t sw_phy_meta_data                                        : 32;
79 	     uint32_t vlan_ctag_ci                                            : 16,
80 		      vlan_stag_ci                                            : 16;
81 };
82 
83 
84 
85 
86 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET                          0x0000000000000000
87 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB                             0
88 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_MSB                             1
89 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK                            0x0000000000000003
90 
91 
92 
93 
94 #define RX_MSDU_START_SW_FRAME_GROUP_ID_OFFSET                                      0x0000000000000000
95 #define RX_MSDU_START_SW_FRAME_GROUP_ID_LSB                                         2
96 #define RX_MSDU_START_SW_FRAME_GROUP_ID_MSB                                         8
97 #define RX_MSDU_START_SW_FRAME_GROUP_ID_MASK                                        0x00000000000001fc
98 
99 
100 
101 
102 #define RX_MSDU_START_RESERVED_0_OFFSET                                             0x0000000000000000
103 #define RX_MSDU_START_RESERVED_0_LSB                                                9
104 #define RX_MSDU_START_RESERVED_0_MSB                                                15
105 #define RX_MSDU_START_RESERVED_0_MASK                                               0x000000000000fe00
106 
107 
108 
109 
110 #define RX_MSDU_START_PHY_PPDU_ID_OFFSET                                            0x0000000000000000
111 #define RX_MSDU_START_PHY_PPDU_ID_LSB                                               16
112 #define RX_MSDU_START_PHY_PPDU_ID_MSB                                               31
113 #define RX_MSDU_START_PHY_PPDU_ID_MASK                                              0x00000000ffff0000
114 
115 
116 
117 
118 #define RX_MSDU_START_MSDU_LENGTH_OFFSET                                            0x0000000000000000
119 #define RX_MSDU_START_MSDU_LENGTH_LSB                                               32
120 #define RX_MSDU_START_MSDU_LENGTH_MSB                                               45
121 #define RX_MSDU_START_MSDU_LENGTH_MASK                                              0x00003fff00000000
122 
123 
124 
125 
126 #define RX_MSDU_START_STBC_OFFSET                                                   0x0000000000000000
127 #define RX_MSDU_START_STBC_LSB                                                      46
128 #define RX_MSDU_START_STBC_MSB                                                      46
129 #define RX_MSDU_START_STBC_MASK                                                     0x0000400000000000
130 
131 
132 
133 
134 #define RX_MSDU_START_IPSEC_ESP_OFFSET                                              0x0000000000000000
135 #define RX_MSDU_START_IPSEC_ESP_LSB                                                 47
136 #define RX_MSDU_START_IPSEC_ESP_MSB                                                 47
137 #define RX_MSDU_START_IPSEC_ESP_MASK                                                0x0000800000000000
138 
139 
140 
141 
142 #define RX_MSDU_START_L3_OFFSET_OFFSET                                              0x0000000000000000
143 #define RX_MSDU_START_L3_OFFSET_LSB                                                 48
144 #define RX_MSDU_START_L3_OFFSET_MSB                                                 54
145 #define RX_MSDU_START_L3_OFFSET_MASK                                                0x007f000000000000
146 
147 
148 
149 
150 #define RX_MSDU_START_IPSEC_AH_OFFSET                                               0x0000000000000000
151 #define RX_MSDU_START_IPSEC_AH_LSB                                                  55
152 #define RX_MSDU_START_IPSEC_AH_MSB                                                  55
153 #define RX_MSDU_START_IPSEC_AH_MASK                                                 0x0080000000000000
154 
155 
156 
157 
158 #define RX_MSDU_START_L4_OFFSET_OFFSET                                              0x0000000000000000
159 #define RX_MSDU_START_L4_OFFSET_LSB                                                 56
160 #define RX_MSDU_START_L4_OFFSET_MSB                                                 63
161 #define RX_MSDU_START_L4_OFFSET_MASK                                                0xff00000000000000
162 
163 
164 
165 
166 #define RX_MSDU_START_MSDU_NUMBER_OFFSET                                            0x0000000000000008
167 #define RX_MSDU_START_MSDU_NUMBER_LSB                                               0
168 #define RX_MSDU_START_MSDU_NUMBER_MSB                                               7
169 #define RX_MSDU_START_MSDU_NUMBER_MASK                                              0x00000000000000ff
170 
171 
172 
173 
174 #define RX_MSDU_START_DECAP_FORMAT_OFFSET                                           0x0000000000000008
175 #define RX_MSDU_START_DECAP_FORMAT_LSB                                              8
176 #define RX_MSDU_START_DECAP_FORMAT_MSB                                              9
177 #define RX_MSDU_START_DECAP_FORMAT_MASK                                             0x0000000000000300
178 
179 
180 
181 
182 #define RX_MSDU_START_IPV4_PROTO_OFFSET                                             0x0000000000000008
183 #define RX_MSDU_START_IPV4_PROTO_LSB                                                10
184 #define RX_MSDU_START_IPV4_PROTO_MSB                                                10
185 #define RX_MSDU_START_IPV4_PROTO_MASK                                               0x0000000000000400
186 
187 
188 
189 
190 #define RX_MSDU_START_IPV6_PROTO_OFFSET                                             0x0000000000000008
191 #define RX_MSDU_START_IPV6_PROTO_LSB                                                11
192 #define RX_MSDU_START_IPV6_PROTO_MSB                                                11
193 #define RX_MSDU_START_IPV6_PROTO_MASK                                               0x0000000000000800
194 
195 
196 
197 
198 #define RX_MSDU_START_TCP_PROTO_OFFSET                                              0x0000000000000008
199 #define RX_MSDU_START_TCP_PROTO_LSB                                                 12
200 #define RX_MSDU_START_TCP_PROTO_MSB                                                 12
201 #define RX_MSDU_START_TCP_PROTO_MASK                                                0x0000000000001000
202 
203 
204 
205 
206 #define RX_MSDU_START_UDP_PROTO_OFFSET                                              0x0000000000000008
207 #define RX_MSDU_START_UDP_PROTO_LSB                                                 13
208 #define RX_MSDU_START_UDP_PROTO_MSB                                                 13
209 #define RX_MSDU_START_UDP_PROTO_MASK                                                0x0000000000002000
210 
211 
212 
213 
214 #define RX_MSDU_START_IP_FRAG_OFFSET                                                0x0000000000000008
215 #define RX_MSDU_START_IP_FRAG_LSB                                                   14
216 #define RX_MSDU_START_IP_FRAG_MSB                                                   14
217 #define RX_MSDU_START_IP_FRAG_MASK                                                  0x0000000000004000
218 
219 
220 
221 
222 #define RX_MSDU_START_TCP_ONLY_ACK_OFFSET                                           0x0000000000000008
223 #define RX_MSDU_START_TCP_ONLY_ACK_LSB                                              15
224 #define RX_MSDU_START_TCP_ONLY_ACK_MSB                                              15
225 #define RX_MSDU_START_TCP_ONLY_ACK_MASK                                             0x0000000000008000
226 
227 
228 
229 
230 #define RX_MSDU_START_DA_IS_BCAST_MCAST_OFFSET                                      0x0000000000000008
231 #define RX_MSDU_START_DA_IS_BCAST_MCAST_LSB                                         16
232 #define RX_MSDU_START_DA_IS_BCAST_MCAST_MSB                                         16
233 #define RX_MSDU_START_DA_IS_BCAST_MCAST_MASK                                        0x0000000000010000
234 
235 
236 
237 
238 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_OFFSET                                      0x0000000000000008
239 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_LSB                                         17
240 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_MSB                                         18
241 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_MASK                                        0x0000000000060000
242 
243 
244 
245 
246 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_OFFSET                                  0x0000000000000008
247 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_LSB                                     19
248 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_MSB                                     19
249 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_MASK                                    0x0000000000080000
250 
251 
252 
253 
254 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_OFFSET                                   0x0000000000000008
255 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_LSB                                      20
256 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_MSB                                      20
257 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_MASK                                     0x0000000000100000
258 
259 
260 
261 
262 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_OFFSET                                   0x0000000000000008
263 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_LSB                                      21
264 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_MSB                                      21
265 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_MASK                                     0x0000000000200000
266 
267 
268 
269 
270 #define RX_MSDU_START_MESH_CONTROL_PRESENT_OFFSET                                   0x0000000000000008
271 #define RX_MSDU_START_MESH_CONTROL_PRESENT_LSB                                      22
272 #define RX_MSDU_START_MESH_CONTROL_PRESENT_MSB                                      22
273 #define RX_MSDU_START_MESH_CONTROL_PRESENT_MASK                                     0x0000000000400000
274 
275 
276 
277 
278 #define RX_MSDU_START_LDPC_OFFSET                                                   0x0000000000000008
279 #define RX_MSDU_START_LDPC_LSB                                                      23
280 #define RX_MSDU_START_LDPC_MSB                                                      23
281 #define RX_MSDU_START_LDPC_MASK                                                     0x0000000000800000
282 
283 
284 
285 
286 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_OFFSET                           0x0000000000000008
287 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_LSB                              24
288 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_MSB                              31
289 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_MASK                             0x00000000ff000000
290 
291 
292 
293 
294 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_OFFSET                                   0x0000000000000008
295 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_LSB                                      32
296 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_MSB                                      63
297 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_MASK                                     0xffffffff00000000
298 
299 
300 
301 
302 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_OFFSET                                       0x0000000000000010
303 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_LSB                                          0
304 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_MSB                                          31
305 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_MASK                                         0x00000000ffffffff
306 
307 
308 
309 
310 #define RX_MSDU_START_USER_RSSI_OFFSET                                              0x0000000000000010
311 #define RX_MSDU_START_USER_RSSI_LSB                                                 32
312 #define RX_MSDU_START_USER_RSSI_MSB                                                 39
313 #define RX_MSDU_START_USER_RSSI_MASK                                                0x000000ff00000000
314 
315 
316 
317 
318 #define RX_MSDU_START_PKT_TYPE_OFFSET                                               0x0000000000000010
319 #define RX_MSDU_START_PKT_TYPE_LSB                                                  40
320 #define RX_MSDU_START_PKT_TYPE_MSB                                                  43
321 #define RX_MSDU_START_PKT_TYPE_MASK                                                 0x00000f0000000000
322 
323 
324 
325 
326 #define RX_MSDU_START_SGI_OFFSET                                                    0x0000000000000010
327 #define RX_MSDU_START_SGI_LSB                                                       44
328 #define RX_MSDU_START_SGI_MSB                                                       45
329 #define RX_MSDU_START_SGI_MASK                                                      0x0000300000000000
330 
331 
332 
333 
334 #define RX_MSDU_START_RATE_MCS_OFFSET                                               0x0000000000000010
335 #define RX_MSDU_START_RATE_MCS_LSB                                                  46
336 #define RX_MSDU_START_RATE_MCS_MSB                                                  49
337 #define RX_MSDU_START_RATE_MCS_MASK                                                 0x0003c00000000000
338 
339 
340 
341 
342 #define RX_MSDU_START_RECEIVE_BANDWIDTH_OFFSET                                      0x0000000000000010
343 #define RX_MSDU_START_RECEIVE_BANDWIDTH_LSB                                         50
344 #define RX_MSDU_START_RECEIVE_BANDWIDTH_MSB                                         52
345 #define RX_MSDU_START_RECEIVE_BANDWIDTH_MASK                                        0x001c000000000000
346 
347 
348 
349 
350 #define RX_MSDU_START_RECEPTION_TYPE_OFFSET                                         0x0000000000000010
351 #define RX_MSDU_START_RECEPTION_TYPE_LSB                                            53
352 #define RX_MSDU_START_RECEPTION_TYPE_MSB                                            55
353 #define RX_MSDU_START_RECEPTION_TYPE_MASK                                           0x00e0000000000000
354 
355 
356 
357 
358 #define RX_MSDU_START_MIMO_SS_BITMAP_OFFSET                                         0x0000000000000010
359 #define RX_MSDU_START_MIMO_SS_BITMAP_LSB                                            56
360 #define RX_MSDU_START_MIMO_SS_BITMAP_MSB                                            63
361 #define RX_MSDU_START_MIMO_SS_BITMAP_MASK                                           0xff00000000000000
362 
363 
364 
365 
366 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_OFFSET                              0x0000000000000018
367 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_LSB                                 0
368 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_MSB                                 31
369 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_MASK                                0x00000000ffffffff
370 
371 
372 
373 
374 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_OFFSET                             0x0000000000000018
375 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_LSB                                32
376 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_MSB                                63
377 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_MASK                               0xffffffff00000000
378 
379 
380 
381 
382 #define RX_MSDU_START_SW_PHY_META_DATA_OFFSET                                       0x0000000000000020
383 #define RX_MSDU_START_SW_PHY_META_DATA_LSB                                          0
384 #define RX_MSDU_START_SW_PHY_META_DATA_MSB                                          31
385 #define RX_MSDU_START_SW_PHY_META_DATA_MASK                                         0x00000000ffffffff
386 
387 
388 
389 
390 #define RX_MSDU_START_VLAN_CTAG_CI_OFFSET                                           0x0000000000000020
391 #define RX_MSDU_START_VLAN_CTAG_CI_LSB                                              32
392 #define RX_MSDU_START_VLAN_CTAG_CI_MSB                                              47
393 #define RX_MSDU_START_VLAN_CTAG_CI_MASK                                             0x0000ffff00000000
394 
395 
396 
397 
398 #define RX_MSDU_START_VLAN_STAG_CI_OFFSET                                           0x0000000000000020
399 #define RX_MSDU_START_VLAN_STAG_CI_LSB                                              48
400 #define RX_MSDU_START_VLAN_STAG_CI_MSB                                              63
401 #define RX_MSDU_START_VLAN_STAG_CI_MASK                                             0xffff000000000000
402 
403 
404 
405 #endif
406