xref: /wlan-driver/fw-api/hw/kiwi/v1/rx_ppdu_end_user_stats_ext.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /*
3  * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 
21 
22 
23 
24 
25 
26 
27 
28 
29 
30 #ifndef _RX_PPDU_END_USER_STATS_EXT_H_
31 #define _RX_PPDU_END_USER_STATS_EXT_H_
32 #if !defined(__ASSEMBLER__)
33 #endif
34 
35 #include "rx_rxpcu_classification_overview.h"
36 #define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS_EXT 8
37 
38 #define NUM_OF_QWORDS_RX_PPDU_END_USER_STATS_EXT 4
39 
40 
41 struct rx_ppdu_end_user_stats_ext {
42 	     struct   rx_rxpcu_classification_overview                          rxpcu_classification_details;
43 	     uint32_t fcs_ok_bitmap_95_64                                     : 32;
44 	     uint32_t fcs_ok_bitmap_127_96                                    : 32;
45 	     uint32_t fcs_ok_bitmap_159_128                                   : 32;
46 	     uint32_t fcs_ok_bitmap_191_160                                   : 32;
47 	     uint32_t fcs_ok_bitmap_223_192                                   : 32;
48 	     uint32_t fcs_ok_bitmap_255_224                                   : 32;
49 	     uint32_t corrupted_due_to_fifo_delay                             :  1,
50 		      reserved_7a                                             : 31;
51 };
52 
53 
54 
55 
56 
57 
58 
59 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_OFFSET 0x0000000000000000
60 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_LSB 0
61 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_MSB 0
62 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_MASK 0x0000000000000001
63 
64 
65 
66 
67 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x0000000000000000
68 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_LSB 1
69 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_MSB 1
70 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_MASK 0x0000000000000002
71 
72 
73 
74 
75 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_OFFSET 0x0000000000000000
76 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_LSB 2
77 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_MSB 2
78 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_MASK 0x0000000000000004
79 
80 
81 
82 
83 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x0000000000000000
84 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3
85 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_MSB 3
86 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x0000000000000008
87 
88 
89 
90 
91 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_OFFSET 0x0000000000000000
92 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_LSB 4
93 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_MSB 4
94 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_MASK 0x0000000000000010
95 
96 
97 
98 
99 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x0000000000000000
100 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5
101 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_MSB 5
102 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x0000000000000020
103 
104 
105 
106 
107 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_OFFSET 0x0000000000000000
108 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_LSB 6
109 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_MSB 6
110 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_MASK 0x0000000000000040
111 
112 
113 
114 
115 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_OFFSET   0x0000000000000000
116 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_LSB      7
117 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_MSB      15
118 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_MASK     0x000000000000ff80
119 
120 
121 
122 
123 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_OFFSET  0x0000000000000000
124 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_LSB     16
125 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_MSB     31
126 #define RX_PPDU_END_USER_STATS_EXT_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_MASK    0x00000000ffff0000
127 
128 
129 
130 
131 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_95_64_OFFSET                       0x0000000000000000
132 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_95_64_LSB                          32
133 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_95_64_MSB                          63
134 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_95_64_MASK                         0xffffffff00000000
135 
136 
137 
138 
139 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_127_96_OFFSET                      0x0000000000000008
140 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_127_96_LSB                         0
141 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_127_96_MSB                         31
142 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_127_96_MASK                        0x00000000ffffffff
143 
144 
145 
146 
147 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_159_128_OFFSET                     0x0000000000000008
148 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_159_128_LSB                        32
149 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_159_128_MSB                        63
150 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_159_128_MASK                       0xffffffff00000000
151 
152 
153 
154 
155 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_191_160_OFFSET                     0x0000000000000010
156 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_191_160_LSB                        0
157 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_191_160_MSB                        31
158 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_191_160_MASK                       0x00000000ffffffff
159 
160 
161 
162 
163 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_223_192_OFFSET                     0x0000000000000010
164 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_223_192_LSB                        32
165 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_223_192_MSB                        63
166 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_223_192_MASK                       0xffffffff00000000
167 
168 
169 
170 
171 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_255_224_OFFSET                     0x0000000000000018
172 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_255_224_LSB                        0
173 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_255_224_MSB                        31
174 #define RX_PPDU_END_USER_STATS_EXT_FCS_OK_BITMAP_255_224_MASK                       0x00000000ffffffff
175 
176 
177 
178 
179 #define RX_PPDU_END_USER_STATS_EXT_CORRUPTED_DUE_TO_FIFO_DELAY_OFFSET               0x0000000000000018
180 #define RX_PPDU_END_USER_STATS_EXT_CORRUPTED_DUE_TO_FIFO_DELAY_LSB                  32
181 #define RX_PPDU_END_USER_STATS_EXT_CORRUPTED_DUE_TO_FIFO_DELAY_MSB                  32
182 #define RX_PPDU_END_USER_STATS_EXT_CORRUPTED_DUE_TO_FIFO_DELAY_MASK                 0x0000000100000000
183 
184 
185 
186 
187 #define RX_PPDU_END_USER_STATS_EXT_RESERVED_7A_OFFSET                               0x0000000000000018
188 #define RX_PPDU_END_USER_STATS_EXT_RESERVED_7A_LSB                                  33
189 #define RX_PPDU_END_USER_STATS_EXT_RESERVED_7A_MSB                                  63
190 #define RX_PPDU_END_USER_STATS_EXT_RESERVED_7A_MASK                                 0xfffffffe00000000
191 
192 
193 
194 #endif
195