1 2 /* 3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 23 24 25 26 27 28 29 30 #ifndef _TCL_STATUS_RING_H_ 31 #define _TCL_STATUS_RING_H_ 32 #if !defined(__ASSEMBLER__) 33 #endif 34 35 #define NUM_OF_DWORDS_TCL_STATUS_RING 8 36 37 38 struct tcl_status_ring { 39 uint32_t gse_ctrl : 4, 40 ase_fse_sel : 1, 41 cache_op_res : 2, 42 index_search_en : 1, 43 msdu_cnt_n : 24; 44 uint32_t msdu_byte_cnt_n : 32; 45 uint32_t msdu_timestmp_n : 32; 46 uint32_t cmd_meta_data_31_0 : 32; 47 uint32_t cmd_meta_data_63_32 : 32; 48 uint32_t hash_indx_val : 20, 49 cache_set_num : 4, 50 reserved_5a : 8; 51 uint32_t reserved_6a : 32; 52 uint32_t reserved_7a : 20, 53 ring_id : 8, 54 looping_count : 4; 55 }; 56 57 58 59 60 #define TCL_STATUS_RING_GSE_CTRL_OFFSET 0x00000000 61 #define TCL_STATUS_RING_GSE_CTRL_LSB 0 62 #define TCL_STATUS_RING_GSE_CTRL_MSB 3 63 #define TCL_STATUS_RING_GSE_CTRL_MASK 0x0000000f 64 65 66 67 68 #define TCL_STATUS_RING_ASE_FSE_SEL_OFFSET 0x00000000 69 #define TCL_STATUS_RING_ASE_FSE_SEL_LSB 4 70 #define TCL_STATUS_RING_ASE_FSE_SEL_MSB 4 71 #define TCL_STATUS_RING_ASE_FSE_SEL_MASK 0x00000010 72 73 74 75 76 #define TCL_STATUS_RING_CACHE_OP_RES_OFFSET 0x00000000 77 #define TCL_STATUS_RING_CACHE_OP_RES_LSB 5 78 #define TCL_STATUS_RING_CACHE_OP_RES_MSB 6 79 #define TCL_STATUS_RING_CACHE_OP_RES_MASK 0x00000060 80 81 82 83 84 #define TCL_STATUS_RING_INDEX_SEARCH_EN_OFFSET 0x00000000 85 #define TCL_STATUS_RING_INDEX_SEARCH_EN_LSB 7 86 #define TCL_STATUS_RING_INDEX_SEARCH_EN_MSB 7 87 #define TCL_STATUS_RING_INDEX_SEARCH_EN_MASK 0x00000080 88 89 90 91 92 #define TCL_STATUS_RING_MSDU_CNT_N_OFFSET 0x00000000 93 #define TCL_STATUS_RING_MSDU_CNT_N_LSB 8 94 #define TCL_STATUS_RING_MSDU_CNT_N_MSB 31 95 #define TCL_STATUS_RING_MSDU_CNT_N_MASK 0xffffff00 96 97 98 99 100 #define TCL_STATUS_RING_MSDU_BYTE_CNT_N_OFFSET 0x00000004 101 #define TCL_STATUS_RING_MSDU_BYTE_CNT_N_LSB 0 102 #define TCL_STATUS_RING_MSDU_BYTE_CNT_N_MSB 31 103 #define TCL_STATUS_RING_MSDU_BYTE_CNT_N_MASK 0xffffffff 104 105 106 107 108 #define TCL_STATUS_RING_MSDU_TIMESTMP_N_OFFSET 0x00000008 109 #define TCL_STATUS_RING_MSDU_TIMESTMP_N_LSB 0 110 #define TCL_STATUS_RING_MSDU_TIMESTMP_N_MSB 31 111 #define TCL_STATUS_RING_MSDU_TIMESTMP_N_MASK 0xffffffff 112 113 114 115 116 #define TCL_STATUS_RING_CMD_META_DATA_31_0_OFFSET 0x0000000c 117 #define TCL_STATUS_RING_CMD_META_DATA_31_0_LSB 0 118 #define TCL_STATUS_RING_CMD_META_DATA_31_0_MSB 31 119 #define TCL_STATUS_RING_CMD_META_DATA_31_0_MASK 0xffffffff 120 121 122 123 124 #define TCL_STATUS_RING_CMD_META_DATA_63_32_OFFSET 0x00000010 125 #define TCL_STATUS_RING_CMD_META_DATA_63_32_LSB 0 126 #define TCL_STATUS_RING_CMD_META_DATA_63_32_MSB 31 127 #define TCL_STATUS_RING_CMD_META_DATA_63_32_MASK 0xffffffff 128 129 130 131 132 #define TCL_STATUS_RING_HASH_INDX_VAL_OFFSET 0x00000014 133 #define TCL_STATUS_RING_HASH_INDX_VAL_LSB 0 134 #define TCL_STATUS_RING_HASH_INDX_VAL_MSB 19 135 #define TCL_STATUS_RING_HASH_INDX_VAL_MASK 0x000fffff 136 137 138 139 140 #define TCL_STATUS_RING_CACHE_SET_NUM_OFFSET 0x00000014 141 #define TCL_STATUS_RING_CACHE_SET_NUM_LSB 20 142 #define TCL_STATUS_RING_CACHE_SET_NUM_MSB 23 143 #define TCL_STATUS_RING_CACHE_SET_NUM_MASK 0x00f00000 144 145 146 147 148 #define TCL_STATUS_RING_RESERVED_5A_OFFSET 0x00000014 149 #define TCL_STATUS_RING_RESERVED_5A_LSB 24 150 #define TCL_STATUS_RING_RESERVED_5A_MSB 31 151 #define TCL_STATUS_RING_RESERVED_5A_MASK 0xff000000 152 153 154 155 156 #define TCL_STATUS_RING_RESERVED_6A_OFFSET 0x00000018 157 #define TCL_STATUS_RING_RESERVED_6A_LSB 0 158 #define TCL_STATUS_RING_RESERVED_6A_MSB 31 159 #define TCL_STATUS_RING_RESERVED_6A_MASK 0xffffffff 160 161 162 163 164 #define TCL_STATUS_RING_RESERVED_7A_OFFSET 0x0000001c 165 #define TCL_STATUS_RING_RESERVED_7A_LSB 0 166 #define TCL_STATUS_RING_RESERVED_7A_MSB 19 167 #define TCL_STATUS_RING_RESERVED_7A_MASK 0x000fffff 168 169 170 171 172 #define TCL_STATUS_RING_RING_ID_OFFSET 0x0000001c 173 #define TCL_STATUS_RING_RING_ID_LSB 20 174 #define TCL_STATUS_RING_RING_ID_MSB 27 175 #define TCL_STATUS_RING_RING_ID_MASK 0x0ff00000 176 177 178 179 180 #define TCL_STATUS_RING_LOOPING_COUNT_OFFSET 0x0000001c 181 #define TCL_STATUS_RING_LOOPING_COUNT_LSB 28 182 #define TCL_STATUS_RING_LOOPING_COUNT_MSB 31 183 #define TCL_STATUS_RING_LOOPING_COUNT_MASK 0xf0000000 184 185 186 187 #endif 188