xref: /wlan-driver/fw-api/hw/kiwi/v1/wcss_seq_hwiobase.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /*
3  * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 
21 #ifndef __WCSS_SEQ_HWIOBASE_H__
22 #define __WCSS_SEQ_HWIOBASE_H__
23 
24 
25 
26 
27 
28 
29 #define WCSS_CFGBUS_BASE                                            0x00008000
30 #define WCSS_CFGBUS_BASE_SIZE                                       0x00008000
31 #define WCSS_CFGBUS_BASE_PHYS                                       0x00008000
32 
33 
34 
35 #define UMAC_NOC_BASE                                               0x00140000
36 #define UMAC_NOC_BASE_SIZE                                          0x00004400
37 #define UMAC_NOC_BASE_PHYS                                          0x00140000
38 
39 
40 
41 #define PHYA0_BASE                                                  0x00300000
42 #define PHYA0_BASE_SIZE                                             0x00300000
43 #define PHYA0_BASE_PHYS                                             0x00300000
44 
45 
46 
47 #define PHYA1_BASE                                                  0x00600000
48 #define PHYA1_BASE_SIZE                                             0x00300000
49 #define PHYA1_BASE_PHYS                                             0x00600000
50 
51 
52 
53 #define DMAC_BASE                                                   0x00900000
54 #define DMAC_BASE_SIZE                                              0x00080000
55 #define DMAC_BASE_PHYS                                              0x00900000
56 
57 
58 
59 #define UMAC_BASE                                                   0x00a00000
60 #define UMAC_BASE_SIZE                                              0x0004d000
61 #define UMAC_BASE_PHYS                                              0x00a00000
62 
63 
64 
65 #define PMAC0_BASE                                                  0x00a80000
66 #define PMAC0_BASE_SIZE                                             0x00040000
67 #define PMAC0_BASE_PHYS                                             0x00a80000
68 
69 
70 
71 #define PMAC1_BASE                                                  0x00ac0000
72 #define PMAC1_BASE_SIZE                                             0x00040000
73 #define PMAC1_BASE_PHYS                                             0x00ac0000
74 
75 
76 
77 #define CXC_BASE                                                    0x00b40000
78 #define CXC_BASE_SIZE                                               0x00010000
79 #define CXC_BASE_PHYS                                               0x00b40000
80 
81 
82 
83 #define WFSS_PMM_BASE                                               0x00b50000
84 #define WFSS_PMM_BASE_SIZE                                          0x00002401
85 #define WFSS_PMM_BASE_PHYS                                          0x00b50000
86 
87 
88 
89 #define WFSS_CC_BASE                                                0x00b60000
90 #define WFSS_CC_BASE_SIZE                                           0x00008000
91 #define WFSS_CC_BASE_PHYS                                           0x00b60000
92 
93 
94 
95 #define WCMN_CORE_BASE                                              0x00b68000
96 #define WCMN_CORE_BASE_SIZE                                         0x000008a9
97 #define WCMN_CORE_BASE_PHYS                                         0x00b68000
98 
99 
100 
101 #define WIFI_CFGBUS_APB_TSLV_BASE                                   0x00b6b000
102 #define WIFI_CFGBUS_APB_TSLV_BASE_SIZE                              0x00001000
103 #define WIFI_CFGBUS_APB_TSLV_BASE_PHYS                              0x00b6b000
104 
105 
106 
107 #define WFSS_CFGBUS_BASE                                            0x00b6c000
108 #define WFSS_CFGBUS_BASE_SIZE                                       0x000000a0
109 #define WFSS_CFGBUS_BASE_PHYS                                       0x00b6c000
110 
111 
112 
113 #define WIFI_CFGBUS_AHB_TSLV_BASE                                   0x00b6d000
114 #define WIFI_CFGBUS_AHB_TSLV_BASE_SIZE                              0x00001000
115 #define WIFI_CFGBUS_AHB_TSLV_BASE_PHYS                              0x00b6d000
116 
117 
118 
119 #define UMAC_ACMT_BASE                                              0x00b6e000
120 #define UMAC_ACMT_BASE_SIZE                                         0x00001000
121 #define UMAC_ACMT_BASE_PHYS                                         0x00b6e000
122 
123 
124 
125 #define WCSS_CC_BASE                                                0x00b80000
126 #define WCSS_CC_BASE_SIZE                                           0x00010000
127 #define WCSS_CC_BASE_PHYS                                           0x00b80000
128 
129 
130 
131 #define PMM_TOP_BASE                                                0x00b90000
132 #define PMM_TOP_BASE_SIZE                                           0x00010000
133 #define PMM_TOP_BASE_PHYS                                           0x00b90000
134 
135 
136 
137 #define WCSS_TOP_CMN_BASE                                           0x00ba0000
138 #define WCSS_TOP_CMN_BASE_SIZE                                      0x00004000
139 #define WCSS_TOP_CMN_BASE_PHYS                                      0x00ba0000
140 
141 
142 
143 #define MSIP_BASE                                                   0x00bb0000
144 #define MSIP_BASE_SIZE                                              0x00010000
145 #define MSIP_BASE_PHYS                                              0x00bb0000
146 
147 
148 
149 #define DBG_BASE                                                    0x01000000
150 #define DBG_BASE_SIZE                                               0x00100000
151 #define DBG_BASE_PHYS                                               0x01000000
152 
153 
154 
155 #define Q6SS_WLAN_BASE                                              0x01100000
156 #define Q6SS_WLAN_BASE_SIZE                                         0x00100000
157 #define Q6SS_WLAN_BASE_PHYS                                         0x01100000
158 
159 
160 #endif
161