1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 19 20 #ifndef _COEX_RX_STATUS_H_ 21 #define _COEX_RX_STATUS_H_ 22 #if !defined(__ASSEMBLER__) 23 #endif 24 25 #define NUM_OF_DWORDS_COEX_RX_STATUS 2 26 27 #define NUM_OF_QWORDS_COEX_RX_STATUS 1 28 29 struct coex_rx_status { 30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31 uint32_t rx_mac_frame_status : 2, 32 rx_with_tx_response : 1, 33 rx_rate : 5, 34 rx_bw : 3, 35 single_mpdu : 1, 36 filter_status : 1, 37 ampdu : 1, 38 directed : 1, 39 reserved_0 : 1, 40 rx_nss : 3, 41 rx_rssi : 8, 42 rx_type : 3, 43 retry_bit_setting : 1, 44 more_data_bit_setting : 1; 45 uint32_t remain_rx_packet_time : 16, 46 rx_remaining_fes_time : 16; 47 #else 48 uint32_t more_data_bit_setting : 1, 49 retry_bit_setting : 1, 50 rx_type : 3, 51 rx_rssi : 8, 52 rx_nss : 3, 53 reserved_0 : 1, 54 directed : 1, 55 ampdu : 1, 56 filter_status : 1, 57 single_mpdu : 1, 58 rx_bw : 3, 59 rx_rate : 5, 60 rx_with_tx_response : 1, 61 rx_mac_frame_status : 2; 62 uint32_t rx_remaining_fes_time : 16, 63 remain_rx_packet_time : 16; 64 #endif 65 }; 66 67 #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_OFFSET 0x0000000000000000 68 #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_LSB 0 69 #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_MSB 1 70 #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_MASK 0x0000000000000003 71 72 #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_OFFSET 0x0000000000000000 73 #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_LSB 2 74 #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_MSB 2 75 #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_MASK 0x0000000000000004 76 77 #define COEX_RX_STATUS_RX_RATE_OFFSET 0x0000000000000000 78 #define COEX_RX_STATUS_RX_RATE_LSB 3 79 #define COEX_RX_STATUS_RX_RATE_MSB 7 80 #define COEX_RX_STATUS_RX_RATE_MASK 0x00000000000000f8 81 82 #define COEX_RX_STATUS_RX_BW_OFFSET 0x0000000000000000 83 #define COEX_RX_STATUS_RX_BW_LSB 8 84 #define COEX_RX_STATUS_RX_BW_MSB 10 85 #define COEX_RX_STATUS_RX_BW_MASK 0x0000000000000700 86 87 #define COEX_RX_STATUS_SINGLE_MPDU_OFFSET 0x0000000000000000 88 #define COEX_RX_STATUS_SINGLE_MPDU_LSB 11 89 #define COEX_RX_STATUS_SINGLE_MPDU_MSB 11 90 #define COEX_RX_STATUS_SINGLE_MPDU_MASK 0x0000000000000800 91 92 #define COEX_RX_STATUS_FILTER_STATUS_OFFSET 0x0000000000000000 93 #define COEX_RX_STATUS_FILTER_STATUS_LSB 12 94 #define COEX_RX_STATUS_FILTER_STATUS_MSB 12 95 #define COEX_RX_STATUS_FILTER_STATUS_MASK 0x0000000000001000 96 97 #define COEX_RX_STATUS_AMPDU_OFFSET 0x0000000000000000 98 #define COEX_RX_STATUS_AMPDU_LSB 13 99 #define COEX_RX_STATUS_AMPDU_MSB 13 100 #define COEX_RX_STATUS_AMPDU_MASK 0x0000000000002000 101 102 #define COEX_RX_STATUS_DIRECTED_OFFSET 0x0000000000000000 103 #define COEX_RX_STATUS_DIRECTED_LSB 14 104 #define COEX_RX_STATUS_DIRECTED_MSB 14 105 #define COEX_RX_STATUS_DIRECTED_MASK 0x0000000000004000 106 107 #define COEX_RX_STATUS_RESERVED_0_OFFSET 0x0000000000000000 108 #define COEX_RX_STATUS_RESERVED_0_LSB 15 109 #define COEX_RX_STATUS_RESERVED_0_MSB 15 110 #define COEX_RX_STATUS_RESERVED_0_MASK 0x0000000000008000 111 112 #define COEX_RX_STATUS_RX_NSS_OFFSET 0x0000000000000000 113 #define COEX_RX_STATUS_RX_NSS_LSB 16 114 #define COEX_RX_STATUS_RX_NSS_MSB 18 115 #define COEX_RX_STATUS_RX_NSS_MASK 0x0000000000070000 116 117 #define COEX_RX_STATUS_RX_RSSI_OFFSET 0x0000000000000000 118 #define COEX_RX_STATUS_RX_RSSI_LSB 19 119 #define COEX_RX_STATUS_RX_RSSI_MSB 26 120 #define COEX_RX_STATUS_RX_RSSI_MASK 0x0000000007f80000 121 122 #define COEX_RX_STATUS_RX_TYPE_OFFSET 0x0000000000000000 123 #define COEX_RX_STATUS_RX_TYPE_LSB 27 124 #define COEX_RX_STATUS_RX_TYPE_MSB 29 125 #define COEX_RX_STATUS_RX_TYPE_MASK 0x0000000038000000 126 127 #define COEX_RX_STATUS_RETRY_BIT_SETTING_OFFSET 0x0000000000000000 128 #define COEX_RX_STATUS_RETRY_BIT_SETTING_LSB 30 129 #define COEX_RX_STATUS_RETRY_BIT_SETTING_MSB 30 130 #define COEX_RX_STATUS_RETRY_BIT_SETTING_MASK 0x0000000040000000 131 132 #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_OFFSET 0x0000000000000000 133 #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_LSB 31 134 #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_MSB 31 135 #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_MASK 0x0000000080000000 136 137 #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_OFFSET 0x0000000000000000 138 #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_LSB 32 139 #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_MSB 47 140 #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_MASK 0x0000ffff00000000 141 142 #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_OFFSET 0x0000000000000000 143 #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_LSB 48 144 #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_MSB 63 145 #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_MASK 0xffff000000000000 146 147 #endif 148