1 2 /* 3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 #ifndef _HE_SIG_A_MU_UL_INFO_H_ 23 #define _HE_SIG_A_MU_UL_INFO_H_ 24 #if !defined(__ASSEMBLER__) 25 #endif 26 27 #define NUM_OF_DWORDS_HE_SIG_A_MU_UL_INFO 2 28 29 struct he_sig_a_mu_ul_info { 30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31 uint32_t format_indication : 1, 32 bss_color_id : 6, 33 spatial_reuse : 16, 34 reserved_0a : 1, 35 transmit_bw : 2, 36 reserved_0b : 6; 37 uint32_t txop_duration : 7, 38 reserved_1a : 9, 39 crc : 4, 40 tail : 6, 41 reserved_1b : 5, 42 rx_integrity_check_passed : 1; 43 #else 44 uint32_t reserved_0b : 6, 45 transmit_bw : 2, 46 reserved_0a : 1, 47 spatial_reuse : 16, 48 bss_color_id : 6, 49 format_indication : 1; 50 uint32_t rx_integrity_check_passed : 1, 51 reserved_1b : 5, 52 tail : 6, 53 crc : 4, 54 reserved_1a : 9, 55 txop_duration : 7; 56 #endif 57 }; 58 59 #define HE_SIG_A_MU_UL_INFO_FORMAT_INDICATION_OFFSET 0x00000000 60 #define HE_SIG_A_MU_UL_INFO_FORMAT_INDICATION_LSB 0 61 #define HE_SIG_A_MU_UL_INFO_FORMAT_INDICATION_MSB 0 62 #define HE_SIG_A_MU_UL_INFO_FORMAT_INDICATION_MASK 0x00000001 63 64 #define HE_SIG_A_MU_UL_INFO_BSS_COLOR_ID_OFFSET 0x00000000 65 #define HE_SIG_A_MU_UL_INFO_BSS_COLOR_ID_LSB 1 66 #define HE_SIG_A_MU_UL_INFO_BSS_COLOR_ID_MSB 6 67 #define HE_SIG_A_MU_UL_INFO_BSS_COLOR_ID_MASK 0x0000007e 68 69 #define HE_SIG_A_MU_UL_INFO_SPATIAL_REUSE_OFFSET 0x00000000 70 #define HE_SIG_A_MU_UL_INFO_SPATIAL_REUSE_LSB 7 71 #define HE_SIG_A_MU_UL_INFO_SPATIAL_REUSE_MSB 22 72 #define HE_SIG_A_MU_UL_INFO_SPATIAL_REUSE_MASK 0x007fff80 73 74 #define HE_SIG_A_MU_UL_INFO_RESERVED_0A_OFFSET 0x00000000 75 #define HE_SIG_A_MU_UL_INFO_RESERVED_0A_LSB 23 76 #define HE_SIG_A_MU_UL_INFO_RESERVED_0A_MSB 23 77 #define HE_SIG_A_MU_UL_INFO_RESERVED_0A_MASK 0x00800000 78 79 #define HE_SIG_A_MU_UL_INFO_TRANSMIT_BW_OFFSET 0x00000000 80 #define HE_SIG_A_MU_UL_INFO_TRANSMIT_BW_LSB 24 81 #define HE_SIG_A_MU_UL_INFO_TRANSMIT_BW_MSB 25 82 #define HE_SIG_A_MU_UL_INFO_TRANSMIT_BW_MASK 0x03000000 83 84 #define HE_SIG_A_MU_UL_INFO_RESERVED_0B_OFFSET 0x00000000 85 #define HE_SIG_A_MU_UL_INFO_RESERVED_0B_LSB 26 86 #define HE_SIG_A_MU_UL_INFO_RESERVED_0B_MSB 31 87 #define HE_SIG_A_MU_UL_INFO_RESERVED_0B_MASK 0xfc000000 88 89 #define HE_SIG_A_MU_UL_INFO_TXOP_DURATION_OFFSET 0x00000004 90 #define HE_SIG_A_MU_UL_INFO_TXOP_DURATION_LSB 0 91 #define HE_SIG_A_MU_UL_INFO_TXOP_DURATION_MSB 6 92 #define HE_SIG_A_MU_UL_INFO_TXOP_DURATION_MASK 0x0000007f 93 94 #define HE_SIG_A_MU_UL_INFO_RESERVED_1A_OFFSET 0x00000004 95 #define HE_SIG_A_MU_UL_INFO_RESERVED_1A_LSB 7 96 #define HE_SIG_A_MU_UL_INFO_RESERVED_1A_MSB 15 97 #define HE_SIG_A_MU_UL_INFO_RESERVED_1A_MASK 0x0000ff80 98 99 #define HE_SIG_A_MU_UL_INFO_CRC_OFFSET 0x00000004 100 #define HE_SIG_A_MU_UL_INFO_CRC_LSB 16 101 #define HE_SIG_A_MU_UL_INFO_CRC_MSB 19 102 #define HE_SIG_A_MU_UL_INFO_CRC_MASK 0x000f0000 103 104 #define HE_SIG_A_MU_UL_INFO_TAIL_OFFSET 0x00000004 105 #define HE_SIG_A_MU_UL_INFO_TAIL_LSB 20 106 #define HE_SIG_A_MU_UL_INFO_TAIL_MSB 25 107 #define HE_SIG_A_MU_UL_INFO_TAIL_MASK 0x03f00000 108 109 #define HE_SIG_A_MU_UL_INFO_RESERVED_1B_OFFSET 0x00000004 110 #define HE_SIG_A_MU_UL_INFO_RESERVED_1B_LSB 26 111 #define HE_SIG_A_MU_UL_INFO_RESERVED_1B_MSB 30 112 #define HE_SIG_A_MU_UL_INFO_RESERVED_1B_MASK 0x7c000000 113 114 #define HE_SIG_A_MU_UL_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000004 115 #define HE_SIG_A_MU_UL_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31 116 #define HE_SIG_A_MU_UL_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31 117 #define HE_SIG_A_MU_UL_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000 118 119 #endif 120