1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 19 20 #ifndef _MACTX_USER_DESC_PER_USER_H_ 21 #define _MACTX_USER_DESC_PER_USER_H_ 22 #if !defined(__ASSEMBLER__) 23 #endif 24 25 #define NUM_OF_DWORDS_MACTX_USER_DESC_PER_USER 4 26 27 #define NUM_OF_QWORDS_MACTX_USER_DESC_PER_USER 2 28 29 struct mactx_user_desc_per_user { 30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31 uint32_t psdu_length : 24, 32 reserved_0a : 8; 33 uint32_t ru_start_index : 8, 34 ru_size : 4, 35 reserved_1b : 4, 36 ofdma_mu_mimo_enabled : 1, 37 nss : 3, 38 stream_offset : 3, 39 reserved_1c : 1, 40 mcs : 4, 41 dcm : 1, 42 reserved_1d : 3; 43 uint32_t fec_type : 1, 44 reserved_2a : 7, 45 user_bf_type : 2, 46 reserved_2b : 6, 47 drop_user_cbf : 1, 48 reserved_2c : 7, 49 ldpc_extra_symbol : 1, 50 force_extra_symbol : 1, 51 reserved_2d : 6; 52 uint32_t sw_peer_id : 16, 53 per_user_subband_mask : 16; 54 #else 55 uint32_t reserved_0a : 8, 56 psdu_length : 24; 57 uint32_t reserved_1d : 3, 58 dcm : 1, 59 mcs : 4, 60 reserved_1c : 1, 61 stream_offset : 3, 62 nss : 3, 63 ofdma_mu_mimo_enabled : 1, 64 reserved_1b : 4, 65 ru_size : 4, 66 ru_start_index : 8; 67 uint32_t reserved_2d : 6, 68 force_extra_symbol : 1, 69 ldpc_extra_symbol : 1, 70 reserved_2c : 7, 71 drop_user_cbf : 1, 72 reserved_2b : 6, 73 user_bf_type : 2, 74 reserved_2a : 7, 75 fec_type : 1; 76 uint32_t per_user_subband_mask : 16, 77 sw_peer_id : 16; 78 #endif 79 }; 80 81 #define MACTX_USER_DESC_PER_USER_PSDU_LENGTH_OFFSET 0x0000000000000000 82 #define MACTX_USER_DESC_PER_USER_PSDU_LENGTH_LSB 0 83 #define MACTX_USER_DESC_PER_USER_PSDU_LENGTH_MSB 23 84 #define MACTX_USER_DESC_PER_USER_PSDU_LENGTH_MASK 0x0000000000ffffff 85 86 #define MACTX_USER_DESC_PER_USER_RESERVED_0A_OFFSET 0x0000000000000000 87 #define MACTX_USER_DESC_PER_USER_RESERVED_0A_LSB 24 88 #define MACTX_USER_DESC_PER_USER_RESERVED_0A_MSB 31 89 #define MACTX_USER_DESC_PER_USER_RESERVED_0A_MASK 0x00000000ff000000 90 91 #define MACTX_USER_DESC_PER_USER_RU_START_INDEX_OFFSET 0x0000000000000000 92 #define MACTX_USER_DESC_PER_USER_RU_START_INDEX_LSB 32 93 #define MACTX_USER_DESC_PER_USER_RU_START_INDEX_MSB 39 94 #define MACTX_USER_DESC_PER_USER_RU_START_INDEX_MASK 0x000000ff00000000 95 96 #define MACTX_USER_DESC_PER_USER_RU_SIZE_OFFSET 0x0000000000000000 97 #define MACTX_USER_DESC_PER_USER_RU_SIZE_LSB 40 98 #define MACTX_USER_DESC_PER_USER_RU_SIZE_MSB 43 99 #define MACTX_USER_DESC_PER_USER_RU_SIZE_MASK 0x00000f0000000000 100 101 #define MACTX_USER_DESC_PER_USER_RESERVED_1B_OFFSET 0x0000000000000000 102 #define MACTX_USER_DESC_PER_USER_RESERVED_1B_LSB 44 103 #define MACTX_USER_DESC_PER_USER_RESERVED_1B_MSB 47 104 #define MACTX_USER_DESC_PER_USER_RESERVED_1B_MASK 0x0000f00000000000 105 106 #define MACTX_USER_DESC_PER_USER_OFDMA_MU_MIMO_ENABLED_OFFSET 0x0000000000000000 107 #define MACTX_USER_DESC_PER_USER_OFDMA_MU_MIMO_ENABLED_LSB 48 108 #define MACTX_USER_DESC_PER_USER_OFDMA_MU_MIMO_ENABLED_MSB 48 109 #define MACTX_USER_DESC_PER_USER_OFDMA_MU_MIMO_ENABLED_MASK 0x0001000000000000 110 111 #define MACTX_USER_DESC_PER_USER_NSS_OFFSET 0x0000000000000000 112 #define MACTX_USER_DESC_PER_USER_NSS_LSB 49 113 #define MACTX_USER_DESC_PER_USER_NSS_MSB 51 114 #define MACTX_USER_DESC_PER_USER_NSS_MASK 0x000e000000000000 115 116 #define MACTX_USER_DESC_PER_USER_STREAM_OFFSET_OFFSET 0x0000000000000000 117 #define MACTX_USER_DESC_PER_USER_STREAM_OFFSET_LSB 52 118 #define MACTX_USER_DESC_PER_USER_STREAM_OFFSET_MSB 54 119 #define MACTX_USER_DESC_PER_USER_STREAM_OFFSET_MASK 0x0070000000000000 120 121 #define MACTX_USER_DESC_PER_USER_RESERVED_1C_OFFSET 0x0000000000000000 122 #define MACTX_USER_DESC_PER_USER_RESERVED_1C_LSB 55 123 #define MACTX_USER_DESC_PER_USER_RESERVED_1C_MSB 55 124 #define MACTX_USER_DESC_PER_USER_RESERVED_1C_MASK 0x0080000000000000 125 126 #define MACTX_USER_DESC_PER_USER_MCS_OFFSET 0x0000000000000000 127 #define MACTX_USER_DESC_PER_USER_MCS_LSB 56 128 #define MACTX_USER_DESC_PER_USER_MCS_MSB 59 129 #define MACTX_USER_DESC_PER_USER_MCS_MASK 0x0f00000000000000 130 131 #define MACTX_USER_DESC_PER_USER_DCM_OFFSET 0x0000000000000000 132 #define MACTX_USER_DESC_PER_USER_DCM_LSB 60 133 #define MACTX_USER_DESC_PER_USER_DCM_MSB 60 134 #define MACTX_USER_DESC_PER_USER_DCM_MASK 0x1000000000000000 135 136 #define MACTX_USER_DESC_PER_USER_RESERVED_1D_OFFSET 0x0000000000000000 137 #define MACTX_USER_DESC_PER_USER_RESERVED_1D_LSB 61 138 #define MACTX_USER_DESC_PER_USER_RESERVED_1D_MSB 63 139 #define MACTX_USER_DESC_PER_USER_RESERVED_1D_MASK 0xe000000000000000 140 141 #define MACTX_USER_DESC_PER_USER_FEC_TYPE_OFFSET 0x0000000000000008 142 #define MACTX_USER_DESC_PER_USER_FEC_TYPE_LSB 0 143 #define MACTX_USER_DESC_PER_USER_FEC_TYPE_MSB 0 144 #define MACTX_USER_DESC_PER_USER_FEC_TYPE_MASK 0x0000000000000001 145 146 #define MACTX_USER_DESC_PER_USER_RESERVED_2A_OFFSET 0x0000000000000008 147 #define MACTX_USER_DESC_PER_USER_RESERVED_2A_LSB 1 148 #define MACTX_USER_DESC_PER_USER_RESERVED_2A_MSB 7 149 #define MACTX_USER_DESC_PER_USER_RESERVED_2A_MASK 0x00000000000000fe 150 151 #define MACTX_USER_DESC_PER_USER_USER_BF_TYPE_OFFSET 0x0000000000000008 152 #define MACTX_USER_DESC_PER_USER_USER_BF_TYPE_LSB 8 153 #define MACTX_USER_DESC_PER_USER_USER_BF_TYPE_MSB 9 154 #define MACTX_USER_DESC_PER_USER_USER_BF_TYPE_MASK 0x0000000000000300 155 156 #define MACTX_USER_DESC_PER_USER_RESERVED_2B_OFFSET 0x0000000000000008 157 #define MACTX_USER_DESC_PER_USER_RESERVED_2B_LSB 10 158 #define MACTX_USER_DESC_PER_USER_RESERVED_2B_MSB 15 159 #define MACTX_USER_DESC_PER_USER_RESERVED_2B_MASK 0x000000000000fc00 160 161 #define MACTX_USER_DESC_PER_USER_DROP_USER_CBF_OFFSET 0x0000000000000008 162 #define MACTX_USER_DESC_PER_USER_DROP_USER_CBF_LSB 16 163 #define MACTX_USER_DESC_PER_USER_DROP_USER_CBF_MSB 16 164 #define MACTX_USER_DESC_PER_USER_DROP_USER_CBF_MASK 0x0000000000010000 165 166 #define MACTX_USER_DESC_PER_USER_RESERVED_2C_OFFSET 0x0000000000000008 167 #define MACTX_USER_DESC_PER_USER_RESERVED_2C_LSB 17 168 #define MACTX_USER_DESC_PER_USER_RESERVED_2C_MSB 23 169 #define MACTX_USER_DESC_PER_USER_RESERVED_2C_MASK 0x0000000000fe0000 170 171 #define MACTX_USER_DESC_PER_USER_LDPC_EXTRA_SYMBOL_OFFSET 0x0000000000000008 172 #define MACTX_USER_DESC_PER_USER_LDPC_EXTRA_SYMBOL_LSB 24 173 #define MACTX_USER_DESC_PER_USER_LDPC_EXTRA_SYMBOL_MSB 24 174 #define MACTX_USER_DESC_PER_USER_LDPC_EXTRA_SYMBOL_MASK 0x0000000001000000 175 176 #define MACTX_USER_DESC_PER_USER_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000008 177 #define MACTX_USER_DESC_PER_USER_FORCE_EXTRA_SYMBOL_LSB 25 178 #define MACTX_USER_DESC_PER_USER_FORCE_EXTRA_SYMBOL_MSB 25 179 #define MACTX_USER_DESC_PER_USER_FORCE_EXTRA_SYMBOL_MASK 0x0000000002000000 180 181 #define MACTX_USER_DESC_PER_USER_RESERVED_2D_OFFSET 0x0000000000000008 182 #define MACTX_USER_DESC_PER_USER_RESERVED_2D_LSB 26 183 #define MACTX_USER_DESC_PER_USER_RESERVED_2D_MSB 31 184 #define MACTX_USER_DESC_PER_USER_RESERVED_2D_MASK 0x00000000fc000000 185 186 #define MACTX_USER_DESC_PER_USER_SW_PEER_ID_OFFSET 0x0000000000000008 187 #define MACTX_USER_DESC_PER_USER_SW_PEER_ID_LSB 32 188 #define MACTX_USER_DESC_PER_USER_SW_PEER_ID_MSB 47 189 #define MACTX_USER_DESC_PER_USER_SW_PEER_ID_MASK 0x0000ffff00000000 190 191 #define MACTX_USER_DESC_PER_USER_PER_USER_SUBBAND_MASK_OFFSET 0x0000000000000008 192 #define MACTX_USER_DESC_PER_USER_PER_USER_SUBBAND_MASK_LSB 48 193 #define MACTX_USER_DESC_PER_USER_PER_USER_SUBBAND_MASK_MSB 63 194 #define MACTX_USER_DESC_PER_USER_PER_USER_SUBBAND_MASK_MASK 0xffff000000000000 195 196 #endif 197