xref: /wlan-driver/fw-api/hw/kiwi/v2/reo_entrance_ring.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /*
3  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 
21 
22 #ifndef _REO_ENTRANCE_RING_H_
23 #define _REO_ENTRANCE_RING_H_
24 #if !defined(__ASSEMBLER__)
25 #endif
26 
27 #include "rx_mpdu_details.h"
28 #define NUM_OF_DWORDS_REO_ENTRANCE_RING 8
29 
30 struct reo_entrance_ring {
31 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
32              struct   rx_mpdu_details                                           reo_level_mpdu_frame_info;
33              uint32_t rx_reo_queue_desc_addr_31_0                             : 32;
34              uint32_t rx_reo_queue_desc_addr_39_32                            :  8,
35                       rounded_mpdu_byte_count                                 : 14,
36                       reo_destination_indication                              :  5,
37                       frameless_bar                                           :  1,
38                       reserved_5a                                             :  4;
39              uint32_t rxdma_push_reason                                       :  2,
40                       rxdma_error_code                                        :  5,
41                       mpdu_fragment_number                                    :  4,
42                       sw_exception                                            :  1,
43                       sw_exception_mpdu_delink                                :  1,
44                       sw_exception_destination_ring_valid                     :  1,
45                       sw_exception_destination_ring                           :  5,
46                       mpdu_sequence_number                                    : 12,
47                       reserved_6a                                             :  1;
48              uint32_t phy_ppdu_id                                             : 16,
49                       src_link_id                                             :  3,
50                       reserved_7a                                             :  1,
51                       ring_id                                                 :  8,
52                       looping_count                                           :  4;
53 #else
54              struct   rx_mpdu_details                                           reo_level_mpdu_frame_info;
55              uint32_t rx_reo_queue_desc_addr_31_0                             : 32;
56              uint32_t reserved_5a                                             :  4,
57                       frameless_bar                                           :  1,
58                       reo_destination_indication                              :  5,
59                       rounded_mpdu_byte_count                                 : 14,
60                       rx_reo_queue_desc_addr_39_32                            :  8;
61              uint32_t reserved_6a                                             :  1,
62                       mpdu_sequence_number                                    : 12,
63                       sw_exception_destination_ring                           :  5,
64                       sw_exception_destination_ring_valid                     :  1,
65                       sw_exception_mpdu_delink                                :  1,
66                       sw_exception                                            :  1,
67                       mpdu_fragment_number                                    :  4,
68                       rxdma_error_code                                        :  5,
69                       rxdma_push_reason                                       :  2;
70              uint32_t looping_count                                           :  4,
71                       ring_id                                                 :  8,
72                       reserved_7a                                             :  1,
73                       src_link_id                                             :  3,
74                       phy_ppdu_id                                             : 16;
75 #endif
76 };
77 
78 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
79 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
80 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31
81 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
82 
83 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
84 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
85 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7
86 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
87 
88 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
89 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
90 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11
91 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00
92 
93 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
94 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12
95 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31
96 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000
97 
98 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
99 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0
100 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MSB 7
101 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff
102 
103 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
104 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 8
105 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MSB 8
106 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00000100
107 
108 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
109 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 9
110 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MSB 9
111 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00000200
112 
113 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
114 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 10
115 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MSB 10
116 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00000400
117 
118 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
119 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 11
120 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MSB 11
121 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00000800
122 
123 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
124 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 12
125 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MSB 12
126 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x00001000
127 
128 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008
129 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 13
130 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MSB 13
131 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x00002000
132 
133 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
134 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 14
135 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MSB 14
136 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x00004000
137 
138 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_OFFSET 0x00000008
139 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_LSB 15
140 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MSB 26
141 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MASK 0x07ff8000
142 
143 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_OFFSET 0x00000008
144 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_LSB 27
145 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MSB 27
146 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MASK 0x08000000
147 
148 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_OFFSET 0x00000008
149 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_LSB 28
150 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MSB 31
151 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MASK 0xf0000000
152 
153 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
154 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
155 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MSB 31
156 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
157 
158 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET                        0x00000010
159 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_LSB                           0
160 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MSB                           31
161 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MASK                          0xffffffff
162 
163 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET                       0x00000014
164 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_LSB                          0
165 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MSB                          7
166 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MASK                         0x000000ff
167 
168 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_OFFSET                            0x00000014
169 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_LSB                               8
170 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MSB                               21
171 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MASK                              0x003fff00
172 
173 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_OFFSET                         0x00000014
174 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_LSB                            22
175 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MSB                            26
176 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MASK                           0x07c00000
177 
178 #define REO_ENTRANCE_RING_FRAMELESS_BAR_OFFSET                                      0x00000014
179 #define REO_ENTRANCE_RING_FRAMELESS_BAR_LSB                                         27
180 #define REO_ENTRANCE_RING_FRAMELESS_BAR_MSB                                         27
181 #define REO_ENTRANCE_RING_FRAMELESS_BAR_MASK                                        0x08000000
182 
183 #define REO_ENTRANCE_RING_RESERVED_5A_OFFSET                                        0x00000014
184 #define REO_ENTRANCE_RING_RESERVED_5A_LSB                                           28
185 #define REO_ENTRANCE_RING_RESERVED_5A_MSB                                           31
186 #define REO_ENTRANCE_RING_RESERVED_5A_MASK                                          0xf0000000
187 
188 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_OFFSET                                  0x00000018
189 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_LSB                                     0
190 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MSB                                     1
191 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MASK                                    0x00000003
192 
193 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_OFFSET                                   0x00000018
194 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_LSB                                      2
195 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MSB                                      6
196 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MASK                                     0x0000007c
197 
198 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_OFFSET                               0x00000018
199 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_LSB                                  7
200 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MSB                                  10
201 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MASK                                 0x00000780
202 
203 #define REO_ENTRANCE_RING_SW_EXCEPTION_OFFSET                                       0x00000018
204 #define REO_ENTRANCE_RING_SW_EXCEPTION_LSB                                          11
205 #define REO_ENTRANCE_RING_SW_EXCEPTION_MSB                                          11
206 #define REO_ENTRANCE_RING_SW_EXCEPTION_MASK                                         0x00000800
207 
208 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_OFFSET                           0x00000018
209 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_LSB                              12
210 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MSB                              12
211 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MASK                             0x00001000
212 
213 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_OFFSET                0x00000018
214 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_LSB                   13
215 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MSB                   13
216 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MASK                  0x00002000
217 
218 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_OFFSET                      0x00000018
219 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_LSB                         14
220 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MSB                         18
221 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MASK                        0x0007c000
222 
223 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_OFFSET                               0x00000018
224 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_LSB                                  19
225 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MSB                                  30
226 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MASK                                 0x7ff80000
227 
228 #define REO_ENTRANCE_RING_RESERVED_6A_OFFSET                                        0x00000018
229 #define REO_ENTRANCE_RING_RESERVED_6A_LSB                                           31
230 #define REO_ENTRANCE_RING_RESERVED_6A_MSB                                           31
231 #define REO_ENTRANCE_RING_RESERVED_6A_MASK                                          0x80000000
232 
233 #define REO_ENTRANCE_RING_PHY_PPDU_ID_OFFSET                                        0x0000001c
234 #define REO_ENTRANCE_RING_PHY_PPDU_ID_LSB                                           0
235 #define REO_ENTRANCE_RING_PHY_PPDU_ID_MSB                                           15
236 #define REO_ENTRANCE_RING_PHY_PPDU_ID_MASK                                          0x0000ffff
237 
238 #define REO_ENTRANCE_RING_SRC_LINK_ID_OFFSET                                        0x0000001c
239 #define REO_ENTRANCE_RING_SRC_LINK_ID_LSB                                           16
240 #define REO_ENTRANCE_RING_SRC_LINK_ID_MSB                                           18
241 #define REO_ENTRANCE_RING_SRC_LINK_ID_MASK                                          0x00070000
242 
243 #define REO_ENTRANCE_RING_RESERVED_7A_OFFSET                                        0x0000001c
244 #define REO_ENTRANCE_RING_RESERVED_7A_LSB                                           19
245 #define REO_ENTRANCE_RING_RESERVED_7A_MSB                                           19
246 #define REO_ENTRANCE_RING_RESERVED_7A_MASK                                          0x00080000
247 
248 #define REO_ENTRANCE_RING_RING_ID_OFFSET                                            0x0000001c
249 #define REO_ENTRANCE_RING_RING_ID_LSB                                               20
250 #define REO_ENTRANCE_RING_RING_ID_MSB                                               27
251 #define REO_ENTRANCE_RING_RING_ID_MASK                                              0x0ff00000
252 
253 #define REO_ENTRANCE_RING_LOOPING_COUNT_OFFSET                                      0x0000001c
254 #define REO_ENTRANCE_RING_LOOPING_COUNT_LSB                                         28
255 #define REO_ENTRANCE_RING_LOOPING_COUNT_MSB                                         31
256 #define REO_ENTRANCE_RING_LOOPING_COUNT_MASK                                        0xf0000000
257 
258 #endif
259