1*5113495bSYour Name 2*5113495bSYour Name /* 3*5113495bSYour Name * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * 5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 7*5113495bSYour Name * above copyright notice and this permission notice appear in all 8*5113495bSYour Name * copies. 9*5113495bSYour Name * 10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 18*5113495bSYour Name */ 19*5113495bSYour Name 20*5113495bSYour Name 21*5113495bSYour Name 22*5113495bSYour Name #ifndef _REO_FLUSH_TIMEOUT_LIST_H_ 23*5113495bSYour Name #define _REO_FLUSH_TIMEOUT_LIST_H_ 24*5113495bSYour Name #if !defined(__ASSEMBLER__) 25*5113495bSYour Name #endif 26*5113495bSYour Name 27*5113495bSYour Name #include "uniform_reo_cmd_header.h" 28*5113495bSYour Name #define NUM_OF_DWORDS_REO_FLUSH_TIMEOUT_LIST 10 29*5113495bSYour Name 30*5113495bSYour Name #define NUM_OF_QWORDS_REO_FLUSH_TIMEOUT_LIST 5 31*5113495bSYour Name 32*5113495bSYour Name struct reo_flush_timeout_list { 33*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 34*5113495bSYour Name struct uniform_reo_cmd_header cmd_header; 35*5113495bSYour Name uint32_t ac_timout_list : 2, 36*5113495bSYour Name reserved_1 : 30; 37*5113495bSYour Name uint32_t minimum_release_desc_count : 16, 38*5113495bSYour Name minimum_forward_buf_count : 16; 39*5113495bSYour Name uint32_t reserved_3a : 32; 40*5113495bSYour Name uint32_t reserved_4a : 32; 41*5113495bSYour Name uint32_t reserved_5a : 32; 42*5113495bSYour Name uint32_t reserved_6a : 32; 43*5113495bSYour Name uint32_t reserved_7a : 32; 44*5113495bSYour Name uint32_t reserved_8a : 32; 45*5113495bSYour Name uint32_t tlv64_padding : 32; 46*5113495bSYour Name #else 47*5113495bSYour Name struct uniform_reo_cmd_header cmd_header; 48*5113495bSYour Name uint32_t reserved_1 : 30, 49*5113495bSYour Name ac_timout_list : 2; 50*5113495bSYour Name uint32_t minimum_forward_buf_count : 16, 51*5113495bSYour Name minimum_release_desc_count : 16; 52*5113495bSYour Name uint32_t reserved_3a : 32; 53*5113495bSYour Name uint32_t reserved_4a : 32; 54*5113495bSYour Name uint32_t reserved_5a : 32; 55*5113495bSYour Name uint32_t reserved_6a : 32; 56*5113495bSYour Name uint32_t reserved_7a : 32; 57*5113495bSYour Name uint32_t reserved_8a : 32; 58*5113495bSYour Name uint32_t tlv64_padding : 32; 59*5113495bSYour Name #endif 60*5113495bSYour Name }; 61*5113495bSYour Name 62*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x0000000000000000 63*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_LSB 0 64*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_MSB 15 65*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_MASK 0x000000000000ffff 66*5113495bSYour Name 67*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET 0x0000000000000000 68*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_LSB 16 69*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_MSB 16 70*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_MASK 0x0000000000010000 71*5113495bSYour Name 72*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_OFFSET 0x0000000000000000 73*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_LSB 17 74*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_MSB 31 75*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_MASK 0x00000000fffe0000 76*5113495bSYour Name 77*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_OFFSET 0x0000000000000000 78*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_LSB 32 79*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_MSB 33 80*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_MASK 0x0000000300000000 81*5113495bSYour Name 82*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_OFFSET 0x0000000000000000 83*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_LSB 34 84*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_MSB 63 85*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_MASK 0xfffffffc00000000 86*5113495bSYour Name 87*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_OFFSET 0x0000000000000008 88*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_LSB 0 89*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_MSB 15 90*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_MASK 0x000000000000ffff 91*5113495bSYour Name 92*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_OFFSET 0x0000000000000008 93*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_LSB 16 94*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_MSB 31 95*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_MASK 0x00000000ffff0000 96*5113495bSYour Name 97*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_OFFSET 0x0000000000000008 98*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_LSB 32 99*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_MSB 63 100*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_MASK 0xffffffff00000000 101*5113495bSYour Name 102*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_OFFSET 0x0000000000000010 103*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_LSB 0 104*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_MSB 31 105*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_MASK 0x00000000ffffffff 106*5113495bSYour Name 107*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_OFFSET 0x0000000000000010 108*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_LSB 32 109*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_MSB 63 110*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_MASK 0xffffffff00000000 111*5113495bSYour Name 112*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_OFFSET 0x0000000000000018 113*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_LSB 0 114*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_MSB 31 115*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_MASK 0x00000000ffffffff 116*5113495bSYour Name 117*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_OFFSET 0x0000000000000018 118*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_LSB 32 119*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_MSB 63 120*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_MASK 0xffffffff00000000 121*5113495bSYour Name 122*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_OFFSET 0x0000000000000020 123*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_LSB 0 124*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_MSB 31 125*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_MASK 0x00000000ffffffff 126*5113495bSYour Name 127*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_OFFSET 0x0000000000000020 128*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_LSB 32 129*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_MSB 63 130*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_MASK 0xffffffff00000000 131*5113495bSYour Name 132*5113495bSYour Name #endif 133