1 2 /* 3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 #ifndef _REO_UNBLOCK_CACHE_STATUS_H_ 23 #define _REO_UNBLOCK_CACHE_STATUS_H_ 24 #if !defined(__ASSEMBLER__) 25 #endif 26 27 #include "uniform_reo_status_header.h" 28 #define NUM_OF_DWORDS_REO_UNBLOCK_CACHE_STATUS 26 29 30 #define NUM_OF_QWORDS_REO_UNBLOCK_CACHE_STATUS 13 31 32 struct reo_unblock_cache_status { 33 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 34 struct uniform_reo_status_header status_header; 35 uint32_t error_detected : 1, 36 unblock_type : 1, 37 reserved_2a : 30; 38 uint32_t reserved_3a : 32; 39 uint32_t reserved_4a : 32; 40 uint32_t reserved_5a : 32; 41 uint32_t reserved_6a : 32; 42 uint32_t reserved_7a : 32; 43 uint32_t reserved_8a : 32; 44 uint32_t reserved_9a : 32; 45 uint32_t reserved_10a : 32; 46 uint32_t reserved_11a : 32; 47 uint32_t reserved_12a : 32; 48 uint32_t reserved_13a : 32; 49 uint32_t reserved_14a : 32; 50 uint32_t reserved_15a : 32; 51 uint32_t reserved_16a : 32; 52 uint32_t reserved_17a : 32; 53 uint32_t reserved_18a : 32; 54 uint32_t reserved_19a : 32; 55 uint32_t reserved_20a : 32; 56 uint32_t reserved_21a : 32; 57 uint32_t reserved_22a : 32; 58 uint32_t reserved_23a : 32; 59 uint32_t reserved_24a : 32; 60 uint32_t reserved_25a : 28, 61 looping_count : 4; 62 #else 63 struct uniform_reo_status_header status_header; 64 uint32_t reserved_2a : 30, 65 unblock_type : 1, 66 error_detected : 1; 67 uint32_t reserved_3a : 32; 68 uint32_t reserved_4a : 32; 69 uint32_t reserved_5a : 32; 70 uint32_t reserved_6a : 32; 71 uint32_t reserved_7a : 32; 72 uint32_t reserved_8a : 32; 73 uint32_t reserved_9a : 32; 74 uint32_t reserved_10a : 32; 75 uint32_t reserved_11a : 32; 76 uint32_t reserved_12a : 32; 77 uint32_t reserved_13a : 32; 78 uint32_t reserved_14a : 32; 79 uint32_t reserved_15a : 32; 80 uint32_t reserved_16a : 32; 81 uint32_t reserved_17a : 32; 82 uint32_t reserved_18a : 32; 83 uint32_t reserved_19a : 32; 84 uint32_t reserved_20a : 32; 85 uint32_t reserved_21a : 32; 86 uint32_t reserved_22a : 32; 87 uint32_t reserved_23a : 32; 88 uint32_t reserved_24a : 32; 89 uint32_t looping_count : 4, 90 reserved_25a : 28; 91 #endif 92 }; 93 94 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET 0x0000000000000000 95 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_LSB 0 96 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_MSB 15 97 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_MASK 0x000000000000ffff 98 99 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET 0x0000000000000000 100 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_LSB 16 101 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_MSB 25 102 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_MASK 0x0000000003ff0000 103 104 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET 0x0000000000000000 105 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB 26 106 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MSB 27 107 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK 0x000000000c000000 108 109 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_RESERVED_0A_OFFSET 0x0000000000000000 110 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_RESERVED_0A_LSB 28 111 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_RESERVED_0A_MSB 31 112 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_RESERVED_0A_MASK 0x00000000f0000000 113 114 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_TIMESTAMP_OFFSET 0x0000000000000000 115 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_TIMESTAMP_LSB 32 116 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_TIMESTAMP_MSB 63 117 #define REO_UNBLOCK_CACHE_STATUS_STATUS_HEADER_TIMESTAMP_MASK 0xffffffff00000000 118 119 #define REO_UNBLOCK_CACHE_STATUS_ERROR_DETECTED_OFFSET 0x0000000000000008 120 #define REO_UNBLOCK_CACHE_STATUS_ERROR_DETECTED_LSB 0 121 #define REO_UNBLOCK_CACHE_STATUS_ERROR_DETECTED_MSB 0 122 #define REO_UNBLOCK_CACHE_STATUS_ERROR_DETECTED_MASK 0x0000000000000001 123 124 #define REO_UNBLOCK_CACHE_STATUS_UNBLOCK_TYPE_OFFSET 0x0000000000000008 125 #define REO_UNBLOCK_CACHE_STATUS_UNBLOCK_TYPE_LSB 1 126 #define REO_UNBLOCK_CACHE_STATUS_UNBLOCK_TYPE_MSB 1 127 #define REO_UNBLOCK_CACHE_STATUS_UNBLOCK_TYPE_MASK 0x0000000000000002 128 129 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_2A_OFFSET 0x0000000000000008 130 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_2A_LSB 2 131 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_2A_MSB 31 132 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_2A_MASK 0x00000000fffffffc 133 134 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_3A_OFFSET 0x0000000000000008 135 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_3A_LSB 32 136 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_3A_MSB 63 137 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_3A_MASK 0xffffffff00000000 138 139 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_4A_OFFSET 0x0000000000000010 140 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_4A_LSB 0 141 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_4A_MSB 31 142 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_4A_MASK 0x00000000ffffffff 143 144 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_5A_OFFSET 0x0000000000000010 145 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_5A_LSB 32 146 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_5A_MSB 63 147 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_5A_MASK 0xffffffff00000000 148 149 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_6A_OFFSET 0x0000000000000018 150 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_6A_LSB 0 151 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_6A_MSB 31 152 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_6A_MASK 0x00000000ffffffff 153 154 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_7A_OFFSET 0x0000000000000018 155 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_7A_LSB 32 156 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_7A_MSB 63 157 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_7A_MASK 0xffffffff00000000 158 159 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_8A_OFFSET 0x0000000000000020 160 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_8A_LSB 0 161 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_8A_MSB 31 162 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_8A_MASK 0x00000000ffffffff 163 164 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_9A_OFFSET 0x0000000000000020 165 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_9A_LSB 32 166 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_9A_MSB 63 167 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_9A_MASK 0xffffffff00000000 168 169 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_10A_OFFSET 0x0000000000000028 170 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_10A_LSB 0 171 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_10A_MSB 31 172 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_10A_MASK 0x00000000ffffffff 173 174 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_11A_OFFSET 0x0000000000000028 175 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_11A_LSB 32 176 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_11A_MSB 63 177 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_11A_MASK 0xffffffff00000000 178 179 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_12A_OFFSET 0x0000000000000030 180 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_12A_LSB 0 181 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_12A_MSB 31 182 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_12A_MASK 0x00000000ffffffff 183 184 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_13A_OFFSET 0x0000000000000030 185 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_13A_LSB 32 186 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_13A_MSB 63 187 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_13A_MASK 0xffffffff00000000 188 189 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_14A_OFFSET 0x0000000000000038 190 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_14A_LSB 0 191 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_14A_MSB 31 192 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_14A_MASK 0x00000000ffffffff 193 194 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_15A_OFFSET 0x0000000000000038 195 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_15A_LSB 32 196 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_15A_MSB 63 197 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_15A_MASK 0xffffffff00000000 198 199 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_16A_OFFSET 0x0000000000000040 200 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_16A_LSB 0 201 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_16A_MSB 31 202 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_16A_MASK 0x00000000ffffffff 203 204 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_17A_OFFSET 0x0000000000000040 205 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_17A_LSB 32 206 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_17A_MSB 63 207 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_17A_MASK 0xffffffff00000000 208 209 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_18A_OFFSET 0x0000000000000048 210 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_18A_LSB 0 211 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_18A_MSB 31 212 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_18A_MASK 0x00000000ffffffff 213 214 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_19A_OFFSET 0x0000000000000048 215 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_19A_LSB 32 216 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_19A_MSB 63 217 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_19A_MASK 0xffffffff00000000 218 219 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_20A_OFFSET 0x0000000000000050 220 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_20A_LSB 0 221 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_20A_MSB 31 222 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_20A_MASK 0x00000000ffffffff 223 224 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_21A_OFFSET 0x0000000000000050 225 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_21A_LSB 32 226 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_21A_MSB 63 227 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_21A_MASK 0xffffffff00000000 228 229 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_22A_OFFSET 0x0000000000000058 230 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_22A_LSB 0 231 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_22A_MSB 31 232 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_22A_MASK 0x00000000ffffffff 233 234 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_23A_OFFSET 0x0000000000000058 235 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_23A_LSB 32 236 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_23A_MSB 63 237 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_23A_MASK 0xffffffff00000000 238 239 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_24A_OFFSET 0x0000000000000060 240 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_24A_LSB 0 241 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_24A_MSB 31 242 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_24A_MASK 0x00000000ffffffff 243 244 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_25A_OFFSET 0x0000000000000060 245 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_25A_LSB 32 246 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_25A_MSB 59 247 #define REO_UNBLOCK_CACHE_STATUS_RESERVED_25A_MASK 0x0fffffff00000000 248 249 #define REO_UNBLOCK_CACHE_STATUS_LOOPING_COUNT_OFFSET 0x0000000000000060 250 #define REO_UNBLOCK_CACHE_STATUS_LOOPING_COUNT_LSB 60 251 #define REO_UNBLOCK_CACHE_STATUS_LOOPING_COUNT_MSB 63 252 #define REO_UNBLOCK_CACHE_STATUS_LOOPING_COUNT_MASK 0xf000000000000000 253 254 #endif 255