1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 19 20 #ifndef _RU_ALLOCATION_160_INFO_H_ 21 #define _RU_ALLOCATION_160_INFO_H_ 22 #if !defined(__ASSEMBLER__) 23 #endif 24 25 #define NUM_OF_DWORDS_RU_ALLOCATION_160_INFO 4 26 27 struct ru_allocation_160_info { 28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 29 uint32_t ru_allocation_band0_0 : 9, 30 ru_allocation_band0_1 : 9, 31 reserved_0a : 6, 32 ru_allocations_01_subband80_mask : 4, 33 ru_allocations_23_subband80_mask : 4; 34 uint32_t ru_allocation_band0_2 : 9, 35 ru_allocation_band0_3 : 9, 36 reserved_1a : 14; 37 uint32_t ru_allocation_band1_0 : 9, 38 ru_allocation_band1_1 : 9, 39 reserved_2a : 14; 40 uint32_t ru_allocation_band1_2 : 9, 41 ru_allocation_band1_3 : 9, 42 reserved_3a : 14; 43 #else 44 uint32_t ru_allocations_23_subband80_mask : 4, 45 ru_allocations_01_subband80_mask : 4, 46 reserved_0a : 6, 47 ru_allocation_band0_1 : 9, 48 ru_allocation_band0_0 : 9; 49 uint32_t reserved_1a : 14, 50 ru_allocation_band0_3 : 9, 51 ru_allocation_band0_2 : 9; 52 uint32_t reserved_2a : 14, 53 ru_allocation_band1_1 : 9, 54 ru_allocation_band1_0 : 9; 55 uint32_t reserved_3a : 14, 56 ru_allocation_band1_3 : 9, 57 ru_allocation_band1_2 : 9; 58 #endif 59 }; 60 61 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_OFFSET 0x00000000 62 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_LSB 0 63 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_MSB 8 64 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_MASK 0x000001ff 65 66 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_OFFSET 0x00000000 67 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_LSB 9 68 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_MSB 17 69 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_MASK 0x0003fe00 70 71 #define RU_ALLOCATION_160_INFO_RESERVED_0A_OFFSET 0x00000000 72 #define RU_ALLOCATION_160_INFO_RESERVED_0A_LSB 18 73 #define RU_ALLOCATION_160_INFO_RESERVED_0A_MSB 23 74 #define RU_ALLOCATION_160_INFO_RESERVED_0A_MASK 0x00fc0000 75 76 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_OFFSET 0x00000000 77 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_LSB 24 78 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_MSB 27 79 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_MASK 0x0f000000 80 81 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_OFFSET 0x00000000 82 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_LSB 28 83 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_MSB 31 84 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_MASK 0xf0000000 85 86 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_OFFSET 0x00000004 87 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_LSB 0 88 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_MSB 8 89 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_MASK 0x000001ff 90 91 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_OFFSET 0x00000004 92 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_LSB 9 93 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_MSB 17 94 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_MASK 0x0003fe00 95 96 #define RU_ALLOCATION_160_INFO_RESERVED_1A_OFFSET 0x00000004 97 #define RU_ALLOCATION_160_INFO_RESERVED_1A_LSB 18 98 #define RU_ALLOCATION_160_INFO_RESERVED_1A_MSB 31 99 #define RU_ALLOCATION_160_INFO_RESERVED_1A_MASK 0xfffc0000 100 101 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_OFFSET 0x00000008 102 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_LSB 0 103 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_MSB 8 104 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_MASK 0x000001ff 105 106 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_OFFSET 0x00000008 107 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_LSB 9 108 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_MSB 17 109 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_MASK 0x0003fe00 110 111 #define RU_ALLOCATION_160_INFO_RESERVED_2A_OFFSET 0x00000008 112 #define RU_ALLOCATION_160_INFO_RESERVED_2A_LSB 18 113 #define RU_ALLOCATION_160_INFO_RESERVED_2A_MSB 31 114 #define RU_ALLOCATION_160_INFO_RESERVED_2A_MASK 0xfffc0000 115 116 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_OFFSET 0x0000000c 117 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_LSB 0 118 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_MSB 8 119 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_MASK 0x000001ff 120 121 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_OFFSET 0x0000000c 122 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_LSB 9 123 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_MSB 17 124 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_MASK 0x0003fe00 125 126 #define RU_ALLOCATION_160_INFO_RESERVED_3A_OFFSET 0x0000000c 127 #define RU_ALLOCATION_160_INFO_RESERVED_3A_LSB 18 128 #define RU_ALLOCATION_160_INFO_RESERVED_3A_MSB 31 129 #define RU_ALLOCATION_160_INFO_RESERVED_3A_MASK 0xfffc0000 130 131 #endif 132