1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 19 20 #ifndef _RX_FRAME_BITMAP_ACK_H_ 21 #define _RX_FRAME_BITMAP_ACK_H_ 22 #if !defined(__ASSEMBLER__) 23 #endif 24 25 #define NUM_OF_DWORDS_RX_FRAME_BITMAP_ACK 14 26 27 #define NUM_OF_QWORDS_RX_FRAME_BITMAP_ACK 7 28 29 struct rx_frame_bitmap_ack { 30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31 uint32_t no_bitmap_available : 1, 32 explicit_ack : 1, 33 explict_ack_type : 3, 34 ba_bitmap_size : 2, 35 reserved_0a : 3, 36 ba_tid : 4, 37 sta_full_aid : 13, 38 reserved_0b : 5; 39 uint32_t addr1_31_0 : 32; 40 uint32_t addr1_47_32 : 16, 41 addr2_15_0 : 16; 42 uint32_t addr2_47_16 : 32; 43 uint32_t ba_ts_ctrl : 16, 44 ba_ts_seq : 16; 45 uint32_t ba_ts_bitmap_31_0 : 32; 46 uint32_t ba_ts_bitmap_63_32 : 32; 47 uint32_t ba_ts_bitmap_95_64 : 32; 48 uint32_t ba_ts_bitmap_127_96 : 32; 49 uint32_t ba_ts_bitmap_159_128 : 32; 50 uint32_t ba_ts_bitmap_191_160 : 32; 51 uint32_t ba_ts_bitmap_223_192 : 32; 52 uint32_t ba_ts_bitmap_255_224 : 32; 53 uint32_t tlv64_padding : 32; 54 #else 55 uint32_t reserved_0b : 5, 56 sta_full_aid : 13, 57 ba_tid : 4, 58 reserved_0a : 3, 59 ba_bitmap_size : 2, 60 explict_ack_type : 3, 61 explicit_ack : 1, 62 no_bitmap_available : 1; 63 uint32_t addr1_31_0 : 32; 64 uint32_t addr2_15_0 : 16, 65 addr1_47_32 : 16; 66 uint32_t addr2_47_16 : 32; 67 uint32_t ba_ts_seq : 16, 68 ba_ts_ctrl : 16; 69 uint32_t ba_ts_bitmap_31_0 : 32; 70 uint32_t ba_ts_bitmap_63_32 : 32; 71 uint32_t ba_ts_bitmap_95_64 : 32; 72 uint32_t ba_ts_bitmap_127_96 : 32; 73 uint32_t ba_ts_bitmap_159_128 : 32; 74 uint32_t ba_ts_bitmap_191_160 : 32; 75 uint32_t ba_ts_bitmap_223_192 : 32; 76 uint32_t ba_ts_bitmap_255_224 : 32; 77 uint32_t tlv64_padding : 32; 78 #endif 79 }; 80 81 #define RX_FRAME_BITMAP_ACK_NO_BITMAP_AVAILABLE_OFFSET 0x0000000000000000 82 #define RX_FRAME_BITMAP_ACK_NO_BITMAP_AVAILABLE_LSB 0 83 #define RX_FRAME_BITMAP_ACK_NO_BITMAP_AVAILABLE_MSB 0 84 #define RX_FRAME_BITMAP_ACK_NO_BITMAP_AVAILABLE_MASK 0x0000000000000001 85 86 #define RX_FRAME_BITMAP_ACK_EXPLICIT_ACK_OFFSET 0x0000000000000000 87 #define RX_FRAME_BITMAP_ACK_EXPLICIT_ACK_LSB 1 88 #define RX_FRAME_BITMAP_ACK_EXPLICIT_ACK_MSB 1 89 #define RX_FRAME_BITMAP_ACK_EXPLICIT_ACK_MASK 0x0000000000000002 90 91 #define RX_FRAME_BITMAP_ACK_EXPLICT_ACK_TYPE_OFFSET 0x0000000000000000 92 #define RX_FRAME_BITMAP_ACK_EXPLICT_ACK_TYPE_LSB 2 93 #define RX_FRAME_BITMAP_ACK_EXPLICT_ACK_TYPE_MSB 4 94 #define RX_FRAME_BITMAP_ACK_EXPLICT_ACK_TYPE_MASK 0x000000000000001c 95 96 #define RX_FRAME_BITMAP_ACK_BA_BITMAP_SIZE_OFFSET 0x0000000000000000 97 #define RX_FRAME_BITMAP_ACK_BA_BITMAP_SIZE_LSB 5 98 #define RX_FRAME_BITMAP_ACK_BA_BITMAP_SIZE_MSB 6 99 #define RX_FRAME_BITMAP_ACK_BA_BITMAP_SIZE_MASK 0x0000000000000060 100 101 #define RX_FRAME_BITMAP_ACK_RESERVED_0A_OFFSET 0x0000000000000000 102 #define RX_FRAME_BITMAP_ACK_RESERVED_0A_LSB 7 103 #define RX_FRAME_BITMAP_ACK_RESERVED_0A_MSB 9 104 #define RX_FRAME_BITMAP_ACK_RESERVED_0A_MASK 0x0000000000000380 105 106 #define RX_FRAME_BITMAP_ACK_BA_TID_OFFSET 0x0000000000000000 107 #define RX_FRAME_BITMAP_ACK_BA_TID_LSB 10 108 #define RX_FRAME_BITMAP_ACK_BA_TID_MSB 13 109 #define RX_FRAME_BITMAP_ACK_BA_TID_MASK 0x0000000000003c00 110 111 #define RX_FRAME_BITMAP_ACK_STA_FULL_AID_OFFSET 0x0000000000000000 112 #define RX_FRAME_BITMAP_ACK_STA_FULL_AID_LSB 14 113 #define RX_FRAME_BITMAP_ACK_STA_FULL_AID_MSB 26 114 #define RX_FRAME_BITMAP_ACK_STA_FULL_AID_MASK 0x0000000007ffc000 115 116 #define RX_FRAME_BITMAP_ACK_RESERVED_0B_OFFSET 0x0000000000000000 117 #define RX_FRAME_BITMAP_ACK_RESERVED_0B_LSB 27 118 #define RX_FRAME_BITMAP_ACK_RESERVED_0B_MSB 31 119 #define RX_FRAME_BITMAP_ACK_RESERVED_0B_MASK 0x00000000f8000000 120 121 #define RX_FRAME_BITMAP_ACK_ADDR1_31_0_OFFSET 0x0000000000000000 122 #define RX_FRAME_BITMAP_ACK_ADDR1_31_0_LSB 32 123 #define RX_FRAME_BITMAP_ACK_ADDR1_31_0_MSB 63 124 #define RX_FRAME_BITMAP_ACK_ADDR1_31_0_MASK 0xffffffff00000000 125 126 #define RX_FRAME_BITMAP_ACK_ADDR1_47_32_OFFSET 0x0000000000000008 127 #define RX_FRAME_BITMAP_ACK_ADDR1_47_32_LSB 0 128 #define RX_FRAME_BITMAP_ACK_ADDR1_47_32_MSB 15 129 #define RX_FRAME_BITMAP_ACK_ADDR1_47_32_MASK 0x000000000000ffff 130 131 #define RX_FRAME_BITMAP_ACK_ADDR2_15_0_OFFSET 0x0000000000000008 132 #define RX_FRAME_BITMAP_ACK_ADDR2_15_0_LSB 16 133 #define RX_FRAME_BITMAP_ACK_ADDR2_15_0_MSB 31 134 #define RX_FRAME_BITMAP_ACK_ADDR2_15_0_MASK 0x00000000ffff0000 135 136 #define RX_FRAME_BITMAP_ACK_ADDR2_47_16_OFFSET 0x0000000000000008 137 #define RX_FRAME_BITMAP_ACK_ADDR2_47_16_LSB 32 138 #define RX_FRAME_BITMAP_ACK_ADDR2_47_16_MSB 63 139 #define RX_FRAME_BITMAP_ACK_ADDR2_47_16_MASK 0xffffffff00000000 140 141 #define RX_FRAME_BITMAP_ACK_BA_TS_CTRL_OFFSET 0x0000000000000010 142 #define RX_FRAME_BITMAP_ACK_BA_TS_CTRL_LSB 0 143 #define RX_FRAME_BITMAP_ACK_BA_TS_CTRL_MSB 15 144 #define RX_FRAME_BITMAP_ACK_BA_TS_CTRL_MASK 0x000000000000ffff 145 146 #define RX_FRAME_BITMAP_ACK_BA_TS_SEQ_OFFSET 0x0000000000000010 147 #define RX_FRAME_BITMAP_ACK_BA_TS_SEQ_LSB 16 148 #define RX_FRAME_BITMAP_ACK_BA_TS_SEQ_MSB 31 149 #define RX_FRAME_BITMAP_ACK_BA_TS_SEQ_MASK 0x00000000ffff0000 150 151 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_31_0_OFFSET 0x0000000000000010 152 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_31_0_LSB 32 153 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_31_0_MSB 63 154 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_31_0_MASK 0xffffffff00000000 155 156 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_63_32_OFFSET 0x0000000000000018 157 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_63_32_LSB 0 158 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_63_32_MSB 31 159 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_63_32_MASK 0x00000000ffffffff 160 161 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_95_64_OFFSET 0x0000000000000018 162 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_95_64_LSB 32 163 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_95_64_MSB 63 164 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_95_64_MASK 0xffffffff00000000 165 166 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_127_96_OFFSET 0x0000000000000020 167 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_127_96_LSB 0 168 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_127_96_MSB 31 169 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_127_96_MASK 0x00000000ffffffff 170 171 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_159_128_OFFSET 0x0000000000000020 172 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_159_128_LSB 32 173 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_159_128_MSB 63 174 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_159_128_MASK 0xffffffff00000000 175 176 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_191_160_OFFSET 0x0000000000000028 177 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_191_160_LSB 0 178 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_191_160_MSB 31 179 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_191_160_MASK 0x00000000ffffffff 180 181 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_223_192_OFFSET 0x0000000000000028 182 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_223_192_LSB 32 183 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_223_192_MSB 63 184 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_223_192_MASK 0xffffffff00000000 185 186 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_255_224_OFFSET 0x0000000000000030 187 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_255_224_LSB 0 188 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_255_224_MSB 31 189 #define RX_FRAME_BITMAP_ACK_BA_TS_BITMAP_255_224_MASK 0x00000000ffffffff 190 191 #define RX_FRAME_BITMAP_ACK_TLV64_PADDING_OFFSET 0x0000000000000030 192 #define RX_FRAME_BITMAP_ACK_TLV64_PADDING_LSB 32 193 #define RX_FRAME_BITMAP_ACK_TLV64_PADDING_MSB 63 194 #define RX_FRAME_BITMAP_ACK_TLV64_PADDING_MASK 0xffffffff00000000 195 196 #endif 197