1*5113495bSYour Name 2*5113495bSYour Name /* 3*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * 5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 6*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 7*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16*5113495bSYour Name */ 17*5113495bSYour Name 18*5113495bSYour Name 19*5113495bSYour Name 20*5113495bSYour Name #ifndef _RX_PPDU_ACK_REPORT_H_ 21*5113495bSYour Name #define _RX_PPDU_ACK_REPORT_H_ 22*5113495bSYour Name #if !defined(__ASSEMBLER__) 23*5113495bSYour Name #endif 24*5113495bSYour Name 25*5113495bSYour Name #include "ack_report.h" 26*5113495bSYour Name #define NUM_OF_DWORDS_RX_PPDU_ACK_REPORT 2 27*5113495bSYour Name 28*5113495bSYour Name #define NUM_OF_QWORDS_RX_PPDU_ACK_REPORT 1 29*5113495bSYour Name 30*5113495bSYour Name struct rx_ppdu_ack_report { 31*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 32*5113495bSYour Name struct ack_report ack_report_details; 33*5113495bSYour Name uint32_t tlv64_padding : 32; 34*5113495bSYour Name #else 35*5113495bSYour Name struct ack_report ack_report_details; 36*5113495bSYour Name uint32_t tlv64_padding : 32; 37*5113495bSYour Name #endif 38*5113495bSYour Name }; 39*5113495bSYour Name 40*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_OFFSET 0x0000000000000000 41*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_LSB 0 42*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_MSB 3 43*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_MASK 0x000000000000000f 44*5113495bSYour Name 45*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_OFFSET 0x0000000000000000 46*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_LSB 4 47*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_MSB 7 48*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_MASK 0x00000000000000f0 49*5113495bSYour Name 50*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_OFFSET 0x0000000000000000 51*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_LSB 8 52*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_MSB 8 53*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_MASK 0x0000000000000100 54*5113495bSYour Name 55*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_OFFSET 0x0000000000000000 56*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_LSB 9 57*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_MSB 15 58*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_MASK 0x000000000000fe00 59*5113495bSYour Name 60*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_OFFSET 0x0000000000000000 61*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_LSB 16 62*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_MSB 31 63*5113495bSYour Name #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_MASK 0x00000000ffff0000 64*5113495bSYour Name 65*5113495bSYour Name #define RX_PPDU_ACK_REPORT_TLV64_PADDING_OFFSET 0x0000000000000000 66*5113495bSYour Name #define RX_PPDU_ACK_REPORT_TLV64_PADDING_LSB 32 67*5113495bSYour Name #define RX_PPDU_ACK_REPORT_TLV64_PADDING_MSB 63 68*5113495bSYour Name #define RX_PPDU_ACK_REPORT_TLV64_PADDING_MASK 0xffffffff00000000 69*5113495bSYour Name 70*5113495bSYour Name #endif 71