xref: /wlan-driver/fw-api/hw/kiwi/v2/rx_timing_offset_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /*
3  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 
21 
22 #ifndef _RX_TIMING_OFFSET_INFO_H_
23 #define _RX_TIMING_OFFSET_INFO_H_
24 #if !defined(__ASSEMBLER__)
25 #endif
26 
27 #define NUM_OF_DWORDS_RX_TIMING_OFFSET_INFO 1
28 
29 struct rx_timing_offset_info {
30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
31              uint32_t residual_phase_offset                                   : 12,
32                       reserved                                                : 20;
33 #else
34              uint32_t reserved                                                : 20,
35                       residual_phase_offset                                   : 12;
36 #endif
37 };
38 
39 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_OFFSET                          0x00000000
40 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_LSB                             0
41 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_MSB                             11
42 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_MASK                            0x00000fff
43 
44 #define RX_TIMING_OFFSET_INFO_RESERVED_OFFSET                                       0x00000000
45 #define RX_TIMING_OFFSET_INFO_RESERVED_LSB                                          12
46 #define RX_TIMING_OFFSET_INFO_RESERVED_MSB                                          31
47 #define RX_TIMING_OFFSET_INFO_RESERVED_MASK                                         0xfffff000
48 
49 #endif
50